Chapter 13 Embedded ARM Applications

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1 Chapter 13 Embedded ARM Applications Introduction The VLSI Ruby II advanced communication processor The VLSI ISDN subscriber Processor The OneC TM VWS22100 GSM chip The Ericsson VLSI bluetooth baseband The ARM7500 and ARM7500FE The ARM7100 The SA-1100

2 Introduction The VLSI Ruby II advanced communication processor The VLSI ISDN subscriber Processor The OneC TM VWS22100 GSM chip The Ericsson VLSI bluetooth baseband The ARM7500 and ARM7500FE The ARM7100 The SA-1100 The VLSI Ruby II advanced communication processor(1) VLSI Technology, Inc. For used in portable communications devices The chip is based around an ARM core 2 Kbytes of fast on-chip SRAM Peripheral modules: PCMCIA interface Four byte-wide parallel interface Two UARTs

3 The VLSI Ruby II advanced communication processor(2) Synchronous communications module supports a range of standard serial communication protocols Serial module provides a softwareled data port such as the I 2 C bus. The external bus interface supports devices with 8-, 16- and 32-bit data buses and has flexible wait state generation The counter-timer block has three 8-bit counters connected to a 24-bit prescaler An interrupter gives programmable of all on- and off-chip interrupt sources Support power-management mode Ruby II advanced communication organization external interrupts (3) clock clock ARM core 512 x 32 SRAM interrupt co unter/ timers parallel i/f 1,2,3,4 I/O mode select PCMCIA host interface UAR T1 ho st FIFOs (16 x 8) external bus address (22) data (8/16/32) serial UAR T2 high-speed serial i/f serial FIFOs (16 x 8) se rial parallel interface 0 I 2 C,... 8 data bits &

4 Introduction The VLSI Ruby II advanced communication processor The VLSI ISDN subscriber Processor The OneC TM VWS22100 GSM chip The Ericsson VLSI bluetooth baseband The ARM7500 and ARM7500FE The ARM7100 The SA-1100 The VLSI ISDN Subscriber Processor (VIP) VIP is a programmable engine for ISDN (Integrated Services Digital Network; a digital telephony standard) subscriber communications A full-feature ISDN terminal, supporting voice, data and video services down the same digital line

5 VIP organization external interrupts (3) clock clock ARM6 core 768 x 32 SRAM interrupt timer & watchdog ports handset/ hands-free parallel interface G.711 codec external bus address (23) data (8/16/32) S0-interface battery, volume B and D channels ADCs (2) mux address ras, cas serial DSP serial i/f address decoder chip selects Typical VIP System Configuration volume V24 interface Driver S0-ISDN interface ISDN Subscriber Processor hook switch hands-free power ROM RAM K E Y P A D

6 Introduction The VLSI Ruby II advanced communication processor The VLSI ISDN subscriber Processor The OneC TM VWS22100 GSM chip The Ericsson VLSI bluetooth baseband The ARM7500 and ARM7500FE The ARM7100 The SA-1100 OneC TM VWS22100 GSM Chip Developed by VLSI technology, Inc. System-on-Chip design for a GSM mobile telephone handset Incorporating an ARM7TDMI core

7 (6) JTAG test/debug ARM7TDMI core interrupt boot ROM UART1 (6) (13) OneC TM (20) VWS22100 GSM Chip Organization audio i/f radio i/f program ROM Oak DSP core program RAM memory PCM i/f DSP radio port hardware coprocs DSP bus DSP subsystem ARM bus UART2/ IrDA high-speed serial i/f (2) SIM i/f RTC external bus ADC (4) (5) (4) 32 KHz cntrl (6) addr (20) data (16) (7) data ROM data RAM power manager keypad scanner (10) interrupt config./ status GPIO PWM (11) DSP Subsystem Based around the 16-bit Oak DSP core Voice coding Equalization Channel coding Echo cancellation Noise suppression Voice recognition Data compression

8 ARM7TDMI Subsystem User interface software GSM protocol stack Power management Driving the peripheral interfaces Running some data applications Power Management Global and selective power-down modes Ability to slow down the system clock in idle mode Analogue circuits also can operate at reduced power 0n-chip analogue-to-digital converters (ADCs) provide for the monitoring of the temperature and battery voltage to give optimum operation

9 Typical GSM Handset Architecture speaker SIM card eeprom IrDA mic ringer VWS22100 radio module ROM RAM K E Y P A D LCD Introduction The VLSI Ruby II advanced communication processor The VLSI ISDN subscriber Processor The OneC TM VWS22100 GSM chip The Ericsson VLSI bluetooth baseband The ARM7500 and ARM7500FE The ARM7100 The SA-1100

10 The Ericsson-VLSI Bluetooth Baseband Controller Bluetooth De-facto standard for wireless data communication for the 2.4GHz band Developed by a consortium of companies including Ericsson, IBM, Intel, Nokia and Toshiba Support short-range communication (from 10 cm to 10 m) Gross data rate of 1 Mbit/s Piconets: frequency-hopping scheme Bluetooth Controller Organization Based around a synthesized ARM7TDMI core 64 Kbytes of fast on-chip SRAM A 4K byte instruction cache Peripheral modules Three UARTs A USB interface An I 2 C-bus interface External bus interface Counter/timers Interrupt EBC: Ericsson Bluetooth Core: Link Controller functionality within the bluetooth specification

11 Ericsson-VLSI Bluetooth Baseband Controller organization clock JTAG signals (5) clock ARM7TDMI core 4 Kbyte I-cache internal ROM 16K x 32 SRAM interrupt counter/ timers external bus address (20) data (8/16) UART1,2,3 I/O mode select I 2 C i/f FIFOs EBC block radio interface USB i/f Typical Bluetooth application flash memory flash memory address data Bluetooth Baseband Controller radio module host interface (RS232/USB)

12 Bluetooth characteristics Process 0.25 um Transistors 4,300,000 MIPS 12 Metal layers 3 Die area 20 mm 2 Power 75 mw Vdd 2.5 V Clock 0 13 MHz MIPS/W 160 Introduction The VLSI Ruby II advanced communication processor The VLSI ISDN subscriber Processor The OneC TM VWS22100 GSM chip The Ericsson VLSI bluetooth baseband The ARM7500 and ARM7500FE The ARM7100 The SA-1100

13 The ARM7500 and ARM7500FE ARM7500 is a highly integrated singlechip computer which combines the major components of the Acorn Risc PC onto a single chip. ARM7500FE adds the FPA10 floatingpoint coprocessor as an on-chip macrocell The Principal macrocells ARM CPU core: ARM710 FPA10 floating-point coprocessor (on the ARM7500FE only) Video and sound macrocell Memory and I/O

14 cas[3:0] ARM7500 Typical ARM7500 System Organization analogue sound analogue inputs keyboard & mouse video RA [11 :0] interrupts ras[3:0] D[31:0] LA[28: 0] module selects ROM I/O module ROM I/O module BD[15:0] ARM7500 characteristics Process 0.6 um Transistors 550,000 MIPS 30 Metal layers 2 Die area 70 mm 2 Power 690 mw Vdd 5 V Clock 0to33 MHz MIPS/W 43

15 Introduction The VLSI Ruby II advanced communication processor The VLSI ISDN subscriber Processor The OneC TM VWS22100 GSM chip The Ericsson VLSI bluetooth baseband The ARM7500 and ARM7500FE The ARM7100 The SA-1100 ARM710a MMU ARM7 core 8 Kbyte cache LCD interrupt AMBA ARM7100 Organization MHz clock PLL KHz RTC osc. power mgt. counter/ timers external bus address (28) data (32) UART DRA(13) codec i/f FIFOs RAS, CAS(8) WE, OE(2) sync serial expansion parallel I/O PSU

16 ROM Flash PSU The Psion Series 5 Hardware Organization infrared RS232 PC cards IrDA Tx/Rx ARM7100 ADC digitizing tablet 640 x 240 LCD audio codec keyboard ARM7100 characteristics Process 0.6 um Transistors N/A MIPS 30 Metal layers 2 Die area N/A mm 2 Power 14 mw Vdd 3.3 V Clock MHz MIPS/W 212

17 Introduction The VLSI Ruby II advanced communication processor The VLSI ISDN subscriber Processor The OneC TM VWS22100 GSM chip The Ericsson VLSI bluetooth baseband The ARM7500 and ARM7500FE The ARM7100 The SA-1100 The SA-1100 A high-performance integrated systemon-chip based around a modified version of the SA-110 StrongARM CPU core Use in mobile phone handsets, modems, and other hand held applications Minimal power consumption Support for Window CE environment

18 instruction MMU instruction cache SA-1 core data cache mini-cache data MMU SA-1100 Organization LCD (5) CPU core system bus LCD DMA write buffer bridge read buffer memory & PCMCIA data (32) address (26) MHz KHz clock PLL RTC osc. interrupt RTC serial 0 serial 1 USB (2) SDLC (2) I/O pins (28) battery (3) reset (2) generalpurpose I/O power manager OS timer reset peripheral bus serial 2 serial 3 serial 4 IrDA (2) UART (2) Codec (4) SA-1100 characteristics Process 0.35 um Transistors 2,500,000 MIPS 220/250 Metal layers 3 Die area 75 mm 2 Power 330/550 mw Vdd 1.5/2 V Clock 190/220 MHz MIPS/W 665/450

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