INTRODUCTION TO ANALOG IC DESIGN
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1 in cooperation with participants to 5-day training on INTRODUCTION TO ANALOG IC DESIGN Venue: Microelectronics Laboratory, 2 nd flr., College of Engineering bldg., MSU-Iligan Institute of Technology, Tibanga, Iligan City July 27, 2015 August 1, to 5PM
2 Overview Analog circuits are becoming more important today because they provide the interface between the real world signals and digital processing systems. These circuits are typically made of smaller circuits that perform basic functions such as signal transformation, amplification, or rejection. In order to successfully build integrated analog circuit systems, the designer must first be familiar with the basic analog blocks. At the lowest level of design, the designer must understand the MOS transistor characteristics and how these can be used to build analog circuits. This course provides the trainees with background on MOS transistor physics, its operating characteristics, and how it can be used to implement basic analog building blocks such as single stage amplifiers, bias circuits, and differential amplifiers. This will enable the trainees to design and implement their own basic analog blocks to build more complex circuits. Course Topics MOS transistor biasing and small-signal model Two-port network analysis Single stage amplifiers i.e. common-source, common-gate, common-drain Active loads, current sources and mirrors MOS capacitances Frequency response of single stage amplifiers Differential amplifiers, resistive load, active load and frequency response Fabrication process Course Prerequisites The trainees for this course are expected to have taken electronics courses covering semiconductor device physics i.e. diodes and bipolar junction transistors. Moreover, the trainees are expected to have strong background on circuit analysis of passive and active devices including DC and small-signal. A background on linear systems analysis is also required. Course Learning Outcomes After taking this course, the trainees must be able to: 1. Describe the regions of operation of a MOS transistor 2. Describe the conditions to bias a MOS transistor in a desired region 3. State and explain the factors affecting the drain current of a transistor 4. Describe the non-idealities and short-channel effects on the operation of the MOS transistor 5. Explain the importance of small-signal modeling of the transistor 6. Illustrate and describe mathematically the small-signal model of a transistor 7. Describe how the small-signal parameters vary with the operating region 8. Obtain the required size and bias of a transistor to achieve a target transconductance or output impedance 9. Describe the three basic single stage amplifier topologies i.e. common-source, common-gate, common-drain 10. Derive and simulate the equivalent two-port network parameters of single stage amplifiers 11. Obtain the size of single stage amplifiers to achieve required performance 12. State the advantages and disadvantages of using active loads compared with using resistive-loads for single stage amplifiers 13. Describe the bias conditions required for a transistor active load and current mirrors 14. Obtain the size of a transistor active load to achieve required amplifier performance 15. Describe the components of the parasitic capacitances in a MOS transistor 16. Describe the effects of MOS parasitic capacitances in single stage amplifiers frequency respons 17. Derive the frequency response of single stage amplifiers 18. Describe how the frequency response is affected by the amplifier parameters 19. State the advantages of using differential signals over single-ended signals 20. Describe the differences between differential amplifiers with resistive loads and active loads 21. Obtain the size of transistors of a differential amplifier to achieve required performance 22. Describe and derive the frequency response of differential amplifiers Introduction to Analog IC Design 1
3 Course Components The course consists of eleven (11) lectures, nine (9) quizzes, eight (8) lab exercises and one (1) design project. Each lecture intends to discuss the theories and concepts for analysis and design of operational amplifiers including the design issues. The discussions are allotted 60 to 90 minutes. A lab exercise follows each discussion and attempts to supplement the lecture and emphasize important points through experiments using the CAD tools. The lab exercises use TSMC 0.18um CMOS technology. A quiz then follows to test the understanding of the concepts presented during the lectures and lab exercises. The fifth day is allotted for the design project of this course where the trainees will be building their own differential amplifier. The morning session starts at 8 and ends at 12NN. The afternoon session starts at 1PM and ends at 5PM. The fifth day is allotted for the design project of this course where the trainees will be building their own common-source amplifier with current mirror load. Supplementary notes are available for reading of the trainees discussing important points from the daily topics and providing more examples. Lectures Overview Lecture 1: Introduction Course description; topics overview; comparison of analog and digital circuits; linear vs non-linear circuit analysis; analog IC design process; design tools; Lecture 2: MOS Transistor Brief history of transistors; MOS transistor description; threshold voltage; voltage biasing; qualitative theory of NMOS transistor; regions of operation; drain current equation; input transfer characteristic; output characteristic; body effect; short channel effects; channel length modulation; velocity saturation; subthreshold operation; Lecture 3: Small Signal and Two Port Network Analysis Small signal definition; linearization of input transfer characteristic, output characteristic, and body effect; small signal model of MOS transistor; two-port modeling; obtaining two-port parameters; Lecture 4: Single Stage MOS Amplifiers Amplifier analysis steps; common-source small signal model; graphical interpretation of large signal and small signal models; load line analysis; voltage gain; biasing for maximum voltage gain; output swing; common-drain amplifier; common-gate amplifier; Lecture 5: Current Sources MOS current source; current mirrors; minimum drain-source voltage; small signal models of current mirrors; gain of common-source amplifier with current mirror load; cascode current mirror; Lecture 6: MOS Capacitances Types of capacitances in MOS transistor; parallel-plate capacitances; depletion capacitances; Lecture 7: Frequency Analysis RC low pass and high pass filters; bode plots; poles and zeros; Lecture 8: Frequency Analysis of MOS Amplifiers Common-source amplifier frequency response; effects of parasitic capacitances relative magnitude on frequency response; open circuit time constant; MOS transistor transit frequency; common-drain and common-gate amplifiers frequency response; Lecture 9: MOS Differential Amplifier with Resistive Load Single-ended vs differential signaling; fully differential amplifier model; gain definitions; DC biasing and small signal analysis of MOS differential amplifier with resistive load; tail current source; output swing; input common-mode range; frequency response; common-mode rejection ratio; Lecture 10: MOS Differential Amplifier with Active Load Differential amplifier with active loads; differential to single-ended topology; differential amplifier with current mirror load; Lecture 11: Conclusion Review of the circuit blocks discussed; conclusion of the course; project solution; Introduction to Analog IC Design 2
4 Laboratory Exercises Overview Lab 1: Linux Environment Familiarization Optional exercise to familiarize trainees with the Linux filesystem and shell commands; Lab 2: MOS DC Characterization Simulation of input and output I-V characteristics of MOS transistors from 45nm PDK library; observe effects of dimension and bias on the input and output characteristics; Lab 3: MOS Small Signal Characterization Simulation of small signal parameters of MOS transistors from 45nm PDK library; observe effects of dimension and bias on the transconductance and output impedance; Lab 4: Common-Source Amplifier with Resistor Load Simulation of common-source amplifier with resistor load; finding the bias point; simulation of small signal two-port parameters of amplifier; sizing MOS transistor for a required gain; Lab 5: Current Sources Simulation of simple and cascode current mirrors; simulation of minimum voltage and output impedance; simulation of common-source amplifier with active load and obtaining two-port parameters; Lab 6: AC Analysis AC analysis simulation of RC circuits; pole and zero estimation using simulation results; Lab 7: Frequency Response of Common-Source Amplifier Simulation of transistor frequency of NMOS and PMOS; compare frequency response of common-source amplifier with resistor load and active load; observe effects of load capacitance on bandwidth; Lab 8: Differential Amplifiers Simulation of MOS differential amplifiers with resistive load and active loads; compare DC biasing constraints, output swing, and frequency response; Common-source Amplifier with Current Mirror Load Course Schedule Day Time Lecture Topic Lab Exercise Lecture 1 Lab 1 (optional) Day 1 Lecture 2 Lab 2 PM Lecture 3 Lab 3 Day 2 Lecture 4 Lab 4 PM Lecture 5 Lab 5 Lecture 6 Day 3 Lecture 7 Lab 6 PM Lecture 8 Lab 7 Lecture 9 Day 4 Lecture 10 Lab 8 PM Day 5 PM Lecture 11 checking Table 1: Schedule of Activities Introduction to Analog IC Design 3
5 Course Developers Philippine Institute for Integrated Circuits U.P. Microlab MSU-IIT Lecturers Jefferson A. Hora, MSU-Iligan Institute of Technology Allenn C. Lowaton, MSU-Iligan Institute of Technology Olga Joy L. Gerasta, MSU-Iligan Institute of Technology Nieva M. Mapula, MSU-Iligan Institute of Technology Harrez M. Villaruz, Iligan Institute of Technology Recommended Texts Design of Analog CMOS Integrated Circuits by Behzad Razavi Analysis and Design Analog Integrated Circuits by Paul Gray, Fred Hurst, Stephen Lewis, Robert Meyer CMOS Circuit Design Layout and Simulation by R. Jacob Baker Introduction to Analog IC Design 4
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