September 2000 Power Management Products SLVU035
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1 User s Guide September 2000 Power Management Products SLVU035
2 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. Customers are responsible for their applications using TI components. In order to minimize risks associated with the customer s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI s publication of information regarding any third party s products or services does not constitute TI s approval, warranty or endorsement thereof. Copyright 2000, Texas Instruments Incorporated
3 Preface About This Manual This user s guide describes the TPS60120EVM-174 battery-powered, dualoutput evaluation module (SLVP174). The SLVP174 provides a convenient method for evaluating the performance of a dual-output linear regulator. How to Use This Manual Chapter 1 Introduction Chapter 2 EVM Test Setup Chapter 3 Test Results Information About Cautions and Warnings This book may contain cautions and warnings. This is an example of a caution statement. A caution statement describes a situation that could potentially damage your software or equipment. This is an example of a warning statement. A warning statement describes a situation that could potentially cause harm to you. The information in a caution or a warning is provided for your protection. Please read each caution and warning carefully. Read This First iii
4 Trademarks Related Documentation From Texas Instruments TPS70751 data sheet (literature number SLVS291) TPS60120 data sheet (literature number SLVS257B) TPS60120EVM-142 user s guide (literature number SLVU022) Trademarks PowerPAD is a trademark of Texas Instruments. iv
5 Running Title Attribute Reference Contents 1 Introduction Low Power DC/DC Converter LDO Regulator Design Strategy Adjustment by Switch and Jumper Schematic Bill of Materials Board Layout EVM Test Setup Test Results Test Results Chapter Title Attribute Reference v
6 Running Title Attribute Reference Figures 1 1 TPS60120EVM-174 Configuration TPS60120EVM-174 Schematic Diagram Top Layer Bottom Layer (top view) Assembly Test Setup Start-Up Curves (TPS70751) Start-Up Curves (TPS70751) Over an Extended Period Start-Up Curves (TPS60120 and TPS70751) Start-Up Curves (TPS60120 With a 1 ma Load and TPS70751) AC Measurement (TPS60120) AC Measurement (TPS70751) Tables 1 1 TPS60120EVM-174 Bill of Materials vi
7 Chapter 1 Introduction This user s guide describes the TPS60120EVM-174 battery-powered, dual-output power supply evaluation module (SLVP174). This power supply solution is comprised of a TPS60120 low-power dc/dc converter and a TPS70751 dual LDO regulator with integrated supervisory and power-up sequencing circuitry. Figure 1-1 shows a block diagram of the EVM. The DSP is not part of the EVM. Figure 1 1. TPS60120EVM-174 Configuration V EXT IN 3.3 V O V IN1 (3.3 V LDO ) V OUT1 TPS60120 V IN2 (1.8 V LDO ) V OUT2 EN TPS70751 SEQ DSP I/O V BAT CORE EN RESET RESET MR PG1 Off Board Topic Page 1.1 Low-Power DC/DC Converter LDO Regulator Design Strategy Adjustment by Switch and Jumpers Schematic Bill of Materials Board Layout Introduction 1-1
8 Low-Power DC/DC Converter The EVM allows the user to select either two AA batteries in series or an external power supply as the input supply for the dc/dc converter. As shown in the block diagram in Figure 1 1, the TPS60120 converter generates a 3.3-V output voltage and can provide up to 200 ma of output current. The 3.3-V converter output voltage is the input for both of the regulators on the TPS Using its power-up sequencing circuitry, the TPS70751 powers up its 1.8-V output before its 3.3-V output. The supervisory circuitry reset signal is low until both voltages are within a certain threshold of regulation. This configuration is designed to provide a complete power management solution for battery powered DSP, ASIC, and other low-power applications where two independent supply voltages are required. 1.1 Low-Power DC/DC Converter Low-power dc/dc converters with internal charge pumps use a capacitor instead of an inductor or transformer for energy storage. The Texas Instruments TPS60120 is one of these low-power dc/dc converters and performs as a regulated voltage multiplier. Some of the key features of the TPS60120 include: Up to 200-mA output current from 1.8-V to 3.6-V input voltage range Regulated 3.3-V ±4% output Only four external capacitors are required Up to 90% efficiency Only 55-µA quiescent supply current µA current in shutdown mode Low-battery indicator Available in thermally enhanced TSSOP package (PowerPAD ) For a complete functional description, refer to the TPS60120 data sheet, SLVS257, and the Charge Pump application note, SLVA070. PowerPAD is a trademark of Texas Instruments. 1-2 Introduction
9 LDO Regulator 1.2 LDO Regulator LDO regulators use a series pass element, feedback network, including an error amplifier and voltage reference to provide a regulated output voltage from a slightly larger and variable input voltage. Specific features of the TPS707xx family of dual LDO regulators include: Fixed and adjustable dual-output voltages optimized for low power DSPs and processor power supplies Logic selectable power-up sequencing Output currents of 250 ma (regulator 1) and 125 ma (regulator 2) Fast response to line and load transient allows use of small, low cost capacitors Integrated supervisory circuit (SVS) with 120-ms delayed open-drain RESET Low quiescent current (approximately 190 µa), and low dropout to reduce power and prolong battery operating life Output noise only 65 µv RMS Small PowerPAD TSSOP packaging See the TPS707xx family data sheet (SLVS291) for further explanation. Introduction 1-3
10 Design Strategy 1.3 Design Strategy The demand for smaller electronic devices is driving the need for innovative battery powered solutions including smaller batteries because smaller batteries provide smaller voltages. Since the battery supply voltages vary over the life of the battery, it is necessary to have a dc/dc converter capable of providing a regulated output over a wide range of input voltages. For example, AA alkaline batteries have a rated output voltage of 1.5 V but typically provide V over most of their life and finally fall to 0.9 V near the end of their life. NiHM and NiCd rechargeable batteries have a rated output voltage of 1.2 V but typically provide 1.4 V over most of their life and also fall to 1 V near the end of their life. With its 1.5x or 2x voltage multiplication modes, the TPS60120 converter is an ideal solution for efficiently providing a regulated 3.3 V from batteries whose end of life voltage falls well below the required 3.3 V. With a minimum input of 1.8 V, the TPS60120 continues to supply power over the entire usable life of alkaline, NiCd, and NiMH batteries. The TPS60120 also provides an input voltage monitoring feature and an open drain output pin which is pulled high when the input voltage falls below a user determined threshold. In this application, the threshold is resistor-divider selected as 1.8 V, and the open-drain output activates a red LED in the event of a low-battery condition. Today s advanced DSPs and microprocessors are designed with the processor s core operating at a lower voltage than the input/output (I/O) cells that communicate with the peripherals in the external system. Without proper power-up sequencing, the long term reliability of many DSP systems can be compromised when one rail is powered and the other rail is left inactive for extended periods of time. In addition, bus contention, a condition when the processor and another device both attempt to control a bidirectional bus during power up, can affect I/O hardware reliability without proper power-up sequencing. To provide proper power-up sequencing of the separate 1.8-V core and the 3.3-V I/O voltage, the TPS70751 dual regulator was chosen. With the sequence pin tied high, regulator 2 of the TPS70751 is enabled first and provides the regulated 1.8-V core output. When the core output reaches approximately 95% of its regulated voltage, regulator 1 is enabled and provides the 3.3-V core voltage. Had sequencing not been a concern, a single LDO regulator could have provided a 1.8-V core output and the TPS60120 dc/dc converter could have provided the 3.3-V I/O output directly. In this configuration, regulator 1 of the TPS70751 operates as a switch to ensure that the I/O voltage powers up after the core voltage. In addition, the output capacitors of regulator 1 provide some filtering to reduce some of the ripple on the dc/dc converter s output. Also included in this implementation is a Schottky diode with cathode connected to the 1.8-V core voltage and anode connected to the 3.3-V I/O voltage. The diode provides additional protection for long-term reliability and against bus contention issues by ensuring that the rails are never more than 0.3 V apart during power up. 1-4 Introduction
11 Adjustment by Switch and Jumpers As with any power solution, the output voltages should be monitored to ensure that the electronics are properly notified and shut down if the voltages fall below a predetermined threshold. The TPS70751 monitors both 3.3-V and 1.8-V outputs and provides an open drain, active low, 120-ms delayed RESET output. Therefore, the application on this EVM is designed to provide a complete power management solution for battery powered DSP, ASIC, and other digital applications where two independent supply voltages are required. The TPS60120EVM174 from TI provides a convenient method for evaluating this dual power supply solution as well as the individual operation of the TPS60120 dc/dc converter and the TPS70751 dual LDO regulator. 1.4 Adjustment by Switch and Jumpers The schematic for the EVM is provided in Figure 1-2. S1 Toggleswitch S1 is used to enable or disable the TPS S2 Push button switch S2 is connected to the manual reset input of the TPS Depressing the button will cause the RESET output of the dual regulator to toggle. JP1 Jumper JP1 is used to select the input voltage for the charge pump as either the external power supply or the battery pack as labeled on the board. TP1 Test point TP1 can be used to measure the output voltage of the charge pump. Introduction 1-5
12 Schematic 1.5 Schematic Figure1 2 shows the TPS60120EVM-174 schematic diagram. Figure 1 2. TPS60120EVM-174 Schematic Diagram EXT. IN GND J1 1 2 JP1 BP1 + C1 22 µf OFF S1 ON C3 2.2 µf C2 0.1 µf R1 357 k R2 732 k 1 GND GND 20 2 GND GND 19 3 ENABLE LBI 18 4 FB LBO 17 5 OUT OUT 16 6 C1+ C IN IN 14 8 C1 C PGND PGND PGND PGND 11 PwrPad R3 3.3 k D1 Red Low Battery C4 2.2 µf C6 C5 22 µf 0.1 µf TP1 S2 Manual Reset TPS70751PWP 1 NC NC 20 2 VIN1 VOUT VIN1 VOUT MR1 VSENSE MR2 PGD_ SEQ VSENSE EN RESET 15 8 GND VOUT VIN2 VOUT VIN2 NC 11 PwrPad C7 C9 22 µf 0.1 µf C8 22 µf R4 249 k D2 BAT C µf J2 VOUT1 RESET VOUT2 GND 1-6 Introduction
13 Bill of Materials 1.6 Bill of Materials Table 1 2 lists materials required for the TPS60120EVM-174. Table 1 1. TPS60120EVM-174 Bill of Materials Ref Des Qty Part Number Description MFG Size BP1 1 BH2AA PC Battery holder, 2 AA cells, PC mount MPD C2, 6, 9, 10 4 GRM39X7R104K016 Capacitor, ceramic, 0.1 µf, 16 V, X7R murata 603 C3, 4 2 GMK316F225ZG Capacitor, ceramic, 2.2 µf, 35 V, Y5V+80/ 20% Taiyo-Yuden 1206 C1, 5, 7, 8 4 GRM235Y5V226Z010 Capacitor, ceramic, 22 µf, 10 V, Y5V, +80/ 20% murata 1210 D1 1 CMD28 21SRC/TR8 Diode, LED, red, 20 ma, 11.0 Chicago Mini CMD28 D2 1 BAT54 Diode, Schottky, 200 ma, 30 V Vishay-Liteon SOT23 J1 1 ED1660 Header, 2-pin, 5 mm spacing OST J2 1 ED1662 Header, 4-pin, 5 mm spacing OST JP1 1 PTC36SAAN Header, 3-pin, 100 mil spacing, (36 pin strip) Sullins R1 1 Std Resistor, chip, 375 kω, 1/10 W, 1% 805 R2 1 Std Resistor, chip, 732 kω, 1/10 W, 1% 805 R3 1 Std Resistor, chip, 3.3 kω, 1/10 W, 5% 805 R4 1 Std Resistor, chip, 250 kω, 1/10 W, 1% 805 S1 1 EG1218 Switch, 1P2T, slide, PC mount, 200 ma E_Switch S2 1 EVQ PJA04Q Switch, 1P1T, PB momentary, 50 ma Panasonic U1 1 TPS60120PWP IC, charge pump, regulated 3.3 V, 200 ma U2 1 TPS70751PWP IC, dual-output LDO regulators w/sequencing for DSP systems TP Test point, red, 1 mm Farnell TI TI PWP20 PWP20 Introduction 1-7
14 Board Layout 1.7 Board Layout Figure 1 3. Top Layer Figures 1 3 and 1-4 show the board layout for the TPS60120EVM-174. Figure 1 4. Bottom Layer (top view) 1-8 Introduction
15 Board Layout Figure 1 5. Assembly Introduction 1-9
16 Chapter 2 EVM Test Setup This chapter provides a recommended test setup. Figure 2 1 shows the test setup. Follow these steps for initial power up of the SLVP174: 1) Adjust the settings of the jumpers to fit test requirements. If the battery pack is selected as the input, install two AA alkaline batteries into the battery pack on the back of the board. If an external supply is selected as the input, connect another voltage source (e.g. power supply or external batteries) to the EXT INPUT and GND input pins of the board. The external voltage source should supply no more than 3.6 V, the maximum recommended input voltage for the TPS ) If desired, connect an external load to either or both outputs. The load should not exceed 200 ma on the 3.3-V charge pump output if it is the only loaded output. The load should not exceed 100 ma on either the 3.3-V or the 1.8-V output if both devices are loaded. Use of short leads on the external load will prevent loss of performance due to capacitive loading and/or inductive effects. 3) Connect measurement devices to the test points and output pins as desired. For a more precise measurement of noise and/or ripple at the output of the charge pump, use an ac-coupled oscilloscope with either a differential probe placed directly across the output capacitor (C5), or connect a regular scope probe with as short of a ground lead as possible across the output capacitor of the charge pump. Figure 2 1. Test Setup EVM Enable Power Supply + On/OFF Ext Input TPS60120EVM 174 SLVP174 2AA Input Dual Output DSP Power REV (B) 3.3 V Reset RESET Output + External Load ma GND Battery Low Battery 2000 Reset 1.8 V GND + External Load ma Low Battery Indicator Manual reset EVM Test Setup 2-1
17 2-2 EVM Test Setup
18 Chapter 3 Test Results This chapter presents laboratory test results for the TPS60120EVM-174. Topic Page 3.1 Test Results Test Results 3-1
19 Test Results 3.1 Test Results Figures 3 1 through 3 6 show the results of various test conditions using the TPS60120EVM-174. Figure 3 1. Start-Up Curves (TPS70751) Figures 3 1 shows the startup curves of the 3.3-V output (CH1) and 1.8-V output (CH2) of the EVM. Each at no load using switch SW1 to manually trigger start up. Figures 3 2 shows the same measurement as in Figure 3 1 except for a longer time period. It demonstrates the operation of the TPS70751 supervisory circuit RESET output (CH3). Figure 3 2. Start-Up Curves (TPS70751) Over an Extended Period 3-2 Test Results
20 Test Results Figures 3 3 shows the startup curves of the TPS60120, 3.3-V output( CH1), and the TPS70751, 3.3-V output (CH1) and 1.8-V output (CH2). Switch SW1 was disconnected and the TPS60120 ENABLE (CH3) pin was enabled using a pulse generator. Both TPS70751 outputs have 1 ma loads. The TPS60120 output is distorted due to the load on the charge pump from the charging of the TPS70751 output capacitors and the 1 ma loads. Figure 3 3. Start-Up Curves (TPS60120 and TPS70751) Figures 3 4 is the same as Figure 3 3 except that the TPS60120 (CH1) now has a 1 ma load and the Schottky diode between the TPS70751 has been removed. This figure shows the startup curves if no Schottky diode is used. Figure 3 4. Start-Up Curves(TPS60120 With a 1 ma Load and TPS70751) Test Results 3-3
21 Test Results Figures 3 5 shows an ac measurement of the TPS60120, 3.3-V output, with each TPS70751 output loaded with 100 ma. Figure 3 5. AC Measurements (TPS60120) Figures 3 6 shows an ac measurement of the TPS70751, 3.3-V output (CH1) and 1.8-V output (CH2), each loaded with 100 ma. The TPS V output capacitors provide some filtering of the TPS V output waveform shown in Figure 3 5. Figure 3 6. AC Measurements (TPS70751) 3-4 Test Results
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