Engineer-to-Engineer Note

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1 Engineer-to-Engineer Note EE-185 Technicl notes on using Anlog Devices DSPs, processors nd development tools Visit our Web resources nd or e-mil or for technicl support. Fst Floting-Point Arithmetic Emultion on Blckfin Processors Contributed by Centrl Apps Rev 4 August 23, 2007 Introduction Processors optimized for digitl signl processing re divided into two brod ctegories: fixed-point nd floting-point. In generl, the cutting-edge fixed-point fmilies tend to be fst, low power, nd low cost, while floting-point processors offer high precision nd wide dynmic rnge in hrdwre. While the Blckfin processor rchitecture ws designed for ntive fixed-point computtions, it cn chieve clock speeds tht re high enough to emulte floting-point opertions in softwre. This gives the system designer choice between hrdwre efficiency of floting-point processors nd the low cost nd power of Blckfin processor fixed-point devices. Depending on whether full stndrd conformnce or speed is the gol, floting-point emultion on fixed-point processor might use the IEEE-754 stndrd or fst floting-point (non-ieee-complint) formt. On the Blckfin processor pltform, IEEE-754 floting-point functions re vilble s librry clls from both C/C++ nd ssembly lnguge. These librries emulte floting-point processing using fixed-point logic. To reduce computtionl complexity, it is sometimes dvntgeous to use more relxed nd fster floting-point formt. A significnt cycle svings cn often be chieved in this wy. This document shows how to emulte fst floting-point rithmetic on the Blckfin processor. A two-word formt is employed for representing short nd long fst floting-point dt types. C-cllble ssembly source code is included for the following opertions: ddition, subtrction, multipliction nd conversion between fixed-point, IEEE-754 floting-point, nd the fst floting-point formts. Overview In fixed-point number representtion, the rdix point is lwys t the sme loction. While this convention simplifies numeric opertions nd conserves memory, it plces limit the mgnitude nd precision. In situtions tht require lrge rnge of numbers or high resolution, chngeble rdix point is desirble. Very lrge nd very smll numbers cn be represented in floting-point formt. Flotingpoint formt is bsiclly scientific nottion; floting-point number consists of mntiss (or frction) nd n. In the IEEE-754 stndrd, floting-point number is stored in 32-bit word, with 23-bit mntiss, n 8-bit, nd 1-bit sign. In the fst flotingpoint two-word formt described in this document, the is 16-bit signed integer, while the mntiss is either 16- or 32- bit signed frction (depending on whether the short of the long fst floting-point dt type is used). Normliztion is n importnt feture of flotingpoint representtion. A floting-point number is normlized if it contins no redundnt sign bits Copyright 2007, Anlog Devices, Inc. All rights reserved. Anlog Devices ssumes no responsibility for customer product design or the use or ppliction of customers products or for ny infringements of ptents or rights of others which my result from Anlog Devices ssistnce. All trdemrks nd logos re property of their respective holders. Informtion furnished by Anlog Devices pplictions nd development tools engineers is believed to be ccurte nd relible, however no responsibility is ssumed by Anlog Devices regrding technicl ccurcy nd topiclity of the content provided in Anlog Devices Engineer-to-Engineer Notes.

2 in the mntiss; tht is, ll bits re significnt. Normliztion provides the highest precision for the number of bits vilble. It lso simplifies the comprison of mgnitudes becuse the number with the greter hs the greter mgnitude; it is only necessry to compre the mntisss if the s re equl. All routines presented in this document ssume normlized input nd produce normlized results. There re some differences in rithmetic flgs between the ADSP-BF535 Blckfin processor nd the rest of the Blckfin processors. All of the ssembly code in this document ws written for the non-adsp-bf535 Blckfin processors. Short nd Long Fst Floting- Point Dt Types The code routines in this document use the twoword formt for two different dt types. The short dt type (fstflot16) provides one 16-bit word for the nd one 16-bit word for the frction. The long dt type (fstflot32) provides one 16-bit word for the nd one 32-bit word for the frction. The fstflot32 dt type is more computtionlly intensive, but provides greter precision thn the fstflot16 dt type. Signed twos-complement nottion is ssumed for both the frction nd the. Listing 1 Formt of the fstflot16 dt type typedef struct { short exp; frct16 frc; } fstflot16; Converting Between Fixed-Point nd Fst Floting-Point Formts There re two Blckfin processor instructions used in fixed-point to fst floting-point conversion. The first instruction, signbits, returns the number in number (i.e. the ). The second, shift, is used to normlize the mntiss. (fstflot16) nd the long version (fstflot32) is Listing 3 Fixed-point to short fst floting-point (fstflot16) conversion fstflot16 frct16_to_ff16(frct16); Input prmeters (compiler convention): R0.L = frct16 Output prmeters (compiler convention): R0.L = ff16.exp R0.H = ff16.frc _frct16_to_ff16:.globl _frct16_to_ff16; r1.l = signbits r0.l; // get the number r2 = -r1 (v); r2.h = shift r0.l by r1.l; // normlize the mntiss r0 = r2; _frct16_to_ff16.end: Listing 2 Formt of the fstflot32 dt type typedef struct { short exp; frct32 frc; } fstflot32; Fst Floting-Point Arithmetic Emultion on Blckfin Processors (EE-185) Pge 2 of 9

3 Listing 4 Fixed-point to long fst floting-point (fstflot32) conversion fstflot32 frct32_to_ff32(frct32); Input prmeters (compiler convention): R0 = frct32 Output prmeters (compiler convention): R0.L = ff32.exp R1 = ff32.frc _frct32_to_ff32:.globl _frct32_to_ff32; r1.l = signbits r0; // get the number r2 = -r1 (v); r1 = shift r0 by r1.l; // normlize the mntiss r0 = r2; _frct32_to_ff32.end: Converting two-word fst floting-point numbers to fixed-point formt is mde simple by using the shift instruction. (fstflot16) nd the long version (fstflot32) is Listing 5 Short fst floting-point (fstflot16) to fixedpoint conversion frct16 ff16_to_frct16(fstflot16); Input prmeters (compiler convention): R0.L = ff16.exp R0.H = ff16.frc Output prmeters (compiler convention): R0.L = frct16 _ff16_to_frct16:.globl _ff16_to_frct16; r0.h = shift r0.h by r0.l; // shift the binry point r0 >>= 16; _ff16_to_frct16.end: Listing 6 Long fst floting-point (fstflot32) to fixedpoint conversion frct32 ff32_to_frct32(fstflot32); Input prmeters (compiler convention): R0.L = ff32.exp R1 = ff32.frc Output prmeters (compiler convention): R0 = frct32 _ff32_to_frct32:.globl _ff32_to_frct32; r0 = shift r1 by r0.l; // shift the binry point _ff32_to_frct32.end: Fst Floting-Point Arithmetic Emultion on Blckfin Processors (EE-185) Pge 3 of 9

4 Converting Between Fst Floting-Point nd IEEE Floting-Point Formts The bsic pproch to converting from the IEEE floting-point formt to the fst floting-point formt begins with extrcting the mntiss,, nd sign bit rnges from the IEEE floting-point word. The needs to be unbised before setting the fst floting-point word. The mntiss is used with the sign bit to crete twos-complement signed frction, which completes the fst floting-point two-word formt. Reversing these steps converts fst flotingpoint number into IEEE floting-point formt. It is outside the scope of this document to provide more detil bout the IEEE-754 flotingpoint formt. The ttched compressed pckge contins smple C code to perform the conversions. The compressed pckge tht ccompnies this document contins smple routines tht convert between the fst floting-point nd the IEEE flotingpoint numbers. Note tht they do not tret ny specil IEEE defined vlues like NN, +, or -. Floting-Point Addition The lgorithm for dding two numbers in twoword fst floting-point formt is s follows: 1. Determine which number hs the lrger. Let s cll this number X (= Ex, Fx) nd the other number Y (= Ey, Fy). 2. Set the of the result to Ex. 3. Shift Fy right by the difference between Ex nd Ey, to lign the rdix points of Fx nd Fy. 4. Add Fx nd Fy to produce the frction of the result. 5. Tret overflows by scling bck the input prmeters, if necessry. 6. Normlize the result. (fstflot16) nd the long version (fstflot32) is For the fstflot16 rithmetic opertions (dd, subtrct, divide), the following prmeter pssing conventions re used. These re the defult conventions used by the Blckfin processor compiler. Clling Prmeters r0.h = Frction of x (=Fx) r0.l = Exponent of x (=Ex) r1.h = Frction of y (=Fy) r1.l = Exponent of y (=Ey) Return Vlues r0.h = Frction of z (=Fz) r0.l = Exponent of z (=Ez) Listing 7 Short fst floting-point (fstflot16) ddition fstflot16 dd_ff16(fstflot16,fstflot16); _dd_ff16:.globl _dd_ff16; r2.l = r0.l - r1.l (ns); // is Ex > Ey? cc = n; // negtive result? r2.l = r2.l << 11 (s); // gurntee shift rnge [-16,15] r2.l = r2.l >>> 11; if!cc jump _dd_ff16_1; // no, shift y r0.h = shift r0.h by r2.l; // yes, shift x jump _dd_ff16_2; Fst Floting-Point Arithmetic Emultion on Blckfin Processors (EE-185) Pge 4 of 9

5 _dd_ff16_1: r2 = -r2 (v); r1.h = shift r1.h by r2.l; // shift the y vlue 0 = 0; 0.l = r0.l; // you cn't do r1.h = r2.h r1.l = 0 (iu); // so use 0.x s n intermedite storge plce _dd_ff16_2: r2.l = r0.h + r1.h (ns); // dd frctionl prts cc = v; // ws there n overflow? if cc jump _dd_ff16_3; // normlize r0.l = signbits r2.l; // get the number r0.h = shift r2.l by r0.l; // normlize the mntiss r0.l = r1.l - r0.l (ns); // djust the // overflow condition for mntiss ddition _dd_ff16_3: r0.h = r0.h >>> 1; // shift the mntisss down r1.h = r1.h >>> 1; r0.h = r0.h + r1.h (ns); // dd frctionl prts r2.l = 1; r0.l = r1.l + r2.l (ns); // djust the _dd_ff16.end: For the fstflot32 rithmetic opertions (dd, subtrct, divide), the following prmeter pssing conventions re used. These re the defult conventions used by the Blckfin processor compiler. Clling Prmeters r1 = Frction of x (=Fx) r0.l = Exponent of x (=Ex) r3 = [FP+20] = Frction of y (=Fy) r2.l = Exponent of y (=Ey) Return Vlues r1 = Frction of z (=Fz) r0.l = Exponent of z (=Ez) Listing 8 Long fst floting-point (fstflot32) ddition fstflot32 dd_ff32(fstflot32, fstflot32); #define FF32_PROLOGUE() link 0; r3 = [fp+20]; [--sp]=r4; [--sp]=r5 #define FF32_EPILOGUE() r5=[sp++]; r4=[sp++]; unlink.globl _dd_ff32; _dd_ff32: FF32_PROLOGUE(); r4.l = r0.l - r2.l (ns); // is Ex > Ey? cc = n; // negtive result? r4.l = r4.l << 10 (s); // gurntee shift rnge [-32,31] r4.l = r4.l >>> 10; if!cc jump _dd_ff32_1; // no, shift Fy r1 = shift r1 by r4.l; // yes, shift Fx jump _dd_ff32_2; Fst Floting-Point Arithmetic Emultion on Blckfin Processors (EE-185) Pge 5 of 9

6 _dd_ff32_1: r4 = -r4 (v); r3 = shift r3 by r4.l; // shift Fy r2 = r0; _dd_ff32_2: r4 = r1 + r3 (ns); // dd frctionl prts cc = v; // ws there n overflow? if cc jump _dd_ff32_3; // normlize r0.l = signbits r4; // get the number r1 = shift r4 by r0.l; // normlize the mntiss r0.l = r2.l - r0.l (ns); // djust the // overflow condition for mntiss ddition _dd_ff32_3: r1 = r1 >>> 1; r3 = r3 >>> 1; r1 = r1 + r3 (ns); // dd frctionl prts r4.l = 1; r0.l = r2.l + r4.l (ns); // djust the _dd_ff32.end: Floting-Point Subtrction The lgorithm for subtrcting one number from nother in two-word fst floting-point formt is s follows: 1. Determine which number hs the lrger. Let s cll this number X (= Ex, Fx) nd the other number Y (= Ey, Fy). 2. Set the of the result to Ex. 3. Shift Fy right by the difference between Ex nd Ey, to lign the rdix points of Fx nd Fy. 4. Subtrct the frction of the subtrhend from the frction of the minuend to produce the frction of the result. 5. Tret overflows by scling bck the input prmeters, if necessry. 6. Normlize the result. (fstflot16) nd the long version (fstflot32) is Listing 9 Short fst floting-point (fstflot16) subtrction fstflot16 sub_ff16(fstflot16, fstflot16);.globl _sub_ff16; _sub_ff16: r2.l = r0.l - r1.l (ns); // is Ex > Ey? cc = n; // negtive result? r2.l = r2.l << 11 (s); // gurntee shift rnge [-16,15] r2.l = r2.l >>> 11; if!cc jump _sub_ff16_1; // no, shift y r0.h = shift r0.h by r2.l; // yes, shift x jump _sub_ff16_2; _sub_ff16_1: r2 = -r2 (v); r1.h = shift r1.h by r2.l; // shift y 0 = 0; 0.l = r0.l; // you cn't do r1.h = r2.h r1.l = 0 (iu); // so use 0.x s n intermedite storge plce _sub_ff16_2: Fst Floting-Point Arithmetic Emultion on Blckfin Processors (EE-185) Pge 6 of 9

7 r2.l = r0.h - r1.h (ns); // subtrct frctions cc = v; // ws there n overflow? if cc jump _sub_ff16_3; // normlize r0.l = signbits r2.l; // get the number r0.h = shift r2.l by r0.l; // normlize mntiss r0.l = r1.l - r0.l (ns); // djust // overflow condition for mntiss subtrction _sub_ff16_3: r0.h = r0.h >>> 1; // shift the mntisss down r1.h = r1.h >>> 1; r0.h = r0.h - r1.h (ns); // subtrct frctions r2.l = 1; r0.l = r1.l + r2.l (ns); // djust the _sub_ff16.end: Listing 10 Long fst floting-point (fstflot32) subtrction fstflot32 sub_ff32(fstflot32, fstflot32); #define FF32_PROLOGUE() link 0; r3 = [fp+20]; [--sp]=r4; [--sp]=r5 #define FF32_EPILOGUE() r5=[sp++]; r4=[sp++]; unlink.globl _sub_ff32; _sub_ff32: FF32_PROLOGUE(); r4.l = r0.l - r2.l (ns); > Ey? cc = n; // negtive result? // is Ex r4.l = r4.l << 10 (s); // gurntee shift rnge [-32,31] r4.l = r4.l >>> 10; if!cc jump _sub_ff32_1; // no, shift Fy r1 = shift r1 by r4.l; // yes, shift Fx jump _sub_ff32_2; _sub_ff32_1: r4 = -r4 (v); r3 = shift r3 by r4.l; // shift Fy r2 = r0; _sub_ff32_2: r4 = r1 - r3 (ns); // subtrct frctions cc = v; // ws there n overflow? if cc jump _sub_ff32_3; // normlize r0.l = signbits r4; // get the number r1 = shift r4 by r0.l; // normlize the mntiss r0.l = r2.l - r0.l (ns); // djust the // overflow condition for mntiss subtrction _sub_ff32_3: r1 = r1 >>> 1; r3 = r3 >>> 1; r1 = r1 - r3 (ns); // subtrct frctions r4.l = 1; r0.l = r2.l + r4.l (ns); // djust the _sub_ff32.end: Fst Floting-Point Arithmetic Emultion on Blckfin Processors (EE-185) Pge 7 of 9

8 Floting-Point Multipliction Multipliction of two numbers in two-word fst floting-point formt is simpler thn either ddition or subtrction becuse there is no need to lign the rdix points. The lgorithm to multiply two numbers x nd y (Ex, Fx nd Ey, Fy) is s follows: 1. Add Ex nd Ey to produce the of the result. 2. Multiply Fx by Fy to produce the frction of the result. 3. Normlize the result. (fstflot16) nd the long version (fstflot32) is Listing 11 Short fst floting-point (fstflot16) multipliction fstflot16 void mult_ff16(fstflot16, fstflot16);.globl _mult_ff16; _mult_ff16: r3.l = r0.l + r1.l (ns); 0 = r0.h * r1.h; r2.l = signbits 0; // get the number 0 = shift 0 by r2.l; // normlize the mntiss r0 = 0; r0.l = r3.l - r2.l (ns); // djust the _mult_ff16.end: Listing 12 Long fst floting-point (fstflot16) multipliction fstflot32 void mult_ff32(fstflot32, fstflot32); #define FF32_PROLOGUE() link 0; r3 = [fp+20]; [--sp]=r4; [--sp]=r5 #define FF32_EPILOGUE() r5=[sp++]; r4=[sp++]; unlink.globl _mult_ff32; _mult_ff32: FF32_PROLOGUE(); r0.l = r0.l + r2.l (ns); // dd the s // perform 32-bit frctionl multipliction (tken from VisulDSP++ compiler implementtion) r2 = pck(r1.l, r3.l); cc = r2; 1 = r1.l * r3.l (fu); 1 = 1 >> 16; 1 += r1.h * r3.l (m), 0 = r1.h * r3.h; cc &= v0; 1 += r3.h * r1.l (m); 1 = 1 >>> 15; r1 = (0 += 1); r2 = cc; r1 = r2 + r1; // normlize r4.l = signbits r1; // get the number r1 = shift r1 by r4.l; // normlize the mntiss r0.l = r0.l - r4.l (ns); // djust the _mult_ff32.end: Summry The two-word fst floting-point technique described in this document cn gretly improve floting-point computtionl efficiency on the Fst Floting-Point Arithmetic Emultion on Blckfin Processors (EE-185) Pge 8 of 9

9 fixed-point Blckfin Processor pltform. The specific opertions described bove cn be used s stndlone routines, or s strting points for more dvnced clcultions specific to prticulr ppliction. The compressed source code pckge tht ccompnies this document provides strting for using the fst flotingpoint method in new projects. References [1] Digitl Signl Processing Applictions: Using the ADSP-2100 Fmily (Volume 1) Anlog Devices, Inc. [2] The Art of Computer Progrmming: Volume 2 / Seminumericl Algorithms. Knuth, D.E. Second Edition,1969. Addison- Wesley Publishing Compny. [3] IEEE Stndrd for Binry Floting-Point Arithmetic: ANSI/IEEE Std Institute of Electricl nd Electronicsd Engineers. Document History Revision Rev 4 August 23, 2007 by Tom L. Rev 3 My 26, 2003 by Tom L. Rev 2 My 12, 2003 by Tom L. Rev 1 Februry 19, 2003 by Tom L. Description Corrected the mult_ff32 function; Updted formtting Code updted to check for overflow conditions; New test cses dded. Updted ccording to new nming conventions Initil Relese Fst Floting-Point Arithmetic Emultion on Blckfin Processors (EE-185) Pge 9 of 9