L A STEP DOWN SWITCHING REGULATOR L4971

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1 L A STEP DOWN SWITCHING REGULATOR UP TO 1.A STEP DOWN CONVERTER OPERATING INPUT VOLTAGE FROM 8V TO V PRECISE 3.3V (±1%) INTERNAL REFER- ENCE VOLTAGE OUTPUT VOLTAGE ADJUSTABLE FROM 3.3V TO V SWITCHING FREQUENCY ADJUSTABLE UP TO KHz VOLTAGE FEEDFORWARD ZERO LOAD CURRENT OPERATION INTERNAL CURRENT LIMITING (PULSE-BY- PULSE AND HICCUP MODE) INHIBIT FOR ZERO CURRENT CONSUMP- TION PROTECTION AGAINST FEEDBACK DIS- CONNECTION THERMAL SHUTDOWN SOFT START FUNCTION DESCRIPTION The L4971 is a step down monolithic power switching regulator delivering 1.A at a voltage between 3.3V and V (selected by a simple external divider). Realized in BCD mixed technology, the device uses an internal power D-MOS transistor (with a typical Rdson of.ω) to obtain very high efficency and high switching speed. TYPICAL APPLICATION CIRCUIT Minidip SO16W ORDERING NUMBERS: L4971 (Minidip) L4971D (SO16) A switching frequency up to KHz is achievable (the maximum power dissipation of the packages must be observed). A wide input voltage range between 8V to V and output voltages regulated from 3.3V to V cover the majority of today s applications. Features of this new generations of DC-DC converter include pulse-by-pulse current limit, hiccup mode for short circuit protection, voltage feedforward regulation, soft-start, protection against feedback loop disconnection, inhibit for zero current consumption and thermal shutdown. The device is available in plastic dual in line, MINIDIP 8 for standard assembly, and SO16W for SMD assembly. Vi=8V to V C 1 µf 63V C 7 nf R 1 K C.7nF 3 L L1 16µH (771) V O =3.3V/1.A C 1nF R 9.1K C 4 nf C 6 1nF D1 GI SB36 C 8 33µF D97IN748A May 1/1

2 BLOCK DIAGRAM VCC SS_INH COMP FB V THERMAL SHUTDOWN INHIBIT E/A OSCILLATOR VOLTAGES MONITOR SOFTSTART PWM INTERNAL INTERNAL 3.3V REFERENCE SUPPLY.1V R S Q DRIVE CBOOT CHARGE CBOOT CHARGE AT LIGHT LOADS 6 BOOT OSC GND OUT D97IN94 PIN CONNECTIONS 1 16 GND 1 GND SS_INH OSC OUT 1 8 FB COMP BOOT VCC SS_INH OSC OUT OUT FB COMP BOOT VCC D97IN9 8 9 Minidip D97IN96 SO16W PIN FUNCTIONS DIP SO (*) Name Function 1 GND Ground 3 SS_INH A logic signal (active low) disables the device (sleep mode operation). A capacitor connected between this pin and ground determines the soft start time. When this pin is grounded disables the device (driven by open collector/drain). 3 4 OSC An external resistor connected between the unregulated input voltage and this pin and a capacitor connected from this pin to ground fix the switching frequency. (Line feed forward is automatically obtained) 4, 6 OUT Stepdown regulator output 11 VCC Unregulated DC input voltage 6 1 BOOT A capacitor connected between this pin and OUT allows to drive the internal DMOS Transistor 7 13 COMP E/A output to be used for frequency compensation 8 14 FB Stepdown feedback input. Connecting directly to this pin results in an output voltage of 3.3V. An external resistive divider is required for higher output voltages. (*) Pins 1, 7, 8, 9, 1, 1 and 16 are not internally, electrically connected to the die. /1

3 THERMAL DATA Symbol Parameter Minidip SO16 Unit R th(j-amb) Thermal Resistance Junction to ambient Max. (*) 11 (*) C/W (*) Package mounted on board. ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit Minidip S16 V V 11 Input voltage 8 V V 4 V,V 6 Output DC voltage Output peak voltage at t =.1µs f=khz I 4 I,I 6 Maximum output current int. limit. V 6 -V V1-V V V 6 V 1 Bootstrap voltage 7 V V 7 V 13 Analogs input voltage (V CC = 4V) 1 V V V3 Analogs input voltage (VCC = 4V) 13 V V 8 V 14 (V CC = V) P tot Power dissipation a T amb 6 C Minidip 1 W SO16.8 W T j,t stg Junction and storage temperature -4 to 1 C -1 - V V V V ELECTRICAL CHARACTERISTICS (Tj = C, Cosc =.7nF, Rosc = kω, VCC = 4V, unless otherwise specified.) * Specification Refered to Tj from to 1 C Symbol Parameter Test Condition Min. Typ. Max. Unit DYNAMIC CHARACTERISTIC VI Operating input voltage range Vo = 3.3 to V; Io = 1.A * 8 V Vo Output voltage Io =.A V Io =. to 1.A V Vcc = 8 to V * V Vd Dropout voltage Vcc = 1V; Io = 1.A.44. V *.88 V Il Maximum limiting current Vcc = 8 to V *. 3 A Efficiency Vo = 3.3V; Io = 1.A 8 % fs Switching frequency * 1 11 KHz SVRR Supply voltage ripple rejection Vi = Vcc+VRMS; Vo = Vref; 6 db Io = 1.A; f ripple = 1Hz Voltage stability of switching Vcc = 8 to V 3 6 % frequency Temp. stability of switching frequency Tj = to 1 C 4 % Soft Start Inhibit Soft start charge current 3 4 µa Soft start discharge current µa VLL Low level voltage *.9 V IsLL Isource Low level * 1 µa 3/1

4 ELECTRICAL CHARACTERISTICS (continued) Symbol Parameter Test Condition Min. Typ. Max. Unit DC Characteristics Iqop Total operating quiescent 4 6 ma current Iq Quiescent current Duty Cycle = ; V FB = 3.8V. 3. ma Iqst-by Total stand-by quiescent current V inh <.9V 1 µa Vcc = V; V inh <.9V 1 3 µa Error Amplifier V FB Voltage Feedback Input V RL Line regulation Vcc = 8 to V 1 mv Ref. voltage stability vs temperature *.4 mv/ C VoH High level output voltage V FB =.V 1.3 V VoL Low level output voltage V FB = 3.8V.6 V Io source Source output current V comp = 6V; V FB =.V 3 µa Io sink Sink output current V comp = 6V; V FB = 3.8V 3 µa Ib Source bias current 3 µa SVRR E/A Supply voltage ripple rejection V comp =V fb ; Vcc = 8 to V 6 8 db DC open loop gain R L = 7 db gm Transconductance I comp = -.1 to.1ma V comp =6V. ms Oscillator Section Ramp Valley V Ramp peak Vcc = 8V.1.3 V Vcc = V V Maximum duty cycle 9 97 % Maximum Frequency Duty Cycle = % R osc = 13kΩ, C osc = 8pF khz 4/1

5 Typical Performance (Using Evaluation Board) fsw = 1kHz Output Voltage Output Ripple Efficiency VCC =3V IO = 1.A Line Regulation Io = 1.A VCC = 8 to V Load Regulation VCC =3V IO =. to 1.A 3.3V 1mV 84 (%) 3mV 6mV.1V 1mV 86 (%) 3mV 6mV 1V 1mV 93 (%) 3mV (VCC =1 to V) 4mV Figure 1. Test and valuation board circuit. Vi=8V to V C 1 µf 63V C 7 nf R 1 K C.7nF 3 L L1 16µH (771) V O =3.3V/1.A R 3 C 1nF C 4 nf R 9.1K C 6 1nF D1 GI SB36 C 8 33µF R 4 D97IN749A C1=µF/63V EKE C=.7nF C=1nF C6=1nF C7=nF/63V C8=33µF/3V CG Sanyo L1=16µH KoolMu Turns -.mm R1=K R=9.1K D1=GI SB36 L4971 V O (V) R3(KΩ) R4(KΩ) Figure. PCB and component layout of the figure 1. /1

6 Figure 3. Quiescent drain current vs. input voltage. Iq (ma) V O (V) Tamb= C % DC KHz R 1 =K C =1.nF 1KHz R 1 =K C =.7nF Hz D97IN Vcc(V) Figure. Stand-by drain current vs. input voltage Ibias (µa) Vss=GND V CC (V) Figure 7. Load regulation Tj=1 C Tj= C Tj=1 C Tj= C V CC =3V D97IN73 D97IN I O (A) Figure 4. Quiescent current vs. junction temperature Iq (ma) 4 3 fsw (KHz) 1 1 V CC =3V % DC KHz R 1 =K C =1.nF 1KHz R 1 =K C =.7nF Hz D97IN Tj( C) Figure 6. Line Regulation V O (V) V CC (V) Figure 8. Switching frquency vs. R1 and C.8nF 1.nF.nF 3.3nF Tj=1 C.6nF Tj= C 4.7nF Tamb= C D97IN733 D97IN R1(KΩ) 6/1

7 Figure 9. Switching Frequency vs. input voltage. fsw (KHz) D97IN73 Figure 1. Switching frequency vs. junction temperature. fsw (KHz) 1 D97IN78 1. Tj= C V CC (V) Figure 11. Dropout voltage between pin and 4. V (V) Tj=1 C Tj= C Tj=- C D97IN Tj( C) Figure 1. Efficiency vs output voltage. η (%) KHz KHz V CC =3V I O =1.A D97IN I O (A) V O (V) Figure 13. Efficiencyvs. output current. Figure 14. Efficiencyvs. output current. η (%) V CC =1V V CC =8V D97IN738 η (%) V CC =8V D97IN V CC =4V 8 8 V CC =1V V CC =4V 7 V CC =48V 7 V CC =48V 7 6 fsw=1khz V O =.1V 7 6 fsw=1khz V O =3.36V I O (A) I O (A) 7/1

8 Figure 1. Efficiencyvs. output current. Figure 16. Efficiencyvs. output current. η (%) V CC =8V D97IN74 η (%) D97IN741 V CC =1V V CC =8V 8 V CC =4V 8 V CC =1V V CC =48V fsw=khz V O =.1V V CC =4V V CC =48V fsw=khz V O =3.36V I O (A) I O (A) Figure 17. Efficiencyvs. Vcc. Figure 18. Power dissipation vs. Vcc. η (%) 8 V =.1V-f SW =1KHz D97IN74 Pdiss (mw) 8 V O =.1V fsw=1khz D97IN743 8 V =.1V-f SW =KHz V =3.36V-f SW =1KHz 6 I O =1.A I O =1A V =3.36V-f SW =1KHz 4 7 I O =1.A I O =.A V CC (V) V CC (V) Figure 19. Efficiencyvs. Vo. Pdiss (mw) 8 V CC =3V fsw=1khz D97IN744 Figure. Pulse by pulse limiting current vs. junction temperature. Ilim (A).9 fsw=1khz V CC =3V D97IN I O =1.A I O =1A I O =.A V (V) Tj( C) 8/1

9 Figure 1. Load transient. Figure. Line transient. V CC (V) 3 D97IN I O = 1A f sw = 1KHz V O (mv) 1 1ms/DIV -1 Figure 3. Soft start capacitor selection Vs inductor and Vccmax. L (µh) fsw=1khz 68nF D97IN74 47nF 33nF nf 1nF Figure 4. Soft start capacitor selection vs. Inductor and Vccmax. L D97IN746 (µh) 3 1 fsw=khz 6nF 47nF 33nF nf V CCmax (V) Figure. Open loop frequency and phase of error amplifier GAIN D97IN787 (db) Phase V CC max(v) GAIN Phase f(hz) 9/1

10 mm inch DIM. MIN. TYP. MAX. MIN. TYP. MAX. A OUTLINE AND MECHANICAL DATA a1.1. B b b D E e.4.1 e e F I.8. L Z 1..6 Minidip 1/1

11 DIM. mm inch MIN. TYP. MAX. MIN. TYP. MAX. OUTLINE AND MECHANICAL DATA A A B C D E e 1.7. H h L K (min.)8 (max.) SO16 Wide L hx4 A B e K H A1 C D 16 9 E /1

12 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics STMicroelectronics Printed in Italy All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. 1/1

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