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1 HTSSOP28 outline package; 28 leads; body width 4.4 mm; lead pitch 0.65 mm; exposed die pad 8 February 2016 Package information 1. Package summary Table 1. Package summary Terminal position code Package type descriptive code Package type industry code Package style descriptive code Package style suffix code Package body material type IEC package outline code JEDEC package outline code JEIT package outline code Mounting method type D (double) HTSSOP28 HTSSOP28 HTSSOP (thermal enhanced thin shrink small outline package) N (not applicable) P (plastic) MO-153 S (surface mount) Issue date Symbol Parameter Min Typ Nom Max Unit D package length mm E package width mm seated height [tbd] - [tbd] 1.1 mm 2 package height mm e nominal pitch mm n 2 actual quantity of termination
2 2. Package outline HTSSOP28: outline package; 28 leads; body width 4.4 mm; D E X c y exposed die pad side H E v Z D h Q E h pin 1 index L p θ 1 14 L e b p w detail X Dimensions (mm are the original dimensions) mm scale Unit b p c D (1) D h E (2) E h e H E L L p Q v w y Z (1) θ mm max nom min Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. sot1172-3_po Outline version References IEC JEDEC JEIT MO European projection Issue date Fig. 1. Package outline HTSSOP28 () ll information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V ll rights reserved Package information 8 February / 5
3 3. Soldering Footprint information for reflow soldering of HTSSOP28 package Hx Gx P nspx SPSx SPx Hy By nspy SPSy SLy SPy tot SPy Gy y SPx tot C D2 (4x) P1 D1 SLx Generic footprint pattern Refer to the package outline drawing for actual layout solder land solder land plus solder paste occupied area SPSx SPSy nspx nspy DIMENSIONS in mm P1 P2 y By C D1 D2 SLx SLy SPx tot SPy tot SPx SPy Gx Gy Hx Hy Issue date sot1172-3_fr Fig. 2. Reflow soldering footprint for HTSSOP28 () ll information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V ll rights reserved Package information 8 February / 5
4 4. Legal information Disclaimers Limited warranty and liability Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. ll information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V ll rights reserved Package information 8 February / 5
5 5. Contents 1. Package summary Package outline Soldering Legal information... 4 NXP Semiconductors N.V ll rights reserved For more information, please visit: For sales office addresses, please send an to: salesaddresses@nxp.com Date of release: 8 February 2016 ll information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V ll rights reserved Package information 8 February / 5
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