Chapter 5. Metal Oxide Semiconductor Field Effect Transistor Theory and Applications

Transcription

1 Chapter 5 Metal Oxide Semiconductor Field Effect Transistor Theory and Applications 5.0 ntroduction The metal oxide semiconductor field effect transistor MOSFET a voltage control current device. t differs from junction field effect transistor JFET that it has no pn junction structure. t has a metal gate, which insulates the conducting channel with silicon oxide SiO. n the modern design, metal gate has been replaced by either p + or n + polysilicon. There are two types of MOSFET namely depletion-enhancement E and enhancement E types. Figure 5.1 and 5. show the difference between the types. The E type has a narrow channel adjacent to the gate connecting the drain and source of the transistor. t can operate in either depletion mode or enhancement mode. The mode of operation is like the JFET. The E type does not have a narrow connecting channel. t operates by forming a conducting channel of the same type like the source and drain. The channel is formed either by attracting electron or depleting away electron to form an n-channel or p-channel connecting the source and the drain. MOSFET not only can be used to design amplification circuit. t can also be used as a capacitor and a resistor. This capability makes the VLS design simpler because there is no need to use other element for capacitor and resistor in the design. Figure 5.1: The structure of depletion-enhancement n-channel and p-channel MOSFET

2 Figure 5.: The structure of enhancement n-channel and p-channel MOSFET The symbol of both depletion-enhancement and enhancement MOSFET types are shown in Fig. 5.3 and 5.4 respectively. Note that for most cases, by design the substrate is connected to the source. Symbols other then those symbols shown in Fig. 5.3 and 5.4 are used too. The reader needs to identify them careful during any circuit analysis. Circuit examples shown in this chapter will use any symbol listed in Fig. 5.3 and Fig. 5.4 as illustration. (a) n-channel (b) p-channel Figure 5.3: Symbol of depletion-enhancement MOSFET (a) n-channel (b) p-channel Figure 5.4: Symbol of enhancement MOSFET

3 5.1 epletion-enhancement MOSFET and Enhancement MOSFET The transfer characteristic of depletion-enhancement E and enhancement E MOSFETs are shown in Fig. 5.5 and 5.6 respectively. The characteristic curve of E type is same as the JFET except there is an additional enhancement part, where the curve extends to positive V i.e. attract either hole or electron. n depletion mode, electron in n-channel or hole in p- channel is depleted away. n enhancement mode, electron is attracted in n- channel and hole in p-channel. (a) n-channel (b) p-channel Figure 5.5: Transfer characteristic of E MOSFET The equation for the transfer characteristics of depletion-enhancement E MOSFET is same the JFET which is V = SS 1 (5.1) V(off ) where SS is normally given by data sheet. f the design parameters are given then SS is defined as 1 W SS = µ ncox V(off ) (5.) L

4 where L is channel length, W is width of the gate, C ox is capacitance of oxide per unit area, and µ n is the effective mobility of electron, which has a nominal value 650cm /V-s at 5 o C. Enhancement MOSFET uses only channel enhancement. f the drain and source are n-type, the gate is biased with positive voltage to attract electron from the substrate near the oxide to form an n-type conducting channel. Likewise, E MOSFET type has p-type drain and source, the gate is biased with negative voltage to form a p-type conducting channel. (a) n-channel (b) p-channel Figure 5.6: Transfer characteristic of E MSOFET There is a minimum gate-to-source voltage to be applied before conducting channel can be formed. This gate-to-source voltage is called threshold voltage and is denoted as V (th). The threshold voltage V (th) is used to overcome the flat band potential, surface potential, fixed charge, and oxide capacitance C ox of the gate before inversion can be occurred. A typical -V S characteristic curve of an n-channel MOSFET for the selected V is shown in Fig There are three regions - the cut-off region, the triode region (or almost linear region) and saturation region (operation region). The saturation region is the useful region for an amplifier operation, whereas the other regions are good for switch operation. The curve also shows

5 that the output impedance is infinite, which is not true in reality. We shall discuss how to determine the finite output resistance later in the chapter. Figure 5.7: - V S characteristic curve of an n-channel MOSFET There are two equations of the transfer characteristics for enhancement MOSFET. At linear region, the equation is = K ( V V ) V V (5.3) (th) S 1 This equation is useful for MOSFET operating as a switch or digital device. We would not use it at the time being since we are interested with operation region. At saturation region (operation region), the equation is S

6 [ V ] = K V (5.4) (th) where K = which can be calculated based on the known value of [ V V ] (th) for given V and V (th). f the design parameters of the E MOSFET such as its channel length L, width of the gate W, and the capacitance of oxide C ox are known then 1 W 1 K = µ n Cox = β L (5.5) where µ n is the effective mobility of electron which has value 650cm /V-s and µ p is the mobility of hole which has 00cm /V-s. W/L is called the aspect ratio for a given MOSFET. β is the intrinsic transconductance parameter usually specified in SPCE MOSFET s model. ifferentiating equation (5.4) for drain current with respect to gate-tosource voltage V for a fixed drain-to source voltage V S yields the transconductance g m of the MOSFET. Therefore, g m d = dv = K V [ V ] (th) or g m d = = (5.6) dv [ V V ] (th) Example 5.1 The data sheet for a certain enhancement MOSFET states that drain current is = 3mA at V = 10V and V (th) = 5V. etermine the drain current for V = 8V. Solution From equation (5.4), 3mA K = = [ 10V 5V] 0.1mA / V

7 Thus, the drain current at V = 8 V is 0.1mA / V [ 8V 5V] 1.08mA =. = Example 5. The n-channel MOSFET shown in the figure operates with drain current = 0.4mA and V = 1.0V. The transistor has V (th) =.0V, µ n C ox = 0µA/V, L = 10µm and W = 400µm. etermine its drain resistance R and source resistance R S. Solution Equation (5.4) is used to determine the V for current equal to 0.4mA. Thus, an equation 0.4x10 = 0x10 (V ) is obtained. Solving this equation yields two values for gate-to-source voltage, which are V = 1.0V or 3.0V. Since V (th) =.0V, gate-to-source voltage V should be 3.0V. V = V G - V S = 3.0V and V G = 0, therefore V S = -3.0V. The source resistance is R S = and VS V SS 3 ( 5) = = 5kΩ 3 0.4x10 the drain resistance is R = V V 5 1 = 0.4x = 10kΩ

8 5. Biasing of MOSFET Figure 5.8 shows the biasing configuration of an n-channel and a p-channel MOSFET. For n-channel type MOSTFET NMOS, the gate is biased with positive voltage and the drain is biasing with positive voltage. For p-channel MOSFET PMOS, the gate is biased with negative voltage and the drain is biased with negative voltage. Note that the source is always common to both the gate-to-source and collector-to-source terminals. (a) n-channel biasing configuration (b) p-channel biasing configuration Figure 5.8: Biasing configuration of an n-channel and a p-channel MOSFET Notation The current flow between drain and source is termed drain or source current or S. The voltage at source is denoted as V S, at drain is denoted as V, and at gate is denoted as V G. The output resistance of MOSFET is denoted as r o and the drain-source resistance is denoted as r S epletion-enhancement MOSFET Biasing A simple normal biasing method for depletion-enhancement MOSFET is by setting gate-to-source voltage equal to zero volt i.e. V = 0V. This method of biasing enables ac signal to vary the gate-to-source voltage above and below this bias point as shown in Fig

9 Figure 5.9: E MOSFET transfer characteristic curve A depletion and enhancement MOSFET biased with V = 0 is shown in Fig Figure 5.10: A zero-biased E MOSFET

10 Example 5.3 Using the circuit shown in Fig. 5.10, determine the drain current and drain-tosource voltage V S given that V (off) = -8V, SS = 1mA, V = 15V, R G = 10MΩ and R = 600Ω. Solution From equation (5.1) the drain current is Since V = 0V then = SS = 1.0mA = SS V 1 V (off ) V S = V - R = 15.0V 1mA(600Ω) = 7.8V 5.. Enhancement MOSFET Biasing There are two standard methods that E MOSFET can be biased, which are shown in Fig (a) rain-feedback bias (b) Voltage divider bias Figure 5.11: rain feedback bias and voltage-divider bias for E MOSFET For drain feedback bias, the gate has very high impedance and negligible gate current. Therefore, the voltage drops across R G is negligible. i.e. V G 0. Since V S = V +V G, thus, V is equal to V S

11 For voltage-divider bias, V = 5 MOS Transistor Theory and Applications R R + 1 V R equal to voltage at gate V G since voltage at source V S = 0.. The voltage value is also Example 5.4 f a V voltage of 0.1V needs to be established for the design, what will be the value of R and effective resistance r S between drain and source of this NMOS? Given that V (th) = 1V and K = 1.0mA/V. Solution Since V = 0.1V, this shall mean that V S = 0.1V. This is also mean that the NMOS is operating at linear region because V S (V - V (th) ) - Refer to Fig. 5.7 Thus, from equation (5.3), = K ( V V ) V V = 1x10 3 (th) A / V 1 S S 1 (5 1) 0.1 x0.01 = 0.79mA The required drain resistance R value is R = V V S 5V 0.1V = 0.79mA = 6.kΩ

12 The effective resistance across the drain and source r S is r S VS 0.1V = = = Ω 0.79mA Example 5.5 Given that drain current is = 0.4mA, gate-to-source threshold voltage is V (th) = V, µ n C ox = 0µA/V, aspect ratio is 10, calculate the value for resistance R, drain voltage V, and effective channel resistance r S. Solution The gate and drain are tied together, therefore drain-to-gate voltage is V G = 0 V. The NMOS is operation in saturation region since V S > V V (th). Thus, saturation equation (5.4) is used for calculation. = K V [ V ] 1 (th) 6 0.4mA = 0x10 A / V 10[ V ] From the equation, it yields two values for gate-to-source voltage i.e. V = 0 or 4V. Since the threshold voltage V (th) is.0v, therefore the gate-to-source voltage V is 4.0V. V S = V V S = 4.0V

13 R = V V 10V 4V = 0.4mA = 15kΩ R S =V / = 4.0V/0.4mA = 10.0kΩ. 5.3 MOSFET as a Capacitor f the MOSFET is biased in accumulation mode, the MOS of MOSFET is acted as capacitor. The insulator oxide layer between the gate and the channel forms a parallel capacitor plate where its capacitance C i = ε LW sectional area, d i oxide thickness and ε i the permittivity of oxide. 5.4 MOSFET as a Resistor i d i, where LW is the cross f a MOSFET is connected as shown in Fig. 5.1, it has a variable resistance, 1 1 which depends on the V and V S bias. The ac resistance shall be ro. g m g m Figure 5.1: MOSFET connected as resistor and its characteristics 5.5 Small Signal Amplifier The transfer characteristic curve for depletion-enhancement MOSFET E MOSFET is shown in Fig The Q-point is set at V = 0 so that ac signal can be varied the gate-to-source above and below this Q-point

14 The transfer characteristic curve for enhancement MOSFET E MOSFET is shown in Fig The Q-point of E MOSFET cannot be laid on drain current axis because E MOSFET requires a minimum V voltage, which is termed as threshold voltage V (th) in order for operation. Figure 5.13: Transfer characteristics curve for enhancement MOSFET Equivalent Circuit for Enhancement MOSFET From Fig of JEFT equivalent circuit in Chapter 4, the output resistance r o of MOSFET is at least a few orders higher than the drain resistance R. Similar it is true for MOSFET. Practically there is no gate-to-source current. Thus, the gate-to-source resistance R in(gate) is extremely high such that it can be treated as open circuit, which is similar like the JFET. Thus, the ac equivalent circuit of MOSFET is similar to the JFET. Showing here is a number of equivalent circuits, which are useful for determining the small signal ac voltage gain later on. Fig and Fig show the equivalent circuits

15 Figure 5.14: MOSFET equivalent circuit using transconductance formula Figure 5.15: MOSFET equivalent circuit using formula 5.5. Finite Output mpedance of MOSFET Reference to the graph shown in Fig. 5.7, it states the drain current is independent of drain-to-source voltage V S at saturation (at the beginning of pinch-off) which shall mean that MOSFET has infinite output impedance r o. n reality this is not true. Theoretically, at pinch-off, the channel shape and pinchoff point do not change upon further applying drain-to-source voltage V S. n reality the shape of channel changed and pinch-off point moved away from the drain. The change modifies the effective channel length of the device, which is termed channel length modulation. The illustration is shown in Fig

16 Figure 5.16: Channel modulation caused by further increase of V S beyond pinch-off V S saturation voltage V SSat The voltage drop across the channel is V SSat = V -V (th). Any increase of V S voltage beyond V SSat (V S - V SSat ) will drop across L. This causes acceleration of electron from the channel to drain. From equation (5.4), is inversely proportional to the channel length L. Since channel length L decreases, current increases. Equation (5.4) shall then be modified to ( V V th ) ( 1 λvs ) µ ncoxw = + L ( ), where λ = 1/V M and V M is the Early voltage, which can be ranged from 0 to 00V. Figure 5.17 illustrates how Early voltage V M can be determined. Figure 5.17: The graph shows the Early voltage point

17 The graph in Fig shows that the output impedance r o of the MOSFET is now having a finite value, which can be defined as r O V = S V = M + V V cons tan t = S neglecting small V S voltage. V M V Analysis of MOSFET Amplifier M for a fixed V voltage after The amplifier configurations for MOSFET are same like the JFET's. The analysis of small-signal amplifier for E and E MOSFET is same like JFET. nstead of repeating the procedure of analysis, examples are used as illustrations. Example 5.6 A common-source amplifier shown in figure using a NMOS has = 5mA at V = 7.5V, V (th) = 5V, g m = 6mS, V in = 48mV rms, and V M = 50V. Find V,, V S, r S, R in, V out and ac voltage gain. Figure 5.18: A common source amplifier Solution Saince the source is grounded, the gate-to-source voltage is R 33kΩ V = V 15V = 6.19V R1 R = + 33kΩ + 47kΩ

18 Using equation (5.4), substitute V = 7.5V and V (th) = 5.0V, and = 5.0mA to determine the K values of the MOSFET, which is = K[ V V ]. Thus, the K value is K = 5mA /[ 7.5V 5V] = 0.8mAV The drain current at V = 6.19V is = 0.8mAV [ 6.19V 5V] 1.13mA = The drain voltage is V = V S = 15V mA x 3.3kΩ = 11.6V. The drain-tosource resistance r S is r S = V S / = 11.6V/1.13mA = 9.96 kω. The ac equivalent circuit of the amplifier is shown in figure below. (th) Figure 5.19: ac circuit of a common source amplifier The input impedance R in is equal to R 1 R = 47.0kΩ 33.0kΩ = 19.4kΩ. The output impedance r o is r o = V A / =50V/1.13mA = 44.6kΩ The output voltage is V out = -g m Vgs(r o R ) = 6.0mS x 3.07kΩ x V gs = 18.4V gs The input voltage is V in = V gs Therefore, the ac voltage gain is A V = V out /V in = -18.4V gs /V gs = -18.4V/V The output voltage is V out = - A V V in = x 48mV rms = V rms. Example 5.7 Calculate the ac voltage gain A v and input impedance R in of the amplifier circuit shown in figure. Given that K = 0.15mA/V, threshold voltage V (th) = 1.5V, and Early voltage V M = 75.0V

19 Figure 5.0: A drain feedback common source amplifier Solution The ac equivalent circuit is shown in figure. Figure 5.1: ac circuit of a drain feedback common source amplifier Using equation (5.4), which is = K[ V V ] (th) The drain current is = 0.15mA / V [ V 1. ] 5 Also, the drain voltage V S is V S = 15V - x 10.0kΩ

20 Since there is no current flow into the gate, the voltage across drain and gate shall be zero, thus, gate-to-source voltage is equal to drain voltage i.e. V = V S. Solving the above two equations, the drain current is = 1.06mA and drain voltage is V S = 4.4V. Using equation (5.3), which is equation K[ ( V V )] = (th). ifferentiating this equation to obtain transconductance, which is ( V ) = x0.15ma / V ( 4.4V 1.5V) 0.75mS g m K V (th) = The output impedance of the MOSFET is r o = V M / = 75V/1.06mA = 67.9kΩ The ac voltage gain A V is A V = - g m (R L r o R ) = mS x 4.66kΩ = -3.37V/V From the ac equivalent circuit shown in Fig. 5.1, the input current i i is i i = (V in -V out )/R G The input impedance R in is R in = V in /i i = V in R G /(V in - V out ) V = out R G / 1 Vin = 10x10 6 /( ) =.8MΩ. One will also see that the input impedance R in is also equal to the Miller s input resistance, which is defined as R G (1 + A V ), for this amplifier. Example 5.8 esign the amplifier circuit shown in figure below that its transistor operates in saturation region with = 0.5mA and V = 3.0V. The enhancement-type PMOS transistor have V (th) = -1.0V and K = 0.5mA/V. What is the largest value of R can have while maintaining saturation-region operation? Note that normally R G1 and R G are in MΩ range

21 Figure 5.: A common drain amplifier Solution Using eqution (5.4), which is = K(V V (th) ). Substituting = 0.5mA, K = 0.5mA/V, and V (th) = -1.0V, the gate-to-source voltage V of the PMOS shall be ±1.0V 1.0V, which are 0V or -.0V. Since the threshold voltage of the PMOS is -1.0V, therefore, its gate-to-source voltage V should be.0v. Since gate-to-source voltage is V = V G - V S then the gate votlage V G shall be V G = V + V S = -.0V + 5.0V = 3.0V. Thus, the ratio of R G1 and R G shall be :3. Thus the value of R G1 And R G can be.0 MΩ and 3.0MΩ. The resistance value of drain resistor R shall be V / = 3.0V/0.5mA = 6.0kΩ. For the PMOS to maintain in saturation mode, V S V SG - V SG(th) =.0V 1.0V = 1.0V. This shall mean the drain voltage must be maintain within V V S 1.0V. Thus, the maximum drain voltage V max shall be V S -1.0V = 4.0V. Thus, the maximum value of drain resistor R = V / = 4.0V/0.5mA = 8.0kΩ for maintaining operating in saturation region

22 Example 5.9 The NMOS amplifier circuit shown in figure below has Early voltage V M = 50.0V, gate-to-source voltage V (th) = 0.9V and operates with drain voltage V =.0V. What is the voltage gain of this amplifier? f drain current is double, what will be the voltage gain? Figure 5.3: A drain feedback common source amplifier Solution Let s test to see which region the MOSFET is operating in. V S = V G + V Since gate current is very small thus, V G = 0 then V S = V V S V - V (th) Thus, the value of LHS > the value of RHS since V S = V and V (th) > 0V. Therefore, the MOSFET operates in saturation region. The ac equivalent circuit of this amplifier is shown in figure below

23 Figure 5.4: ac circuit of drain feedback common source amplifier From the theory discussed earlier, the voltage gain A V is A V = -g m (r o R L ) The output impedance r o of the MOSFET is r o at = 500.0µA is V M / = 50.0V/500.0µA = 100.0kΩ The drain-to-source voltage is V S = V G + V. Since V G = 0V and V S = 0V then the drain voltage shall be V = V S = V = V. Transconductance g m of the amplifier is g m = /(V - V (th) ) = x 500µA/(V - 0.9V) = 0.909mS Thus the voltage gain is A V = mS(100Ω 10kΩ) = -8.6V/V When is double to 1mA, r o = 50V/1.0mA = 50.0kΩ From the saturation formula, = K ( V V, the constant K (th) ) K = 500µA/ ( V 0.9V) = 0.413mA / V Thus, the saturation formula shall be = 0.413mA/V (V - 0.9V) f = 1.0mA then V = 0.65V or.46v. Certainly, V cannot be 0.65V since V (th) is 0.9V. Thus, V shall be.46v. The transconductance g m for V =.46V is

24 g m = x1ma.46v 0.9V = 1.8mS The voltage gain A V when = 1.0mA is A V = ms(50 kω 10 kω) = V/V 5.6 Multistage Amplifier MOSFET and JFET share the same ac equivalent circuit. Therefore, the way to analyse the multistage amplifier is same as the way how to analyse the multistage amplifier of the JFETs. We shall discuss a multistage amplifier that contains both bipolar junction transistor and MOSFET device here. Figure 5.5 shows a cascaded amplifier that contains both bipolar junction transistor and MOSFET. Figure 5.5: A cascoded BiMOS amplifier circuit The voltage gain of the first stage n-channel MOSFET amplifier is - g m R, when g m is the transconsductance that follows equation (5.6) g d m = =. However, owing to loading effect from the bipolar dv [ V V(th) ]

25 junction transistor amplifier stage, the load of this amplifier shall be R R 3 R 4 {(β+1)v T / E }. Thus, voltage gain A V1 of n-channel MOSFET amplifier stage shall be A V1 = [ R R R { β + 1)V / ] 3 4 T E (5.7) V V (th) The voltage gain A V of second stage is A V = αr C E (5.8) V T The overall gain A V of the amplifier shall be A V = A V1 xa V, which is A V = [ R R R { β + 1)V / ] 3 V 4 V (th) T E αr C E (5.9) V T Tutorials 5.1. State the difference in terms of voltage biasing and output characterisitcs between a depletion-enhancement MOSFET and an enhancement MOSFET. 5.. State the conditions for an enhancement MOSFET to operate in triode and saturation regions. Given that = 0.75 ma, R = R S = 5.0 kω, and V (th) = 0.5 V. etermine the operation condition of the circuit below

26 5.3. For active load circuit below, given that R = 15.0kΩ. (i) What is the current and drain voltage V if the active load resistance of 5kΩ is desired? (ii) What is the gate to source voltage V for this circuit? 5.4. escribe how a MOSFET can be configured as a capacitor? Given that dielectric constant of SiO is 3.9, permittivity in free space ε 0 = x10-14 F/cm, W = 00µm, L = 10µm, and thickness of oxide d i = 100 A o, calculate the capacitance The NMOS circuit shown figure has K = 0.5x10-3 A/V, threshold voltage V (th) = V, R G1 = 4.7MΩ, R G =. MΩ, R =.kω, and R S = 500Ω. etermine the values of V,, and V S

27 5.6. The common source amplifier is shown in the figure has V (th) = 3V and K = 1mA/V. Find V,, V and the ac output voltage. f a load R L of 3.3kΩ is connected at the output what is the ac current in the load? 5.7. The depletion MOSFET shown in the circuit is required to supply the variable resistor R with a constant current of 100.0µA. f the threshold voltage is V = -1.0V. Find the range of resistor R can have while the current through it remains constant at 100.0µA

28 5.8. Calculate the ac voltage gain and output voltage of the BiMOS amplifier shown the figure. References 1. Theodore F. Bogart Jr., Jeffrey S. Beasley, and Guillermo Rico, Electronic evices and Circuit, sixth edition, Prentice Hall, Adel S. Sedra and Kenneth C. Smith, "Microelectronic Circuits", fourth edition, Oxford University Press, Robert L. Boylestad, and Louis Nashelsky, Electronic evices and Circuit Theory, eighth edition, Prentice Hall,