ECEN 248 Introduction to Digital Systems Design (Spring 2008) (Sections: 501, 502, 503, 507)


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1 ECEN 48 Introduction to Digital Systems Design (Spring 8) (Sections: 5, 5, 5, 57) Pro. Xi Zhang ECE Dept, TAMU, N WERC
2 Chapter 6. Multiplexers
3 to multiplexer s s (a) Graphical symbol (b) Truth table s s (c) Sumoproducts circuit (d) Circuit ith transmission gates Figure 6.. A to multiplexer.
4 4to multiplexer s s s s (a) Graphic symbol s s (c) Circuit (b) Truth table Figure 6.. A 4to multiplexer.
5 4to multiplexer implemented by to multiplexer s s Figure 6.. Using to multiplexers to build a 4to multiplexer.
6 6to multiplexer s s Building 6to multiplexer by using our 4to multiplexers s s 5 Figure 6.4. A 6to multiplexer.
7 A practical application o multiplexers s s x y x y s x y x y x x (a) A x crossbar sitch x s x y y y y (b) Implementation using multiplexers Figure 6.5. A practical application o multiplexers.
8 Implementing programmable sitches in an FPGA / / Storage cell i i i i (a) Part o the FPGA in Figure.9 / / Storage cell (c) Implementation using multiplexers Figure 6.6. Implementing programmable sitches in an FPGA.
9 Chapter 6.. Synthesis o Logic Functions Using Multiplexers
10 Synthesis o a logic unction using multiplexers (b) Modiied truth table (a) Implementation using a 4to multiplexer Not eicient (c) Circuit More eicient Figure 6.7. Synthesis o a logic unction using multiplexers.
11 Threeinput majority unction by using a 4to multiplexer (a) Modiied truth table (b) Circuit ninput Majority unction: The output is i more than hal inputs are ; Otherise, the output is equal to. Figure 6.8. Implementation o the threeinput majority unction using a 4to multiplexer.
12 Threeinput XOR by to multiplexers (a) Truth table (b) Circuit Figure 6.9. Threeinput XOR implemented ith to multiplexers.
13 Threeinput XOR implemented ith a 4to multiplexer (a) Truth table (b) Circuit Figure 6.. Threeinput XOR unction implemented ith a 4to multiplexer.
14 Chapter 6.. Multiplexer Synthesis Using Shannon s Expansions
15 Multiplexers synthesis using Shannon s Expansion ( + ) ( ) + (b) Truth table (b) Circuit Figure 6.. The threeinput majority unction implemented using a to multiplexer.
16 Synthesis or ( ) + ( + ) ( ) + ( ) + ( ) + ( ) (a) Using a to multiplexer (b) Using a 4to multiplexer Figure 6.. The circuits synthesized in Example 6.6.
17 Figure 6.. The circuit synthesized in Example 6.7 Synthesis or input majority unction ( ) ( ) ( ) ( ) h and g Let + ( ) ( ) ( ) ( ) h g + +
18 Circuits Ex. 6.8 by using input lookup table ( + ) + ( + + ) (a) Using three LUTs Figure 6.4. Circuits synthesized in Example 6.8
19 Circuits Ex. 6.8 by using input lookup table ( + ) + ( + ) Oberserving based on DeMorgan's We need only to lookup tables, theorem 4 (b) Using to LUTs Figure 6.4. Circuits synthesized in Example 6.8
20 Chapter 6. Decoders
21 Decoders y n inputs n n outputs Enable En y n Figure 6.5. An nto n binary decoder.
22 to4 decoder En y y y y y x x y (a) Truth table y En y y y y En (c) Logic circuit y (b) Graphical symbol Figure 6.6. A to4 decoder.
23 to8 decoder by using to4 decoders y y y y y y En y y En y y 4 y y En y y 5 y 6 y 7 Figure 6.7. A to8 decoder using to to4 decoders.
24 y y En y y y y y y En y y y En y y y En y y y y y En y y 4 y 5 y 6 y 7 y 8 y 9 y y y y y En y y y y 4 y 5 Figure 6.8. A 4to6 decoder built using a decoder tree.
25 Using decoder to build multiplexer s s y y y En y Figure 6.9. A 4to multiplexer built using a decoder.
26 Demultiplexer Multiplexer The purpose o Multiplexer is to multiplex the n data inputs onto the single data output under control o the select inputs. Demultiplexer Perorm the opposite unction o the multiplexer. Place the value o a single data input onto multiple data outputs. Can be implemented by using a decoder circuit.
27 Example: to4 demultiplexer by using to4 decoder Input to determine hich output is set equal to En y y Output y Serve as data input En (c) Logic circuit y
28 Sel / / / Sel / / / Address a a a m m to m decoder Sel / / / Sel m / / / Read Data d n d n d Figure 6.. A m x n readonly memory (ROM) block.
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