LABORATORY 1 IDENTIFICATION OF CIRCUIT IN A BLACK-BOX

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1 LABOATOY IDENTIFICATION OF CICUIT IN A BLACK-BOX OBJECTIES. To idntify th configuration of an lctrical circuit nclosd in a two-trminal black box.. To dtrmin th valus of ach componnt in th black box circuit. INFOMATION In this xprimnt th componnts of a simpl circuit (insid a black box) will b idntifid basd on thir rspons to dc voltags and ac voltags of diffrnt frquncis. Fiv simpl circuits will b invstigatd:. sistanc in sris with diod Figur... sistanc in sris with Znr diod Figur.. 3. sistanc in paralll with a capacitor Figur Inductor in paralll with a capacitor Figur sistanc in sris with a paralll combination of inductor and capacitor- Figur.5. Not : Th valu of th rsistanc is at last 00Ω D Dz Figur. Figur. C C L Figur.3 Figur.4 C L Figur.5 -

2 Th following proprtis of diffrnt circuit componnts ar xploitd in dtrmining th circuit configuration: A rsistanc is a bilatral dvis and conducts in a similar mannr in ithr dirction. A diod conducts only if forward biasd byond a crtain spcific voltag (0.7 for silicon diod). A znr diod bhavs lik a normal diod whn forward biasd. Whn rvrs biasd it conducts byond a spcific voltag, known as znr voltag. In stady stat an inductor acts lik a short circuit for dc voltags and ac voltags of vry low frquncis. With ac voltags of vry high frquncis it acts lik an opn circuit. Furthr, an inductor is a bilatral dvic. In stady stat a capacitor acts lik an opn circuit for dc voltags and ac voltags of vry low frquncis. With ac voltags of vry high frquncis it acts lik a short circuit. A capacitor is also a bilatral dvic. EQUIPMENT. Digital multimtr (Fluk 800A, BK PECISION 83B). Digital oscilloscop Tktronix TDS 0 3. Function Gnrator Wavtk FG3B. 4. Phas mtr. 5. DC voltag supply 6. POTO-BOAD PB-503 (bradboard) 7. Black box. 8. sistor kω, 0 kω PE-LABOATOY PEPAATION Thr is no spcific pr-laboratory prparation for this lab xrcis. Familiariz yourslf with th laboratory procdur bfor attnding th lab sssion. Th circuits in black boxs will b idntifid by xamining thir prformanc during th following tsts.. Impdanc Tst Th impdanc of th circuit is masurd both in forward and rvrs dirction using a digital multimtr.. DC Tst A known dc voltag dc is applid across th circuit and th currnt is masurd. Th polarity of th voltag is rvrsd and th currnt is masurd again. A currnt limiting rsistor kω is always insrtd in sris with th circuit to rstrict currnt to saf lvls, as it is shown in Figur.6. -

3 BLACK BOX I dc o. Figur.6. Circuit for DC Tst 3. AC Tst An ac voltag of fixd magnitud in is applid across th circuit as shown in Figur.7. A currnt limiting rsistor is insrtd in sris with th circuit to constrain th currnt within saf valus. Th sourc frquncy is varid from a vry low (0Hz) to a vry high ( MHz) frquncy. For diffrnt frquncis th output voltag o and th phas diffrnc Θ btwn input and output voltags ar rcordd. BLACK BOX. I o Θ in. Figur.7. Circuit for AC Tst 4. BEHAIOU OF DIFFEENT CICUITS Circuit. sistanc in sris with diod D Figur.. Impdanc tst Finit rsistanc only in forward dirction Opn circuit in rvrs dirction DC Tst Conducts whn diod is forward biasd I o dc Equation (.) -3

4 whr unknown rsistor currnt limiting rsistor of kω Dos not conduct for larg ngativ polarity voltags (i.. lss than 0). AC Tst Conducts only in positiv half cycl. Circuit. sistanc in sris with znr diod Dz Figur.. Impdanc tst Finit rsistanc only in forward dirction. Opn circuit in rvrs dirction. DC Tst Conducts whn diod is forward biasd For larg ngativ polarity voltags (i.. mor than 6) currnt I flows and is givn by Equation (.) whr z znr voltag. I o dc z Equation (.) + AC Tst Conducts in positiv half cycl voltag. Conducts in ngativ half cycl voltag only whn voltag magnitud is highr than znr voltag. Circuit 3. sistanc in paralll with a capacitor C Figur.3. Impdanc tst Finit rsistanc will b masurd, which is sam in both dirctions. DC Tst Circuit conducts for both polaritis of dc voltag. o dc I Equation (.3) + AC Tst ry low frquncis: o and in hav sam phas but diffrnt magnituds. ry larg frquncis: o and in hav sam phas and magnituds. At any intrmdiat frquncy ωπf -4

5 in I + jωc o Equation (.4) in 0 o Θ or Equation (.5) + + jωc whr, o output voltag rms in intput voltag rms unknown rsistanc C unknown capacitanc currnt limiting rsistor Θ phas diffrnc btwn input and output trminals, as masurd by phas mtr. Circuit 4. Inductor L in paralll with a capacitor C Figur.4. Impdanc tst Finit rsistanc will b masurd, which is sam in both dirctions. DC Tst Circuit conducts for both polaritis of dc voltag. Th conductd currnt is dscribd by th Equation (.3). AC Tst ry low frquncis: o and in hav sam phas and magnituds. ry larg frquncis: o and in hav sam phas and magnituds. At any intrmdiat frquncy ωπf in I + ( jωl) jωc o Equation (.6) or in 0 jωl + ω LC o Θ Equation (.7) also Θ tan ωl ( ω LC) Equation (.8) -5

6 whr, L unknown inductor C unknown capacitanc Θ phas diffrnc btwn input and output trminals, as masurd by phas mtr. At rsonant frquncy ω ο πf o impdanc of black box circuit bcoms infinit and currnt gos to zro. Also th phas of output voltag changs it s sign. ω LC 0 Equation (.9) 0 ω 0 πf 0 Equation (.0) LC Circuit 5. sistor in sris with a paralll combination of Inductor L and capacitor C Figur.5. Impdanc tst Finit rsistanc will b masurd, which is sam in both dirctions. DC Tst Circuit conducts for both polaritis of dc voltag. Th conductd currnt is dscribd by th Equation (.3). AC Tst ry low frquncis: o and in hav sam phas but diffrnt magnituds. ry larg frquncis: o and in hav sam phas but diffrnt magnituds. At any intrmdiat frquncy ωπf or in I ( + ) + ( jωl) jωc in 0 o Θ jωl ω LC ( + ) + o Equation (.) Equation (.) ωl also ( )( ) Θ tan Equation (.3) + ω LC whr, L unknown inductor C unknown capacitanc unknown rsistanc Θ phas diffrnc btwn input and output trminals, as masurd by phas mtr. -6

7 . At rsonant frquncy ω ο πfo impdanc of black box circuit bcoms infinit and currnt gos to zro. Also th phas of output voltag changs its sign. ω LC 0 Equation (.4) 0 ω 0 πf 0 Equation (.5) LC POCEDUE *) Not down th numbr of th black box circuit that you ar providd for valuation and mak sur to rcord it in your rport. Us th multimtr to prform an impdanc tst of th black box circuit, to idntify if thr is a diod or znr prsnt.. To prform a dc tst on th givn black box, connct th dc powr supply and th xtrnal rsistor kω, as shown in Figur.6. St th dc 0 and masur th output voltag o. If your black box circuit contains diod or znr diod, us Equations (.) and (.) to dtrmin th valus of and z. If no diod or znr diod prsnts, obtain th valu of circuit rsistanc as vidnt from circuit bhaviour. 3. Prform th ac tst as shown in Figur.8 and plot th frquncy rspons for a widly varying rang of frquncis. St function gnrator FG to provid in and obsrv both input and output signals using th oscilloscop. CH CH PHASE METE CH BLACK BOX CH CH FG in GND CH k o GND OSCILLOSCOPE CH CH GND Figur.8. AC tst masurmnts 4. For ach of th slctd frquncis rad th MS voltag of th in ( CH) and out (CH) from th oscilloscop display and rcord th data in Tabl.. For th sam frquncis rcord th Phas Mtr radings (display will show th phas angl btwn ths two signals in [dg]). For ach of th masurmnts calculat th voltag gain in A v -7

8 out A Equation (.6). in f [Hz] in [] out [] Θ[dg] A v k k 5k 0k 0k 50k 00k 00k 500k M Tabl.. Black box frquncy rspons 5. Obsrv if any rsonanc occurs in th circuit. This is vidncd by a output currnt and o dcrasing to a vry low lvl and th output signal phas changing its sign. 6. Us th rlvant formulas for diffrnt circuits to comput th circuit paramtrs. Do your calculations for thr diffrnt frquncis and obtain avrag consistnt rsult. EPOT Writ a systmatic rport of how you idntifid th circuit configuration valus. Mak sur to includ th black box # in your rport Not: You must copy/print th Signatur and Marking Sht from your manual bfor coming to th lab sssion. -8

9 SIGNATUE AND MAKING SHEET LAB To b compltd by TA during your lab sssion Studnt Nam: TA Nam: Studnt # : Chck boxs Task Max. Marks Pr-lab compltd 0 Grantd Marks TA Signatur Impdanc Tst compltd 5 DC tst compltd 5 AC Tst compltd 5 Componnt valus calculations 5 Ovrall port Prparation 80 TOTAL MAKS 00-9

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