# Fig. 2 shows a simple step waveform in which switching time of power devices are not considered and assuming the switch is ideal.

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1 CHAPTER 3: ANAYSIS OF THREE-EE INERTER In this chapter an analysis of three-level converter is presented by considering the output voltage waveform in order to determine the switching angle of power devices. As a result of this a fundamental voltage is achieved. Besides, the harmonic elimination technique has been presented with considering on-off switching time to analyse the output voltage waveform and harmonic content in different modes. Fig. 1 One phase leg of a three-level inverter The fig.1 shows a schematic diagram of one phase leg of a three-level inverter, in which the power semiconductors is represented for ideal switch with several position. In this circuit the dc bus voltage is split into three levels by connecting two series capacitors C 1 and C 2. The middle point of the two capacitors can be defined as a neutral point. As a result of this the three-level converter generates an output voltage with three values: dc /2,, and - dc /2 corresponding to point 1, 2 and 3. Fig. 2 shows a simple step waveform in which switching time of power devices are not considered and assuming the switch is ideal. Fig. 2 Output voltage waveform of quasi-square waveform of three-level inverter Page 1

2 3.1 Mathematical analysis of optimize harmonic elimination technique Fourier analysis for output voltage Any periodic waveform can be represented as composed of the superposition of dc component with a fundamental sine-wave component, together with pure sine-waves known as harmonics at the frequencies which are the multiple of fundamental frequency (Sen, 1988). Mathematical expression of a non-sinusoid wave is as the following: ( t) cos( t ) cos(2 t )... cos( nt ) (3.1) n n Where: (t) is the instantaneous value at any time t is the value of dc component n is the value of n th harmonic components θ n is the relative angular reference It is well-documented that: Acos( t ) Acos tcos Asin tsin ; Put a Acos b Asin Acos( t ) acos t bsin t Therefore, cos( nt ) a cos nt b sin nt (3.2) n n n n Alternatively, the equation (3.1) can be expressed as the following ( t) a cos nt b sin nt n n1 n1 n The general expression of Fourier series of quasi-square wave is given as: ( t) ( an cos nt bn sin nt ) (3.3) n1 Where: is the direct (or mean) value. a n, b n are called the Fourier coefficients. From the waveform of fig. 2, it is clear that = Page 2

3 The R.M.S voltage is calculated by T 1/2 1 2 ( rms) ( t) dt T 1/ dt ( ) dt /2 1/2 2 (3.4) To obtain a n T 1 an ( t)cos( nt ) d( t) T 2 1 cos( nt) d( t) cos( nt) d( t) 2 sin( nt) sin( nt) n sin( n n ) sin n sin(2 n n ) sin( n n ) n sin( n n ) sin( n n ) sin n sin 2n cos n cos 2n sin n ) n (2 sin cos ) sin sin n n n n n Due to sin n for all value of n (n=1,2,3 ) cos 2n 1 It can be concluded that there is no cosine term To obtain b n T 1 bn ( t)sin( nt ) d( t) T Page 3

4 2 1 sin( nt ) d( t) sin( nt ) d( t) cos( ) cos( ) n nt nt 2 cos( n n ) cos n cos(2 n n ) cos( n n ) n cos( n n ) cos( n n ) cos n cos 2 n cos n sin 2 n sin n n 2 cos n cos n 2 cos n n 2 cos 1 cos n n n (3.5) Here 1 cos n for n =2, 4, 6.even n 1 cos n 2 for n =1, 3, 5.odd n Therefore equation (3.5) is only valid with all odd n and it becomes: b 4 n n cosn (3.6) Hence the Fourier series of the output voltage will be 4 n1 n ; for n is odd value (3.7) ( t) cos n sin nt The R.M.S output voltage 2 2 rms ( t) cos n ; for n =1,3,5 (3.8) n1 n The output waveform characteristic: - Even harmonics are absent Page 4

5 4 - With n =1 bn cos. This value is known as the amplitude of fundamental voltage and it can be controlled by varying the switching angle α. The harmonics can also be control by adjusting α. For example, if α=3 (or α=π/6), the value of third harmonic component of output will be zero, due tob n cos. To be more precise, all the multiple of third harmonics (n=3, 9, 15 ) are eliminated from the waveform The output current for R load The general output current wave form for R load is illustrates in fig.3 Fig. 3 The output current of R load Calculate the value of resistance and inductance of the load In this case it is assumed that the output current is limited 1A and the time constant τ=r/ (s) is ten times greater than the period of a cycle T. The input voltage dc =2 and fundamental frequency is 5Hz, so T =.2ms. The switching angle α is chosen to eliminate 3 th harmonic. Thus α = π/3 and then pulse width δ = 2π/3. R 1 Time constant 1T s R.2 Page 5

6 From the equation (3.8), the general expression of R.M.S value of output voltage is 2 2 rms ( t) cos n n1 n The fundamental voltage (first harmonic, n=1) ( rms) ( t) cos cos The total impedance of circuit Z R X (3.9) Due to X >> R, ignoring the resistance Therefore, the total reactance X 1(rms) (3.1) I 1 Substitute R=.2 and (3.1) to (3.9) Then R=.124Ω, =.25H Calculate the load current Since resistance is ignored, there is only inductive load. As a result of this, the output current wave form can be expressed as the following dc/2 I1 2π 3 i(t) π 6 5π 6 π 7π 6 11π 6 2π -I1 -dc/2 2π 3 t1 i1(t) i2(t) i3(t) i4(t) t2 t3 t4 t5 Fig. 4 Output voltage and output current of inductive load circuit Page 6

7 Consider the time from t 1 to t 2 ( = dc/2 =1) di (3.11) dt di dt Integrating, I1 t2 di dt I1 t1 I (t 2 t 1) (6.661 ) A (3.12) The current at time t (t 1 t t 2 ), t 1 = 1.67ms, t 2 = 8.33ms i1 (t) t di dt i1 (t) ( t t1) I1 I1 t1 (3.13) i 1 A (t) (t ) i (t) 4 t 2 A (1.67ms t 8.33ms) (3.14) 1 Consider the time from t 2 to t 3 ( = ) di dt It means that the current i 2 (t) is constant with 8.33ms t 11.67ms. Hence i 2 (t) = I 1 =133.2A. Consider the time from t 3 to t 4 ( = - dc/2 = -1) di (3.15) dt di dt The current at time t (t 3 t t 4 ), t 3 = 11.67ms, t 4 = 18.33ms i4 (t) t di dt i4 (t) ( t t3) I1 I1 t3 (3.16) i (t) (t1.671 ) A Page 7

8 i (t) 4 t 6 A (11.67ms t 18.33ms) (3.17) 3 Consider the time from t 4 to t 5 ( = ) (18.33ms t 21.67ms) di dt It means that the current i 4 (t) constant is constant with 18.33ms t 21.67ms. Hence i 4 (t) = -I 1 = A. In summary, the output current of inductive load is the sum of all the current at each interval time from t 1 to t 5. It is expressed as the following i(t) = i 1 (t) + i 2 (t) + i 3 (t) + i 4 (t) Where i 1 (t) 4t 2A i (t) A 2 i (t) 4 t 6( A ) 3 i (t) A 4 The general expression of output voltage waveform 4 ( t) cos n sin nt() n1 n 6 (3.18) This function is valid for odd n, and all triplen harmonics are eliminated from the output voltage, (n = 1, 5, 7, 11 ). 2 2 rms ( t) cos n ( ) (3.19) n1 n 6 Current at 1 st harmonic I 1 1(rms) 2 2 n cos X n nx (A) 1.25 Page 8

9 Current at 5 th harmonic I cos 5(rms) 5 5X (A) (The negative sign is dropped for R.M.S value) The result of currents at n th harmonics are shown in the table 1 Table 1 Result of harmonic output current with δ = 12 Harmonic order 1 st 5 st 7 st 11 st 13 st 17 st 19 st R.M.S oltage () R.M.S Current (A) 99.3 (1%) 3.97 (4.1%) 2.3 (2.4%).82 (.83%).587 (.59%).343 (.35%).275 (.28%) The plot of the harmonic output current is shown in the fig Spectrum of square wave (δ= 12 ) Harmonic Current (A) harmonic order Fig. 5 Harmonic of spectrum current of three-level inverter with δ=12 Page 9

10 3.3 Simulation result In this part the three-level diode-clamped is taken into consideration to validate of the switching time control method. The three-level diode clamped topology is shown in the fig.6. Instead of using tow capacitors, two dc sources are employed to generate the output value. The output voltage has three-state: dc /2, and - dc /2. For the level of dc /2, switches S1 and S 2 need to be turned on. For the zero level, switches S 2 and S 3 is turned on. For the dc /2, the switches S 3 and S 4 need to be turned on. The switching state of power devices is shown in the table 2, in which 1 denotes on state and denotes off state. S1 dc/2 D1 S2 D2 S3 R oad -dc/2 S4 Fig. 6 One phase leg three-level diode clamped topology Table 2 Switching state of three-level diode clamped Output voltages S 1 S 2 S 3 S 4 dc / dc /2 1 1 The switching pattern of four switches is illustrated in the fig.7. In this case, the delay switching angle for power device is chosen to eliminate the 3 th harmonic and triplen harmonics, so α is π/6 (or 3 ) and the pulse width is 2π/3 (or 12 ). The switching cycle is 2ms. Page 1

11 Fig. 7 Switching pattern of power devices (S 1, S 2, S 3, S 4 ) of three-level diode clamped The circuit of one leg single phase three-level diode clamped converter is shown in the fig.8 Fig. 8 One leg single phase three-level diode-clamped converter in Matlap/simulation Page 11

12 1 5 voltage () time (ms) Fig. 9 Output voltage waveform current () time (ms) Fig. 1 Output current waveform 1 voltage and current times (ms) Fig. 11 Output current and output voltage waveform Page 12

13 As can be seen from the fig.9, the output voltage is exactly three levels, corresponding to dc /2 = 1,, dc /2 = -1. Another thing that should be taken into consideration is a minor change of voltage at the end of the cycle at which the voltage is in zero level. This is due to the fact that when all switches are in off-state the inductor starts discharging. The effect of this inductor voltage can be limited by choosing the value of inductance is much greater than that of resistance so that the time constant is much longer than off-time of switches. Fig.12 shows the Fourier analysis of output current. As can be seen from the FFT analysis result, there is no even harmonic, 3 th harmonic and all triplen harmonics. This result is as same as the mathematical analysis in part 1. Elimination 3 th harmonic by controlling delay angle is achieved. Selected signal: 5 cycles. FFT window (in red): 2 cycles Time (s) 1 Fundamental (5Hz) = 14.3, THD= 4.65% Mag (% of Fundamental) Harmonic order Fig. 12 Fourier analysis of output current in Matlap/simulink Page 13

14 Fig. 13 Fourier anaysis of output current The statistics in fig.13 indicate that the result of simulation is exactly the same the result of calculation with - R.M.S fundamental current I rms = 99.2A - The average current is 133.2A - The harmonic current is as same as the table 1 (the result of calculation). Page 14

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