ELEC 6740 Electronics Manufacturing Chapter 7: Design for Manufacturability, Testing & Repair
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1 ELEC 6740 Electronics Manufacturing Chapter 7: Design for Manufacturability, Testing & Repair R. Wayne Johnson Auburn
2 Outline! DFM Organizational Structure! General Design Considerations! Component Selection Considerations for Manufacturability! Soldering Considerations! Interpackage Spacing Considerations! Via Hole Considerations! Soldermask Considerations! Repairability Considerations! Cleanliness Considerations! Testability Considerations
3 DFM Organizational Structure! Sequential design vs. concurrent engineering Physical layout Manufacturing Test Design Physical layout Logic design Manufacturing Product engineers Design Reliability enginesrs Test Process engineers
4 General Design Considerations! Standard form factor (board size, shape, tooling holes)! Odd shapes can require special fixtures, etc.! Standard assembly panel size vs. board size!optimization of boards per assembly panel!optimization of assembly panels per PWB panel!l/w < 1.5
5 Scoring of Panels
6 Fiducials or Alignment Marks
7 Fiducials or Alignment Marks
8 Component Selection! Use surface mount components that solve real estate constraints or reduce the number of manufacturing steps and bear no cost premium.! All surface mount components should be autoplaceable! Tantalum caps with welded studs! Connectors! Heat sinks! Sockets
9 Component Selection! Components terminations with solder plating are better than solder dipped! Select only components that can withstand the reflow temperatures! Use 1206 and 0805 components when possible, 0603, 0402 & 0201 components are harder to place! Use X7R capacitors rather than Z5U when using wave soldering to avoid cracking
10 Component Selection! Do not wave solder capacitors larger than 1812 to avoid cracking! Do not use ceramic parts larger than on FR-4 4 to avoid CTE mismatch and potential reliability concerns! Use marked components if no cost premium! For secondary side attachment in Type II or Type III SMT use low profile SOT devices instead of high profile SOTs.. Low profile are easier for adhesive attachment, but high profile are easier to clean
11 Component Selection! Avoid using MELF packages unless very cost driven (MELF package cheaper)! Use Nickel barrier terminated capacitors and resistors to prevent leaching of termination into molten solder! Avoid surface mount connectors & sockets without over riding reasons
12 Component Selection! Use qualified parts! Minimize the different types of components
13 Soldering Considerations
14 ! Options Soldering Considerations! Double sided reflow + hand soldering! Reflow side 1 & wave solder side 2! May degrade reliability of side 2 SMT components during wave solder! Flux can creep into SOIC and PLCC packages! Double sided reflow with DIP using butt joints! Reliability of butt joint! Not permitted for military and high reliability applications! Double sided reflow with paste-in in-hole! Reflow side 1 & wave solder side 2 with shield
15 Wave Solder Shield
16 Solder Shield! Stainless Steel or Titanium! Titanium expensive & hard to machine but holds shape better for repeated use! Aluminum or copper shield contaminates solder pot! High temperature plastics and composites are also used
17 Savings by Converting SMT
18 No Savings by Converting
19 Other Soldering Considerations! Place larger components on top (2 nd ) reflow side when using double sided reflow! Wave solder is not cheaper than reflow so wave solder can be considered if only SMT passives on 1 side! Wave solder fills plated through holes allowing vacuum to hold board down for automated test
20 Component Orientation
21 Component Orientation
22 Component Orientation
23 Component Orientation
24 Component Orientation
25 Component Orientation
26 Interpackage Spacing! Use land patterns described in Chapter 6! For mixed assemblies, autoinsert equipment requires about clearance for through hole devices! About to clearance is needed for automated and hand probe testing! The interpackage spacing must allow for test probe at ATE.
27 Interpackage Spacing! Automated cleaning with adequate pressure nozzles (>30psi)! Component shift during reflow soldering and placement may be up to 25% of the pad width for military and 50% for commercial applications! Solder joint melting of adjacent components is allowed a total of 4 times (2 for assembly and 2 for rework)! Visual inspection ( board tilting)
28 Interpackage Spacing
29 Interpackage Spacing
30 Interpackage Spacing
31 Interpackage Spacing
32 Interpackage Spacing
33 Via Holes! Number decreased with switch to SMT, but did not go away! SMT vias are smaller than Through Holes for components! Vias are used for test probe contact! Vias must be filled (solder or solder mask) for vacuum used in bed-of of-nails ATE.! Vias should not be used in SMT pads! Via hole location a concern in reflow due to limited solder volume, but not in wave solder
34 Via Holes
35 Via Holes
36 Via Holes
37 Tented Vias
38 ! Dry film Tented Vias! Should not be used between pads of chip components! thick can lead to tombstoning! Thinner dry film can be used! Allows tenting
39 ! Wet film Tented Vias! Thinner, allows traces to be run between pads of passive components! Vias must be plugged before tenting! Increases adhesive bond strength, and minimizes voids during adhesive cure
40 Solder Mask! Solder mask should not be used over Sn/Pb!Solder melts during reflow causing solder mask to crack entrapping flux and moisture! SMOBC solder mask over bare copper
41 Repairability! Hand repair! Automated systems with hot air! Maximum of 2 rework cycles to limit Sn-Cu intermetallic formation
42 Repairability
43 Repairability
44 Testability
45 Testing! In through hole technology, all leads are accessible on the bottom side of the board! With SMT, test points must be provided for in- circuit test! Test point take up space! No test point, no in-circuit test! Functional vs. In-circuit
46 ATE! Use 1 test point (TP) for ground and 1 TP for power for every 10 ICs to reduce risk of ringing! Connect all unused pins to ground or power via a resistor to improve quality of test! Whenever possible, avoid double sided test probe approach to reduce fixturing and cost! One TP is needed for every test node unless 100% capability is needed for individual components
47 ATE! Test point spacings should be whenever possible. Probes for smaller spacings are fragile and prone to damage! For smaller TPs (under 30 mils dia.) deposit solder paste on the TPs to form bumps for ease of probing with serrated test probes! Flux residue can interfere with probe contact
48 ATE
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