Octal 3-State Noninverting D Flip-Flop High-Speed Silicon-Gate CMOS

Transcription

1 TECHNICAL DATA IN74AC374 Octal 3-State Noninverting D Flip-Flop High-Speed Silicon-Gate CMOS The IN74AC374 is identical in pinout to the LS/ALS374, HC/HCT374. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALS outputs. Data meeting the setup and hold time is clocked to the outputs with the rising edge of the Clock. The Output Enable input does not affect the states of the flip-flops, but when Output Enable is high, the outputs are forced to the high-impedance state; thus, data may be stored even when the outputs are not enabled. Outputs Directly Interface to CMOS, NMOS, and TTL Operating oltage Range: to 6. Low Input Current: µa; 25 C High Noise Immunity Characteristic of CMOS Devices Outputs Source/Sink 24 ma ORDERING INFORMATION IN74AC374N Plastic IN74AC374DW SOIC T A = -4 to 85 C for all packages PIN ASSIGNMENT LOGIC DIAGRAM FUNCTION TABLE PIN 2= CC PIN 1 = GND Output Enable Inputs Output Clock D Q L H H L L L L L,H, X no change H X X Z X = don t care Z = high impedance 426

2 MAXIMUM RATINGS Symbol Parameter alue CC DC Supply oltage (Referenced to GND) -.5 to +7. IN DC Input oltage (Referenced to GND) -.5 to CC +.5 OUT DC Output oltage (Referenced to GND) -.5 to CC +.5 I IN DC Input Current, per Pin ±2 ma I OUT DC Output Sink/Source Current, per Pin ±5 ma I CC DC Supply Current, CC and GND Pi ±5 ma P D Power Dissipation in Still Air, Plastic DIP+ SOIC Package+ Tstg Storage Temperature -65 to +15 C T L Lead Temperature, 1 mm from Case for 1 Seconds (Plastic DIP or SOIC Package) 75 5 Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditio. +Derating - Plastic DIP: - 1 mw/ C from 65 to 125 C SOIC Package: : - 7 mw/ C from 65 to 125 C mw 26 C RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Max CC DC Supply oltage (Referenced to GND) 6. IN, OUT DC Input oltage, Output oltage (Referenced to GND) CC T J Junction Temperature (PDIP) 14 C T A Operating Temperature, All Package Types C I OH Output Current - High -24 ma I OL Output Current - Low 24 ma t r, t f Input Rise and Fall Time (except Schmitt Inputs) IN from 3% to 7% CC CC = CC = CC = / This device contai protection circuitry to guard agait damage due to high static voltages or electric fields. However, precautio must be taken to avoid applicatio of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, IN and OUT should be cotrained to the range GND ( IN or OUT ) CC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or CC ). Unused outputs must be left open. 427

3 DC ELECTRICAL CHARACTERISTICS(oltages Referenced to GND) CC Guaranteed Limits Symbol Parameter Test Conditio 25 C -4 C to IH Minimum High-Level Input oltage IL Maximum Low - Level Input oltage OH Minimum High-Level Output oltage OUT = or CC - OUT = or CC - I OUT -5 µa IN = IH or IL I OH =-12 ma I OH =-24 ma I OH =-24 ma OL Maximum Low-Level Output oltage I OUT 5 µa I IN I OZ I OLD I OHD Maximum Input Leakage Current Maximum Three- State Leakage Current +Minimum Dynamic Output Current +Minimum Dynamic Output Current IN = IH or IL I OL =12 ma I OL =24 ma I OL =24 ma IN = CC or GND ± ± µa IN (OE)= IH or IL IN = CC or GND OUT = CC or GND ±.5 ± µa OLD =1.65 Max 75 ma OHD =3.85 Min -75 ma I CC Maximum Quiescent Supply Current (per Package) IN = CC or GND 8. 8 µa All outputs loaded; thresholds on input associated with output under test. +Maximum test duration ms, one output loaded at a time. Note: I IN and I are guaranteed to be less than or equal to the respective CC 428

4 AC ELECTRICAL CHARACTERISTICS(C L =5pF, Input t r =t f = ) CC Guaranteed Limits Symbol Parameter 25 C -4 C to f max Maximum Clock Frequency (Figure 1) t PLH Propagation Delay, Clock to Q (Figure 1) t PHL Propagation Delay, Clock to Q (Figure 1) t PZH t PZL t PHZ t PLZ Min Max Min Max C IN Maximum Input Capacitance pf MHz C, CC = C PD Power Dissipation Capacitance 8 pf oltage Range is ±.3 oltage Range is ±.5 TIMING REQUIREMENTS(C L =5pF, Input t r =t f = ) CC Guaranteed Limits Symbol Parameter 25 C -4 C to t su t h Minimum Setup Time,Data to Clock (Figure 3) Minimum Hold Time, Clock to Data (Figure 3) t w Minimum Pulse Width, Clock (Figure 1) oltage Range is ±.3 oltage Range is ±

5 Figure 1. Switching Waveforms Figure 2. Switching Waveforms Figure 3. Switching Waveforms EXPANDED LOGIC DIAGRAM 43