Material aspects in power technologies from failure analysis to material testing
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1 Material aspects in power technologies from failure analysis to material testing M. Nelhiebel Kompetenzzentrum für Automobil und Industrieelektronik (KAI) Automotive Division / Quality Management, Infineon Technologies Villach, Austria EUFANET Dresden,
2 Motivation and purpose Growing segment of the power semiconductor market for automotive and industrial applications Area shrinks imply increasing transient peak junction temperatures (>400 C in the silicon!) Technology solutions target metallization-stack and interconnect Thus, technology development partially turns into mechanical material engineering and physical analysis, as an essential development support, must adapt accordingly Page 2
3 outline Power pulses and area shrinks of power semiconductor devices corresponding temperatures, and how to survive Failure vs degradation, destructive vs non-destructive analysis Defects in thick metallization layers Relevance and detectability Material parameters of metals and dielectrics Microstructure of metal layers Grains, phases, contaminands Measuring mechanical parameters Metals, dielectrics New materials, new approaches decapsulation revisited conclusion Page 3
4 Example for active power pulses: Smart power switch operated into a fault condition for car applications Load (e.g. flash lights) ~ 4 A ~ 70 A Fault! e.g. short circuit Cable resistances & inductances ~80 mv ~0.3 W 8.65 mm 4 mm ~40 V ~1-3 kw ~ µs high low high low Nelhiebel, EMPA t t Page 4
5 Subsequent power-device shrinks in the last ~12 years for same application 12.8 x 10.3 mm x 6.0 mm x 10.3 mm x2.140mm x3.402mm x3.145mm 2 2x 30m 2x12.2 mm 2 2x 20 m 7.8 mm 2 2x 25 m 13.3 mm Nelhiebel, EMPA Page 5
6 Realistic power pulse and corresponding temperatures of a smart power switch surface of the sun: 63 W/mm 2 continuous! Nelhiebel, EMPA Page 6
7 Little information by failure spot analysis of end-of-life tested samples Smart Power Technology, 3 metal layers (AlCu), Planar PowerMOS metal 3 Smart Power Technology, 2 metal layers (AlCu), Trench PowerMOS metal 2 metal 1 silicon conclusion: it was too hot Page 7
8 Schematic of active cycling degradation DMOS temperature > 550 C < 400 C insufficient robustness of technology Increasing peak-temperature by cumulated damage - systematic effect with intrinsic statistical scatter, driven by thermo-mechanical stress worst case T_peak 1st event worst case T_peak specified lifetime T_limit leading to immediate destruction of the DMOS-device by thermal runaway in the product- and load-specific pulse Shape +85 C worst case T_ambient Specified lifetime log stress (#pulses) Nelhiebel, EMPA Page 8
9 degradation phenomena due to power pulses Cracks in Cu power metal Severe plastic deformation (voiding) of AlCu power metal Al-based PowerMetal, 3M pulses Page 9
10 development: the power metal as heat buffer Thick power metals reduce the peak temperature and enable area shrinks Page 10
11 thick power metal for thermal management = relevance of metal cracks and voids Cracks in Cu power metal air gap Blocked heat transfer to copper increasing Si temperature thermal runaway +50 K in Si Thick metals gain importance when shrinking power MOSFETs for automotive and industrial applications Voids and cracks in thick metal layer stacks (including dielectrics and interconnect) are the relevant degradation phenomena Non-destructive analysis methods for such defects are required! Page 11
12 Non-destructive ways to find degradation induced metal voids and cracks? Example SAM intact power metal Flip device, remove lead frame Scanning transducer emitted wave melt-up Reflected waves as a function of local power metal aspect degraded power metal Nelhiebel et al, ESREF 2011 defects in power metal Poschgan et al, ESREF 2012 Page 12
13 outline Power pulses and area shrinks of power semiconductor devices corresponding temperatures, and how to survive Failure vs degradation, destructive vs non-destructive analysis Defects in thick metallization layers Relevance and detectability Material parameters of metals and dielectrics Microstructure of metal layers Grains, phases, contaminands Measuring mechanical parameters Metals, dielectrics New materials, new approaches decapsulation revisited conclusion Page 13
14 Effect of power cycles on copper grain microstructure (~100k pulses) initial Poly-heater test structure Thinning from backside, Large area FIB cuts through thick Cu stressed Page 14
15 Passive temperature cycles of Al layers on silicon (PhD thesis W. Heinz, KAI/Erich Schmid Institut Leoben, Prof. G. Dehm) 600nm polycrystalline Al 0 cycles cycles W. Heinz, R. Pippan, G. Dehm, Materials Science and Engineering A 527 (2010) nm epitaxial Al 0 cycles cycles Film stress at 25 C cycles cycles Benefit of epitaxial metal proven by SEM + EBSD Page 15
16 mechanical characterisation of copper (PhD thesis M. Smolka, KAI/Erich Schmid Institut Leoben, Prof. G. Dehm) EMRS 2011, Nice, France M. Smolka, C. Motz, T. Detzel, W. Robl, T. Griesser, A. Wimmer, er and G. Dehm (2012). Novel temperature dependent tensile test of freestanding copper thin film structures. Review of Scientific Instruments. 83 (6), Temperature dependent yield stress of a thin copper layer measured by micro-tensile tests RT 200 C 400 C 150 Stress (MPa) Stress (MPa) Ultimate tensile strength Yield stress Strain (%) Nelhiebel, EMPA Temperature ( C) Page 16
17 mechanical characterisation of copper (PhD thesis M. Smolka, KAI/Erich Schmid Institut Leoben, Prof. G. Dehm) 50 µm 100 µm Tensile direction Nelhiebel, EMPA Force measurement Heating 1 for samples + thermocouple Heating 2 for gripper + thermocouple Page 17
18 Micro tensile testing grain with bad orientation fail first E. Schmid, W. Boas, Plasticity of crstals, with special reference to metals (1935) Page 18
19 mechanical characterisation of dielectrics (PhD thesis K. Matoy, KAI/Erich Schmid Institut Leoben, Prof. G. Dehm) K. Matoy, H. Schönherr, T. Detzel and G. Dehm (2010). Micron-sized fracture experiments on amorphous SiOx films and SiOx/SiNx multi-layers. Thin Solid Films. 518 (20), K. Matoy, T. Detzel, M. Müller, C. Motz and G. Dehm (2010). Interface fracture properties of thin films studied by using the micro-cantilever fraction technique. Surface and Coatings Technology. 204 (6-7), Metal/dielectric adhesion measured by micro-cantilever tests Page 19
20 metallization stacks for thermomechanical robustness = relevance of material parameters Cracks in Cu power metal air gap crack and void initiation by thermomechanical stress as a function of material parameters of metals and dielectrics +50 K in Si Complex multilayer structures for power metallization and interconnect, exposed to violent thermal rises imply high thermomechanical stress Microstructure, contaminands and (possibly) intermetallic phases define material parameters and thus robustness Material parameters may change under stress methods for microstructure analysis and mechanical parameters are required Page 20
21 Semiconductor suitable methods for material parameter measurement? Example nanoindenter Laser heating for Temperature up to 500 C Localized measurement of mechanical properties Temperature dependent mechanical properties Compression / Tension / Bending test possible Adhesion Page 21
22 outline Power pulses and area shrinks of power semiconductor devices corresponding temperatures, and how to survive Failure vs degradation, destructive vs non-destructive analysis Defects in thick metallization layers Relevance and detectability Material parameters of metals and dielectrics Microstructure of metal layers Grains, phases, contaminands Measuring mechanical parameters Metals, dielectrics New materials, new approaches decapsulation revisited conclusion Page 22
23 Review: difficulties in decapsulation of copper-devices motivate inverse SAM Page 23
24 Advanced decapsulation procedures for copper based power metal stacks (J. Maynollo, IFAT QM FA) Copper metallization & copper bonds Organic solvant vs acidic decapsulation Anilin/ Indolin/ Aceton/Brij 35 Optimierte Säuredekapsulierung Page 24
25 conclusion Trend in automotive and industrial power semiconductors Power semiconductor devices get smaller and hotter Power metallization and interconnect stacks become thicker and more complex, involving new materials degradation modes are cracks and voids in the metallization/interconnect stack, blocking the heat transfer Mechanical robustness is achieved by material parameter engineering Requirements to FA Degradation analysis instead of failure analysis Nondestructive methods for the characterisation of voids, cracks and delaminations inside the metal/dielectric layers Mechanical material parameters of metals and dielectrics must be measured during development and production new analysis methods for new materials Page 25
26 Thank you for your attention Page 26
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