CP316 USART, SPI, and I 2 C Communication

Transcription

1 CP316, SPI, and I 2 C Communication Wilfrid Laurier University February 12, 2013

2

3 QwikFlash modules

4 QwikFlash modules ramifications???

5 QwikFlash modules ramifications??? interrupts; transmit and receive

6 QwikFlash modules ramifications??? interrupts; transmit and receive Sections to 6.4.7

7 QwikFlash modules ramifications??? interrupts; transmit and receive Sections to Section 8.2

8

9 2 wires, one-to-one

10 2 wires, one-to-one EIA232 (RS232)

11 2 wires, one-to-one EIA232 (RS232) Section 9.3

12 2 wires, one-to-one EIA232 (RS232) Section 9.3 registers

13 2 wires, one-to-one EIA232 (RS232) Section 9.3 registers Section 9.4.1

14 2 wires, one-to-one EIA232 (RS232) Section 9.3 registers Section asynchronous mode

15 2 wires, one-to-one EIA232 (RS232) Section 9.3 registers Section asynchronous mode Section 9.4.2

16 2 wires, one-to-one EIA232 (RS232) Section 9.3 registers Section asynchronous mode Section asynchronous mode to EIA232

17 2 wires, one-to-one EIA232 (RS232) Section 9.3 registers Section asynchronous mode Section asynchronous mode to EIA232 Section 9.4.5

18 2 wires, one-to-one EIA232 (RS232) Section 9.3 registers Section asynchronous mode Section asynchronous mode to EIA232 Section Section 16.0

19 EIA232 summary

20 EIA232 summary 2 wires (+ ground), one-to-one

21 EIA232 summary 2 wires (+ ground), one-to-one TX

22 EIA232 summary 2 wires (+ ground), one-to-one TX RX

23 EIA232 summary 2 wires (+ ground), one-to-one TX RX Fixed baud rate, common to both devices

24 EIA232 summary 2 wires (+ ground), one-to-one TX RX Fixed baud rate, common to both devices At least one start bit

25 EIA232 summary 2 wires (+ ground), one-to-one TX RX Fixed baud rate, common to both devices At least one start bit At least one stop bit

26 EIA232 summary 2 wires (+ ground), one-to-one TX RX Fixed baud rate, common to both devices At least one start bit At least one stop bit voltage levels not TTL; inverted (normally)

27 EIA232 summary 2 wires (+ ground), one-to-one TX RX Fixed baud rate, common to both devices At least one start bit At least one stop bit voltage levels not TTL; inverted (normally) (except TTL serial devices)

28 EIA232 summary 2 wires (+ ground), one-to-one TX RX Fixed baud rate, common to both devices At least one start bit At least one stop bit voltage levels not TTL; inverted (normally) (except TTL serial devices) packets are single characters

29 Qwikflash UART connections

30 Qwikflash UART connections

31

32 2 modes; SPI and I 2 C

33 2 modes; SPI and I 2 C Section

34 SPI

35 SPI 3 wires +chip select, master-slave

36 SPI 3 wires +chip select, master-slave overview

37 SPI 3 wires +chip select, master-slave overview Section 10.2

38 SPI 3 wires +chip select, master-slave overview Section 10.2 SPI registers

39 SPI 3 wires +chip select, master-slave overview Section 10.2 SPI registers Section

40 SPI 3 wires +chip select, master-slave overview Section 10.2 SPI registers Section operation

41 SPI 3 wires +chip select, master-slave overview Section 10.2 SPI registers Section operation Sections to

42 SPI 3 wires +chip select, master-slave overview Section 10.2 SPI registers Section operation Sections to Section 15.3

43 SPI 3 wires +chip select, master-slave overview Section 10.2 SPI registers Section operation Sections to Section 15.3 QwikFlash MAX522 DAC

44 SPI summary

45 SPI summary 3 wires (+ ground), one-to-many

46 SPI summary 3 wires (+ ground), one-to-many SCLK (from master)

47 SPI summary 3 wires (+ ground), one-to-many SCLK (from master) SDO (serial data out)

48 SPI summary 3 wires (+ ground), one-to-many SCLK (from master) SDO (serial data out) SDI (serial data in)

49 SPI summary 3 wires (+ ground), one-to-many SCLK (from master) SDO (serial data out) SDI (serial data in) CS for each device, generated by master

50 SPI summary 3 wires (+ ground), one-to-many SCLK (from master) SDO (serial data out) SDI (serial data in) CS for each device, generated by master data transmission rate set by SCLK

51 SPI summary 3 wires (+ ground), one-to-many SCLK (from master) SDO (serial data out) SDI (serial data in) CS for each device, generated by master data transmission rate set by SCLK packets are single characters

52 Qwikflash SPI connections

53 Qwikflash SPI connections

54 I 2 C

55 I 2 C 2 wires, master-multiple slave

56 I 2 C 2 wires, master-multiple slave overview

57 I 2 C 2 wires, master-multiple slave overview Section 11.2

58 I 2 C 2 wires, master-multiple slave overview Section 11.2 I 2 C module

59 I 2 C 2 wires, master-multiple slave overview Section 11.2 I 2 C module Sections 11.3 to 11.6

60 I 2 C 2 wires, master-multiple slave overview Section 11.2 I 2 C module Sections 11.3 to 11.6 Section 15.4

61 I 2 C summary

62 I 2 C summary 2 wires (+ ground), one-to-many

63 I 2 C summary 2 wires (+ ground), one-to-many SCL (from master)

64 I 2 C summary 2 wires (+ ground), one-to-many SCL (from master) SDA (serial data)

65 I 2 C summary 2 wires (+ ground), one-to-many SCL (from master) SDA (serial data) data transmission rate set by SCL

66 I 2 C summary 2 wires (+ ground), one-to-many SCL (from master) SDA (serial data) data transmission rate set by SCL address for each device, preset (but possibly programmable)

67 I 2 C summary 2 wires (+ ground), one-to-many SCL (from master) SDA (serial data) data transmission rate set by SCL address for each device, preset (but possibly programmable) packets are complex; address of recipient, read or write, data (variable number of bytes)

68 Qwikflash I 2 C connections

69 Qwikflash I 2 C connections

70

71 overview

72 overview reasons

73 overview reasons NIB

74

75 PORT configuration

76 PORT configuration macro or subroutine?

77 PORT configuration macro or subroutine? Initiallization

78 PORT configuration macro or subroutine? Initiallization macro or subroutine?

79 PORT configuration macro or subroutine? Initiallization macro or subroutine? Write to device

80 PORT configuration macro or subroutine? Initiallization macro or subroutine? Write to device macro or subroutine?

81 PORT configuration macro or subroutine? Initiallization macro or subroutine? Write to device macro or subroutine? Read from device

82 PORT configuration macro or subroutine? Initiallization macro or subroutine? Write to device macro or subroutine? Read from device macro or subroutine?