Telecom Networks and Switching: Switch Architecture. Multiplexed PCM Streams. Multiplexed PCM Streams (contd.) Time Switching. Size of Time Switch


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1 ultiplexed PC Streams Telecom etworks ad Switchig: Switch Architecture I moder digital switches, digitised, 64 kbps, PCecoded, voice sigals to/from lie cards are multiplexed ito 048/89/ bps (3/8/ chaels) streams a PC bus carries each such stream from/to oe or more lie cards to/from switch matrix frame bit clock clock Dr Bhaskar Ramamurthi Professor, Departmet of Electrical Egieerig, IIT adras, Cheai iput Streams p i Switch atrix j q output Streams to cotroller Dr Bhaskar TS/Set Dr Bhaskar TS/Set ultiplexed PC Streams (cotd) each voice sigal takes up a oebyte time slot every 5 µsec (/8000 sec) slots per frame ( = 3 for 048 bps stream) a switch matrix with multiplexed iput/output streams supports a total of simplex coectios each voice call takes up two simplex coectios each toe geerator or aoucemet takes up oe simplex coectio, if switch ca perform oetomay switchig eg, feed dial toe simultaeously to several lies each DTF detector likewise take up oe simplex coectio a pair of iput ad output slots (same slot o some lie) is a port each telephoe lie/truk lie is coected to a port Time Switchig Switch matrix ca put a PC sigal occurig i slot io ay iput stream p ito slot j o ay output stream q) to complete a duplex coectio, slot j o iput stream q must also be fed ito slot i o output stream p this establishes a duplex coectio betwee port (i,p) ad port (j,q) sice PC sample appearig i oe time slot is placed ito aother time slot, this is called time switchig a time switch fudametally requires memory store iput samples of oe frame i memory ad play them out i ext frame at differet times (ad o differet streams) Dr Bhaskar TS/Set 3 Dr Bhaskar TS/Set 4 Time Switchig: a Example with =4 Size of Time Switch Iputs o oe stream Slot µsec µsec µsec µsec A time switch has to read PC samples ito memory ad write samples from memory, every 5 µsec speed limit of curret techology plays a role i decidig Choice of decides umber of pis o IC, ad the speed of each iput / output lie (64 khz) µsec µsec 035 µsec µsec Each output slot ca be o a differet stream = 6, = 3 commoly available = 3, = 8 also used (sometimes the switch IC is custom built) to icrease, at the cost of piout, sometimes each multiplexed stream is fed as 8bit parallel bus Dr Bhaskar TS/Set 5 Dr Bhaskar TS/Set 6
2 Combiig Switchig odules Space Switchig to build a x matrix usig x modules 4 x modules + + output streams must be tristated durig a slot if o coectio is made to it that slot eg, if i slot, iput stream + is coected to output stream, the output stream of module A is tristated durig slot ca build switch matrix of desired size usig stadard ICs x A x B x C x D + + PC iput i slot i o stream p ca be ca be switched to ay stream q but oly i slot i ie, oly port (ip) port (i,q) is possible o memory used i switch matrix because switchig occurs from oe physical lie to aother, it is called space switchig with =, ca switch ay iput port ( lie) to ay output port ( lie) physical coectio from port (i,p) to port (i,q) exists for duratio of call for >, ca chage the coectios betwee iput streams ad output streams every slot but, oly some ports (those that occur i same time slot) ca be coected Dr Bhaskar TS/Set 7 Dr Bhaskar TS/Set 8 Port Ilets Aalog Space Switchig Space switchig works for aalog sigals too i fact, it is the oly way to switch aalog sigals a x space switch eeds () Ν cross poits 3 i j 3 i j Port Outlets cross poit array has bee implemeted i may techologies Strowger, crossbar, electroic Blockig Vs oblockig Switches Treat cross poit array as a abstract represetatio of ay switch matrix (time, or space, switch) if ay coectios ca be made simultaeously i a x switch matrix oblockig switch if implemetatio is such that < simultaeous coectios ca be made i some or all cases blockig switch blockig switches are implemeted usig multiple switchig stages why? electromechaical Dr Bhaskar TS/Set 9 Dr Bhaskar TS/Set 0 Rectagular Cross Poit Array o otio of iput ad output ports oly ilets ad outlets umber of cross poits = k represeted as show alogside this is ot a switch matrix with iput ports ad k output ports ilets ilets k k outlets xk k outlets k x 3Stage Space Switch : a Example Ilets Arrays x k x k x k k Arrays x x x Arrays k x k x k x outlets Dr Bhaskar TS/Set Dr Bhaskar TS/Set
3 oblockig 3Stage Switch umber of CrossPoits idle  Busy  Busy idle c = () + () / Optimum choice of for large = * c 4( ) istead of! available path Example : for = 8000 reductio by 6 times k =  Dr Bhaskar TS/Set 3 Dr Bhaskar TS/Set 4 Blockig Switches Pros ad Cos of Blockig Switches k <<  for 8K switch, objective : blockig probability should be low, ie, compared to probability that called party is usig the phoe, this should be egligible Siglestage oblockig /6 3stage oblockig /9 3stage blockig (0% util, % blockig) if lie utilisatio is, say, 0%, blockig prob ca be % for 8K switch, k is reduced 8 times compared to  c reduces by a further factor of 9 compared to oblockig desig however, if lik utilisatio icreases, blockig prob goes up may times over eg, Util% 6% blockig prob % 6%! Dr Bhaskar TS/Set 5 Dr Bhaskar TS/Set 6 TimeSpaceTime Switch k = i 3  stage switch Large Essetially o  Blockig Switches sice TST switch is equivalet to 3  stage switch with k = blockig switch I L E T S SPACE O U T L E T S However, blockig probability very, very small for k = (~06!) eve if utilizatio doubles or triples, blockig probability may go up00 times, still performace is good large exchages cosist of TS modules itercoected i a scalable fashio to a space switch Space Switch chages coectios i every slot equivalet to k (=) space switches Dr Bhaskar TS/Set 7 Dr Bhaskar TS/Set 8
4 Essetially oblockig 3stage Switch : a Example CDOT s 6,000 lie exchage TST cofiguratio (slightly modified) Time Switch with = 5, k = 5 i first ad third stages 3 x 3 space switch i middle stage recofigured i every slot as usual Base odule cosists of first ad third stages put together x x 04 6 Base odule 5 5 i out Space Switch 3 i 3 out Cetral odule Essetially oblockig 3stage Switch : a Example (cotd) Base module is ot two idepedet 5 x 5 TSs, but oe 04 x 04 TS calls betwee ports o same B ca be switched locally i B i covetioal TST switch, every call has to go through the space switch reduces blockig probability (i ay case, isigificat) o separate path for cotrol messages betwee processors i Bs ad C use some of the 64 kbps chaels slightly less tha 5 slots carry voice sigals to C DTF detectors, toe geerators, etc, i each B umber of ports per B ~ 480 Dr Bhaskar TS/Set 9 Dr Bhaskar TS/Set 0 Telecom etworks ad Switchig: Teletraffic odellig Telephoe etwork as a Queueig System Occurrece of telephoe calls is radom Call arrivals at a exchage, are aki to customers requestig service i a queue A exchage capable of supportig simultaeous calls or a truk group with chaels, is aki to servers hadlig customers Dr Bhaskar Ramamurthi Professor, Departmet of Electrical Egieerig, IIT adras, Cheai If a call caot be completed, busy toe is fed o waitig room for customers, ie, blocked calls cleared a queue with servers ad o waitig room Arrivals (ew calls) Blocked calls Departures (Completed calls ) Dr Bhaskar TS/Set Dr Bhaskar TS/Set Call Statistics odel call arrivals o each lie as a Poisso process oly oe parameter λ u = avg o of calls / uit time Poisso process iterarrival time τ i expoetially distributed λuτi (p( τi ) λue ) Property of Poisso arrivals : total arrivals o lies is also Poisso, with rate λ u Call holdigtime also modelled as expoetially distributed oly oe parameter, τ h : average holdig time / (p( x ) ( / ) e ) A assumptio : λ u, τ h such that, i the model, probability of ext call begiig o a lie while previous call is still beig held, is egligible (this is impossible i reality) Teletraffic Uit of teletraffic is Erlag (i hoour of a Swedish mathematicia) traffic = λ u τ h Erlags (dimesioless, like radias) average utilisatio of a lie (as per a specific statistical model) A importat property of queues with Poisso arrivals ad expoetial holdig times (so called / queues) is that queue behaviour depeds oly o product λ u τ h traffic from similar lies = λ u τ h Erlags total traffic from lies of oe type (say, busiess), ad lies of aother (say, residetial) = λ u τ h + λ u τ h call call + Dr Bhaskar TS/Set 3 Dr Bhaskar TS/Set 4
5 Blockig Probability For servers ad A Erlags traffic, i PB = A! i 0 A!i = ( ) Tables / curves are a good tool for dimesioig Typically, we wat P B small (say 00) for small, permissible traffic << Erlags Erlag B formula as becomes large (~00), permissible traffic icreases ad saturates slowly thereafter to a reasoably large fractio of P B very sesitive to traffic level A for give (except for =) icreases may times over compared to icrease i A Erlag B odel  Blocked Calls Cleared A i Erlags PB (Blockig Probability) 0 % 0 % 05 % 0 % % 5 % 0 % Dr Bhaskar TS/Set 5 Dr Bhaskar TS/Set 6 Use of Erlag B Table : a Example Dimesioig the PST Truk etwork Blockig i Switches solved by digital, essetially oblockig, switches 40 C O C 0 Choosig correctly for each route i the truk etwork is critical for cotrollig edtoed call blockig probability dimesioig the truk etwork λ u τ h = 0 A = 40 x 0 = 4E P B = 055% Suppose λ u τ h = 05 A = 6E P B ~ 44%! P B icreases 8 times for 50% icrease i A for each route chose based o traffic statistics collected over time traffic moitorig at exchages is a importat fuctio To accout for rapid chages i traffic patter, truks usually are provided with scope for expasio dark fibre, or use of Wavelegth Divisio ultiplexig o existig fibre, to multiply capacity Dr Bhaskar TS/Set 7 Dr Bhaskar TS/Set 8 Aalysis of Blockig i ultistage Switches Lee Graph Approximatio for 3Stage Switch Difficult to do queueig aalysis with Poisso call arrival model Probability of lie utilisatio = p ( traffic i Erlags) p p p p a middle stage ca set up some calls but ot others assume each lik betwee first stage ad middle stage is utilised idepedetly with probability p = p/k k may ot be possible to set up  coectio for oe call arrival o oe lie but may be possible for a arrival o aother lie queueig aalysis for case whe server is idle whe some customers arrive (ad seds them away), but ot for some others, is very difficult simplified approximate aalysis utilisatio of liks from middle stage to third stage, ad of third stage port outputs, are likewise p ad p respectively probability of a particular path from first to third stage beig free = ( p ) : both liks i series must be free probability of o path from first to third stage beig free = [ ( p ) ] k : all k parallel likpairs must be busy = P B Dr Bhaskar TS/Set 9 Dr Bhaskar TS/Set 30
6 Lee Graph Approximatio for 3Stage Switch (cotd) Lee approximatio uderestimates P B for k <, but overestimates P B for k > (for k = , it gives P B > 0!) useful as a guide to arrowig desig choices for blockig switches fially, computer simulatio will give more accurate picture Optimise ad k to miimise c while meetig requiremet o P B eg p = 0, = 89 = 3, k = 0 gives miimum c ~ 500,000 = 64 (= / ), k = 7 (=  ) is oblockig c ~ 4 millio Dr Bhaskar TS/Set 3
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