Processes, Context Switches and Interrupts
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1 CSCE 351 Operating System Kernels Processes, Context Switches and Interrupts Steve Goddard http// 1 Processes The basic agent of work, the basic building block Process characterization» Program code» Processor/Memory state» Execution state The state transition diagram Ready Running Waiting 2
2 Process Actions Create and Delete Suspend and Resume Process synchronization Process communication 3 Multiprogramming 4
3 Physical v. Logical Concurrency Why is logical concurrency useful? Structuring of computation Performance process P Read(var) end P system call Read() StartIO(input device) WaitIO(interrupt) EndIO(input device) end Read» Single process I/O 5 Physical v. Logical Concurrency Performance considerations Multithreaded I/O process P StartRead() <compute> Read(var) end P system call StartRead() RequestIO(input device) end StartRead system call Read() SignalReader(input device) end Read system process Read() loop WaitForRequest() System_Read(var) WaitForRequestor() end loop end Read 6
4 Process Creation Paradigms COBEGIN/COEND co S1 S2 FORK/JOIN Explicit process creation Sn coend fork(foo) join(foo) end P end procedure foo() end foo process P end P 7 Threads 3 processes» Each with one thread 1 process» Three threads 8
5 Process Scheduling Implementing and managing state transitions Head Ready Running Tail ready queue Waiting Head Tail device/condition queues name name name mem ptrs mem ptrs mem ptrs reg values reg values reg values Head Tail... next ptr prev ptr... next ptr prev ptr next ptr prev ptr 9 Why Schedule? Scheduling goals Example two processes execute concurrently Performance without scheduling P1 P2 process P1 for i = 1 to 5 do <read a char> <process a char> end for end P1 Performance with scheduling P1 P2 process P2 <execute for 1 sec > end P
6 Types of Schedulers Long term schedulers» adjust the level of multiprogramming through admission control Medium term schedulers» adjust the level of multiprogramming by suspending processes Short term schedulers» determine which process should execute next 11 Short Term Scheduling When to schedule Ready Running Head Tail ready queue Waiting Head Tail device/condition queues When a process makes a transition from running to waiting 2. from running to ready 3. from waiting to ready (3a. a process is created) 4. from running to terminated 12
7 Short Term Scheduling How to schedule Implementing a context switch Head Ready Running Tail ready queue Waiting Head Tail context_switch(queue system_queue) var next process_id DISABLE_INTS insert_queue(queue, runningprocess) next = remove_queue(readyqueue) dispatch(next) ENABLE_INTS end context_switch device/condition queues dispatch(proc process_id) <save memory image of runningprocess> <save processor state of runningprocess> <load memory image of proc> <load processor state of proc> runningprocess = proc 13 Implementing a Context Switch Case 1 Yield P2 s dispatch <save state of P2> <load state of P1> waitio() startio() read() P2 running 14
8 Implementing a Context Switch Case 1 Yield P1 s dispatch wait() deposit() P1 running <save state of P1> <load state of P2> waitio() startio() read() P2 15 Implementing a Context Switch Case 1 Yield P1 s dispatch wait() deposit() <save state of P1> <load state of P2> waitio() startio() read() P2 running P2 s dispatch RunningProcess= P2 16
9 Implementing a Context Switch Case 1 Yield wait() deposit() context_switch(queue system_queue) var next process_id DISABLE_INTS insert_queue(queue, runningprocess) next = remove_queue(readyqueue) dispatch(next) ENABLE_INTS end context_switch waitio() startio() read() P2 running 17 Implementing a Context Switch Case 1 Yield wait() deposit() waitio() startio() read() P2 running 18
10 Implementing a Context Switch Case 1 Yield wait() deposit() startio() read() P2 running 19 Implementing a Context Switch Case 1 Yield wait() deposit() read() P2 running 20
11 Implementing a Context Switch Case 2 Preemption P2 s dispatch <save state of P2> <load state of P1> timerint() bar() P2 running 21 Implementing a Context Switch Case 2 Preemption P1 s dispatch timerint() foo() P1 running <save state of P1> <load state of P2> timerint() bar() P2 22
12 Implementing a Context Switch Case 2 Preemption P1 s dispatch timerint() foo() <save state of P1> <load state of P2> timerint() bar() P2 running P2 s dispatch RunningProcess= P2 23 Implementing a Context Switch Case 2 Preemption timerint() foo() bar() P2 running 24
13 Interrupts Device sends a signal to an interrupt controller Controller interrupts the CPU via the INT pin 25 Kernel response to an Interrupt - sketch CPU stacks PC and other key registers CPU loads new PC from interrupt vector table Assembly language procedure saves registers Assembly language procedure sets up INT stack C ISR runs (usually reads and buffers input) Scheduler marks any newly ready tasks Scheduler decides which process will run next C procedure returns to the assembly code Assembly language procedure switches to new current process 26
14 Response to an Interrupt - details for Intel processors Controller interrupts the CPU via the INT pin CPU disables interrupts and pushes PC and other key registers onto the current process stack CPU signals the controller via INTA (interrupt acknowledge) signal to put interrupt number on the system data bus CPU reads the system data bus and uses that value as an index into the interrupt vector table to find the pointer of the interrupt handler, which is an assembly routine wrapper for the ISR (i.e., an indirect jump) The interrupt handler fills out the stack frame with general registers, switches to an interrupt stack and calls the C ISR When the ISR completes, the handler switches to a process stack frame, pops the general registers, and executes the iretd (return from interrupt) instruction to pop the remaining instructions in the stack frame to restore the system state 27 Interrupts vs System Calls Interrupt System Call 28
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