# Data types. lecture 4

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1 Data types lecture 4

2 Information in digital computers is represented using binary number system. The base, i.e. radix, of the binary system is 2. Other common number systems: octal (base 8), decimal (base 10), hexadecimal (base 16). Binary number system is adopted for computers due to simple physical implementation by electronic components Only two voltage levels are required to represent the two possible numbers: 0 and 1.

3 Example: acceptable TTL input gate voltage levels: 0-0.8V (LOW or 0) and 2-5V (HIGH or 1). In computer parlance, one binary digit is called bit, two digits are called a crumb, four digits are called a nibble, and eights digits are called a byte. The magnitude of a number is represented as a weighted sum of the digits. Each weight corresponds to an integer power of number s base, e.g. (1234.5) 10 = 1 x x x x x 10-1 ( ) 2 = 1 x x x x x x 2-1 = (22.5) 10 (721) 8 = 7 x x x 8 0 = (465) 10

4 Conversions between number systems, e.g.: ( ) 10 = (?) 2 Integer part = 41 Fraction part = / 2 = 20, remainder = x 2 = 1, fraction = / 2 = 10, remainder = x 2 = 0, fraction = / 2 = 5, remainder = x 2 = 1, fraction = / 2 = 2, remainder = x 2 = 1, fraction = / 2 = 1, remainder = 0 1 / 2 = 0, remainder = 1 => ( ) 10 = ( ) 2

5 To see how the integer part is formed you must recognize that by dividing a binary number (or the corresponding decimal number) by 2 you shift the binary point to the left. As the result, you have an integer part and a fraction part which is.0 (=0x2-1 in dec.) or.1 (=1x2-1 in dec.), and which gives you the right most digit: 0 or 1. By repeating the procedure for the integer part you get all the digits. The fraction part is discovered in a similar manner by instead of dividing by two you must multiply by two and check if you get and integer part as a result of multiplication.

6 ( ) 10 = (?) 8 Integer part = 41 Fraction part = / 8 = 5, remainder = x 8 = 5, fraction = / 8 = 0, remainder = x 8 = 4, fraction = 0.0 => ( ) 10 = (51.54) 8 ( ) 10 = (?) / 16 = 2, remainder = x 16 = 11, fraction = / 16 = 0, remainder = 2 => ( ) 10 = (29.B) 16,where B represents number 11. The most important conversions are conversions between decimal and binary systems assemblers and compilers perform these conversions for you in cases you want to work with decimal numbers.

7 Binary to octal/hexadecimal conversion Assume 16-bit binary number: ( ) 2 Conversion to octal: ( ) 8 Conversion to hexadecimal: ( A F 6 3 ) 16 e.g. ( ) 2 = 1x2 7 +0x2 6 +0x2 5 +0x x2 3 +1x2 2 +0x2 1 +1x2 0 = (1x2 3 +0x2 2 +0x2 1 +0x2 0 )x2 4 + (1x2 3 +1x2 2 +0x2 1 +1x2 0 )x2 0 = (1x2 3 +0x2 2 +0x2 1 +0x2 0 )x (1x2 3 +1x2 2 +0x2 1 +1x2 0 )x16 0 Why to use octal and/or hexadecimal representations? Straight forward (easy) conversion to/from a binary number: helps a programmer to interpret register values and quickly recognize a value of an individual bit(s) (flag bit, for example).

8 Binary-coded decimal (BCD) BCD is a convention for mapping binary numbers to decimal numbers. Although any mapping could have be used, straight binary assignment is used in BCD for the decimal digits Decimal number Binary-coded decimal

9 ASCII (American Standard for Information Interchange) Uses 7 bits to code 128 characters: upper and lowercase letters, decimal digits, and special characters, e.g.: Character A B C D E F G H = ASCII-code BCD

10 Complements Complements are used for simplifying arithmetic operations involving negative numbers, and for logical manipulation. There is two types of complements for each radix (base) r: r s complement and (r-1) s complement r s complement of a number N is (r n - N) (r-1) s complement of a number N is (r n - 1) - N, n is the number of digits in N => the most significant digit of r n is 1 followed by n zeros.

11 Forming complements for binary numbers 1 s complement: change 1 s into 0 s and 0 s into 1 s 2 s complement: take 1 s complement and add 1, or leave least significant 0 s and first 1 unchanged, and then swap 1 s and 0 s for the higher significant bits *: = , : = *) 2 n = (n=7), 2 n -1 = By subtracting any 7- bit binary number M from 2 n-1 you ll get the logic complement of the number M: e.g = Now by adding one to this number you ll get 2 n-1 M + 1 = 2 n M, which is the 2 s complement of the number M. => 2 s complements can be computed rapidly by taking the logic complement (=1 s complement) of a number (easy to implement with a hardware) and by adding one to the result.

12 e.g = ( = 10 s complement of 13250) (end carry => positive 59282; end carry discarded) e.g = ( = 10 s complement of 72532) (no end carry => negative 59282, which is 10 s complement of 40718)

13 e.g = ( = 2 s complement of ) (end carry => positive ; end carry is discarded) e.g = ( = 2 s complement of ) (no end carry => negative , which is 2 s complement of )

14 Fixed-Point Representations Positive integers, including zero, can be represented as unsigned numbers. However, to represent both positive and negative integers we need a notation for the sign. In the previous examples of twos complements we did not have a notation of sign: the sign was only recognized from the end carry after the operation, but it couldn t be recognized directly from the operands. It is customary to represent the sign with a bit placed in the leftmost position of the number: 0 for positive, and 1 for negative numbers, respectively. The bits after the sign bit represent the significant bits of the number.

15 Fixed-point method assumes that the binary point is always fixed in one position. Two positions most widely used: binary point in the extreme left of the register for a fraction part, and binary point in the extreme right of the register for an integer part, e.g.: register 1 register integer part fraction part

16 The sign is represented by 1, and 0 for negative and positive numbers respectively. Rest of the negative number may be represented in one of three possible ways: 1. Signed-magnitude representation e.g. ( => -14) 2. Signed-1 s complement representation e.g. ( => -14) 3. Signed-2 s complement representation e.g. ( => -14)

17 Signed-magnitude representation is awkward when employed in computer arithmetic: would complicate the hardware. 1 s complement has two representations of 0 (+0, -0), i.e.: and Seldom used for arithmetic operations Useful for logical operations: equivalent to the logical complement. 2 s complement is used in modern computers.

18 The addition of two numbers in the signed-magnitude system follows the rules of ordinary arithmetic. Assume addition Y = N + M if sign(n) == sign(m) then Y = sign(n)( N + M ) if sign(n) ~= sign(m) then Y = sign(max( N, M ))(max( N, M ) - min( N, M ) This process requires the comparison of signs and the magnitudes and the performing either addition or subtraction, which makes it complex.

19 The rule for adding numbers in the signed-2 s complement system does not require a comparison or subtraction, only addition and complementation: very simple procedure Add the two numbers, including their sign bits, and discard any carry out of the sign (leftmost) bit position. Negative numbers must must initially be in 2 s complement. If the sum is negative, it is in 2 s complement form. Same hardware can be used to add (subtract) unsigned or signed-2 s complement numbers: interpretation of results depends on whether it is assumed that the numbers are signed or unsigned.

20 Geometric depiction of twos complement integers

21 E.g.:

22 Overflow is a condition where the result of an arithmetic operation (e.g. a sum of two n-digit numbers) occupies n + 1 digits, where n is the maximum size (in digits) of any number (i.e. register). Overflow is a problem in computers because the width of registers is finite => result that contains n + 1 digits cannot be accommodated in a register with a length of n bits. When computers detect the overflow, a flip-flop is set which can be checked by the program.

23 Overflow detection Addition of two unsigned numbers: end carry out of the most significant position indicates overflow, e.g: Addition of two signed numbers: unequal carries into the sign bit position and out of the sign bit position indicates overflow, e.g.: , if the two carries a applied to XOR-gate, the output is 1 iff overflow occurs <= no overflow in this example.

24 The procedure developed for the signed-2 s complement system apply also to the signed-10 s complement system for decimal numbers. Addition is done by adding all digits, including the sign digit, and discarding the end carry. Negative numbers are in 10 s complement from. The procedure for decimal numbers are utilized in some cases when it is desirable or convenient to perform arithmetic operations directly with BCD numbers: e.g. in simple pocket calculators.

25 Floating-Point Representation Floating point representation of a number has two parts: mantissa (m) and exponent (e). Floating-point is always interpreted to represent a number in the following form: x = m r e. Mantissa represents the fractional part of the x. Exponent indicates the actual position of the decimal point, e.g. (r = 10): fraction exponent (4) x 10 4 =

26 Only mantissa (m) and exponent (e) a physically represented in the register (with their signs). The radix (r) and the radix point is always assumed (standard). The circuits that manipulate the floating point numbers in registers conform with these two assumptions (standards) in order to provide correct computational results. A floating point binary number (r=2) e.g.: fraction exponent => => +( ) x 2 4 In both parts, m and e, the most significant bit represents the sign: 0 for positive, and 1 for negative.

27 A floating point number is said to be normalized if the most significant digit of the mantissa is non zero. Normalized numbers provide the maximum possible precision for the floating point number This is the main argument for the floating point representation over the fixed point representation.

28 IEEE 754 floating point standard 32-bit single precision 64-bit double precision The exponent field needs to represent both positive and negative exponents. To do this, a bias is added to the actual exponent in order to get the stored exponent. For IEEE single-precision floats, this value is 127. Thus, an exponent of zero means that 127 is stored in the exponent field. A stored value of 200 indicates an exponent of ( ), or 73

29 Many CPUs support floating-point arithmetic operations. If a CPU hasn t floating-point support, a set of subroutines can be use for performing floating-point calculations => much slower than the hardware implementation.

30 Other Binary Codes Gray Code: A binary sequence with the property that only one bit changes between any two consecutive elements. The Gray Code originated when digital logic circuits were built from vacuum tubes and electromechanical relays. Counters generated tremendous power demands and noise spikes when many bits changed at once. Using gray code counters, any increment or decrement changed only one bit.

31 Gray code can also be used to convert the angular position of a disk to digital form. A radial line of sensors reads the code off the surface of the disk and if the disk is half-way between two positions each sensor might read its bit from both positions at once but since only one bit differs between the two, the value read is guaranteed to be one of the two valid values rather than some third (invalid) combination.

32 Gray Code (4-bit): Binary code Decimal equivalent

33 Various decimal codes: Excess-3 gray Excess BCD 8421 Decimal digit

34 2421 and excess-3 have a self-complementing property 9 s complement is obtained by changing 1 s to 0 s and 0 s to 1 s. Useful property when doing arithmetic operations with signedcomplement representation is a weighted code Decimal equivalent if obtained by multiplying bits by the weights indicated, e.g.: 1101 => 2 x x x x 1 = 7 Assigning weights 8421 for the BCD code makes it a weighted code. The excess-3 code is obtained by adding 3 (0011) to the corresponding BCD equivalent binary number.

35 Excess-3 gray is a decimal code obtained from the 4-bit gray code by selecting the codes for 3-12 => transition from 10 to 0 involves a change of only one bit. ASCII code is used in transmission of binary information 7-bit code, 1-parity bit. 128 characters: letters, numbers, punctuation marks, and special codes. 23 formal effectors: functional characters for controlling the layout of printing or display devices, e.g.: carriage return, line feed, tab, back space. EBCDIC (Extended BCD Interchange Code): 8-bit characters (all ASCII symbols included).

36 Error Detection Codes Binary codes used to detect errors during data transmission. Parity bit Extra bit to make the total number (sum) of 1 s either odd or even. The parity bit is discarded when the message is received, e.g.: ( ) => P(odd): 1, P(even): 0 ( ) => P(odd): 0, P(even): 1 The message including its parity bit (generated by the parity generator) is sent to receiver.

37 In the receiver, parity checker checks the adopted parity Both transmitter and receiver are configure for the same parity odd, or even. An error is detected if the checked parity does not match the adopted parity. The parity method detects any odd number of errors. E.g. odd parity: Data Data + P Data + P Parity generator Noisy communication channel Parity checker Sum of 1 s is even => error

38 Error detection with odd parity:

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