8-Bit Serial-Input/Parallel-Output Shift register

Transcription

1 TECHNICAL DATA IN74AC164 8-Bit Serial-Input/Parallel-Output Shift register High-Speed Silicon-Gate CMOS The IN74AC164 is identical in pinout to the LS/ALS164, HC/HCT164. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALS outputs. The IN74AC164 is an 8-bit, serial-input to parallel-output shift register. Two serial data inputs, A1 and A2, are provided so that one input may be used as a data enable. Data is entered on each rising edge of the clock. The active-low asynchronous Reset overrides the Clock and Serial Data inputs. Outputs Directly Interface to CMOS, NMOS, and TTL Operating oltage Range: 2. to 6. Low Input Current: 1. µa;.1 25 C High Noise Immunity Characteristic of CMOS Devices Outputs Source/Sink 24 ma ORDERING INFORMATION IN74AC164N Plastic IN74AC164D SOIC T A = -4 to 85 C for all packages PIN ASSIGNMENT LOGIC DIAGRAM FUNCTION TABLE Inputs Outputs Reset Clock A1 A2 Q A Q B... Q H L X X X L L... L H X X no change H H D D Q An... Q Gn PIN 14 = CC PIN 7 = GND H D H D Q An... Q Gn D = data input X = don t care Q An - Q Gn = data shifted from the previous stage on a rising edge at the clock input. 244

2 MAXIMUM RATINGS Symbol Parameter alue CC DC Supply oltage (Referenced to GND) -.5 to +7. IN DC Input oltage (Referenced to GND) -.5 to CC +.5 OUT DC Output oltage (Referenced to GND) -.5 to CC +.5 I IN DC Input Current, per Pin ±2 ma I OUT DC Output Sink/Source Current, per Pin ±5 ma I CC DC Supply Current, CC and GND Pi ±5 ma P D Power Dissipation in Still Air, Plastic DIP+ SOIC Package+ Tstg Storage Temperature -65 to +15 C T L Lead Temperature, 1 mm from Case for 1 Seconds (Plastic DIP or SOIC Package) 75 5 Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditio. +Derating - Plastic DIP: - 1 mw/ C from 65 to 125 C SOIC Package: : - 7 mw/ C from 65 to 125 C mw 26 C RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Max CC DC Supply oltage (Referenced to GND) IN, OUT DC Input oltage, Output oltage (Referenced to GND) CC T J Junction Temperature (PDIP) 14 C T A Operating Temperature, All Package Types C I OH Output Current - High -24 ma I OL Output Current - Low 24 ma t r, t f Input Rise and Fall Time (except Schmitt Inputs) IN from 3% to 7% CC CC =3. CC = CC = / This device contai protection circuitry to guard agait damage due to high static voltages or electric fields. However, precautio must be taken to avoid applicatio of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, IN and OUT should be cotrained to the range GND ( IN or OUT ) CC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or CC ). Unused outputs must be left open. 245

3 DC ELECTRICAL CHARACTERISTICS(oltages Referenced to GND) CC Guaranteed Limits Symbol Parameter Test Conditio 25 C -4 C to IH Minimum High-Level Input oltage IL Maximum Low - Level Input oltage OH Minimum High-Level Output oltage OUT =.1 or CC OUT =.1 or CC I OUT -5 µa IN = IH or IL I OH =-12 ma I OH =-24 ma I OH =-24 ma OL Maximum Low-Level Output oltage I OUT 5 µa I IN I OLD I OHD Maximum Input Leakage Current +Minimum Dynamic Output Current +Minimum Dynamic Output Current IN = IH or IL I OL =12 ma I OL =24 ma I OL =24 ma IN = CC or GND ±.1 ±1. µa OLD =1.65 Max 75 ma OHD =3.85 Min -75 ma I CC Maximum Quiescent Supply Current (per Package) IN = CC or GND 4. 4 µa All outputs loaded; thresholds on input associated with output under test. +Maximum test duration 2. ms, one output loaded at a time. Note: I IN and I 3. are guaranteed to be less than or equal to the respective CC 246

4 AC ELECTRICAL CHARACTERISTICS(C L =5pF,Input t r =t f =3. ) CC Guaranteed Limits Symbol Parameter 25 C -4 C to f max Maximum Clock Frequency (Figure 1) 5. t PLH Propagation Delay, Clock to Q (Figure 1) 5. t PHL Propagation Delay, Clock to Q (Figure 1) 5. t PHL Propagation Delay, Reset to Q (Figure 2) 5. Min Max Min Max C IN Maximum Input Capacitance 5. pf MHz C, CC =5. C PD Power Dissipation Capacitance 35 pf oltage Range is ±.3 oltage Range 5. is 5. ±.5 TIMING REQUIREMENTS(C L =5pF, Input t r =t f =3. ) CC Guaranteed Limits Symbol Parameter 25 C -4 C to t su t h t w Minimum Setup Time, A1 or A2 to Clock (Figure 3) Minimum Hold Time, Clock to A1 or A2 (Figure 3) Minimum Pulse Width, Clock or Reset (Figures 1,2) t rec Minimum Recovery Time, Reset to Clock (Figure 2) oltage Range is ±.3 oltage Range 5. is 5. ±

5 Figure 1. Switching Waveforms Figure 2. Switching Waveforms Figure 3. Switching Waveforms TIMING DIAGRAM EXPANDED LOGIC DIAGRAM 248