Features G D. TO-220 FQP Series

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1 FQP33N10 FQP33N10 100V N-Channel MOSFET April 2000 QFET TM General Description These N-Channel enhancement mode power field effect transistors are produced using Fairchild s proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for low voltage applications such as audio amplifier, high efficiency switching DC/DC converters, and DC motor control. Features 33A, 100V, R DS(on) = = 10 V Low gate charge ( typical 38 nc) Low Crss ( typical 62 pf) Fast switching 100% avalanche tested Improved dv/dt capability 175 C maximum junction temperature rating D! G D S TO-220 FQP Series G "! " "! "! S Absolute Maximum Ratings T C = 25 C unless otherwise noted Symbol Parameter FQP33N10 Units S Drain-Source Voltage 100 V I D Drain Current - Continuous (T C = 25 C) 33 A - Continuous (T C = 100 C) 23 A I DM Drain Current - Pulsed (Note 1) 132 A S Gate-Source Voltage ±25 V E AS Single Pulsed Avalanche Energy (Note 2) 435 mj I AR Avalanche Current (Note 1) 33 A E AR Repetitive Avalanche Energy (Note 1) 12.7 mj dv/dt Peak Diode Recovery dv/dt (Note 3) 6.0 V/ns P D Power Dissipation (T C = 25 C) 127 W - Derate above 25 C 0.85 W/ C T J, T STG Operating and Storage Temperature Range -55 to +175 C T L Maximum lead temperature for soldering purposes, 1/8 from case for 5 seconds 300 C Thermal Characteristics Symbol Parameter Typ Max Units R θjc Thermal Resistance, Junction-to-Case CW R θcs Thermal Resistance, Case-to-Sink CW R θja Thermal Resistance, Junction-to-Ambient CW

2 Electrical CharacteristicsT C = 25 C unless otherwise noted Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BS Drain-Source Breakdown Voltage = 0 V, I D = 250 µa V BS Breakdown Voltage Temperature / T J Coefficient I D = 250 µa, Referenced to 25 C V/ C I DSS = 100 V, = 0 V µa Zero Gate Voltage Drain Current = 80 V, T C = 150 C µa I GSSF Gate-Body Leakage Current, Forward = 25 V, = 0 V na I GSSR Gate-Body Leakage Current, Reverse = -25 V, = 0 V na FQP33N10 On Characteristics (th) Gate Threshold Voltage =, I D = 250 µa V R DS(on) Static Drain-Source V On-Resistance GS = 10 V, I D = 16.5 A Ω g FS Forward Transconductance = 40 V, I D = 16.5 A (Note 4) S Dynamic Characteristics C iss Input Capacitance = 25 V, = 0 V, pf C oss Output Capacitance f = 1.0 MHz pf C rss Reverse Transfer Capacitance pf Switching Characteristics t d(on) Turn-On Delay Time ns = 50 V, I D = 33 A, t r Turn-On Rise Time R G = 25 Ω ns t d(off) Turn-Off Delay Time ns t f Turn-Off Fall Time (Note 4, 5) ns Q g Total Gate Charge = 80 V, I D = 33 A, nc Q gs Gate-Source Charge = 10 V nc Q gd Gate-Drain Charge (Note 4, 5) nc Drain-Source Diode Characteristics and Maximum Ratings I S Maximum Continuous Drain-Source Diode Forward Current A I SM Maximum Pulsed Drain-Source Diode Forward Current A V SD Drain-Source Diode Forward Voltage = 0 V, I S = 33 A V t rr Reverse Recovery Time = 0 V, I S = 33 A, ns Q rr Reverse Recovery Charge di F / dt = 100 A/µs (Note 4) µc Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 0.6mH, I AS = 33A, = 25V, R G = 25 Ω, Starting T J = 25 C 3. I SD 33A, di/dt 300A/µs, BS, Starting T J = 25 C 4. Pulse Test : Pulse width 300µs, Duty cycle 2% 5. Essentially independent of operating temperature

3 FQP33N10 Typical Characteristics I D, Drain Current [A] 10 2 Top : 15.0 V 10.0 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V Bottom : 4.5 V s Pulse Test 2. T C = , Drain-Source Voltage [V] I D, Drain Current [A] , Gate-Source Voltage [V] 1. = 40V s Pulse Test Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics R DS(ON) [ ], Drain-Source On-Resistance = 10V = 20V Note : T J = I D, Drain Current [A] Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage I DR, Reverse Drain Current [A] = 0V s Pulse Test V SD, Source-Drain voltage [V] Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature C iss = C gs + C gd (C ds = shorted) C oss = C ds + C gd C rss = C gd = 50V = 80V Capacitance [pf] C iss C oss C rss 1. = 0 V 2. f = 1 MHz, Gate-Source Voltage [V] Note : I D = 33A , Drain-Source Voltage [V] Figure 5. Capacitance Characteristics Q G, Total Gate Charge [nc] Figure 6. Gate Charge Characteristics

4 Typical Characteristics (Continued) FQP33N BS, (Normalized) Drain-Source Breakdown Voltage = 0 V 2. I D = 250 A R DS(ON), (Normalized) Drain-Source On-Resistance = 10 V 2. I D = 16.5 A T J, Junction Temperature [ o C] Figure 7. Breakdown Voltage Variation vs. Temperature T J, Junction Temperature [ o C] Figure 8. On-Resistance Variation vs. Temperature 35 Operation in This Area is Limited by R DS(on) 30 I D, Drain Current [A] DC 100 µs 1 ms 10 ms I D, Drain Current [A] T C = 25 o C 2. T J = 175 o C 3. Single Pulse , Drain-Source Voltage [V] T C, Case Temperature [] Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current vs. Case Temperature Z JC (t), Therm al Response 10-1 D= single pulse 1. Z JC (t) = 1.18 /W M a x. 2. D u ty Fa c to r, D = t 1 /t 2 3. T JM - T C = P DM * Z JC (t) P DM t 1 t t 1, S q u a re W a v e P u ls e D u ra tio n [s e c ] Figure 11. Transient Thermal Response Curve

5 FQP33N10 Gate Charge Test Circuit & Waveform 12V 200nF 50K 300nF Same Type as DUT 10V Q g Q gs Q gd 3mA DUT Charge Resistive Switching Test Circuit & Waveforms R L 90% R G 10V DUT 10% t d(on) t r t d(off) tf t on t off Unclamped Inductive Switching Test Circuit & Waveforms L 1 E AS = LI 2 AS BS BS - I D BS I AS R G I D (t) 10V DUT (t) t p t p Time

6 Peak Diode Recovery dv/dt Test Circuit & Waveforms FQP33N10 DUT + _ I SD L Driver R G Same Type as DUT dv/dt controlled by RG I SD controlled by pulse period ( Driver ) Gate Pulse Width D = Gate Pulse Period 10V I FM, Body Diode Forward Current I SD ( DUT ) di/dt I RM Body Diode Reverse Current ( DUT ) Body Diode Recovery dv/dt V SD Body Diode Forward Voltage Drop

7 FQP33N10 Package Dimensions TO ± ±0.20 (1.70) 1.30 ±0.10 (8.70) ø3.60 ± ± ± ±0.20 (1.46) (1.00) 1.27 ±0.10 (45 ) (3.00) (3.70) 1.52 ± ± ± MAX. 2.54TYP [2.54 ±0.20] 0.80 ± TYP [2.54 ±0.20] ± ±0.20

8 TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx Bottomless CoolFET CROSSVOLT E 2 CMOS FACT FACT Quiet Series FAST FASTr GTO HiSeC ISOPLANAR MICROWIRE POP PowerTrench QFET QS Quiet Series SuperSOT -3 SuperSOT -6 SuperSOT -8 SyncFET TinyLogic UHC VCX DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR INTERNATIONAL. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. A, January 2000

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