CHAPTER 5. Bipolar Transistor and Related Device. Semiconductor Devices, 2/E by S. M. Sze Copyright 2002 John Wiley & Sons. Inc. All rights reserved.

Transcription

1 CHAPTER 5 Bipolar Transistor and Related Device

2 Bulk p+ p+ Buried layer Figure 5-1. Perspective view of a silicon p-n-p bipolar transistor.

3 E = B +C PNP, 以 hole carrier 為主, p+ 為 emitter 電壓, 電流, 極性都相反. NPN, 以 electron carrier 為主, n+ 為 emitter Figure 5-2. (a) dealized one-dimensional schematic of a p-n-p bipolar transistor and (b) its circuit symbol. (c) dealized one-dimensional schematic of an n-p-n bipolar transistor and (d) its circuit symbol.

4 Figure 5-3. (a) A p-n-p transistor with all leads grounded (at thermal equilibrium). (b) Doping profile of a transistor with abrupt impurity distributions. (c) Electric-field profile. (d) Energy band diagram at thermal equilibrium. e 熱平衡, 無電流,EF 是平的 h

5 Figure 5.4. (a) The transistor shown in Fig. 3 under the active mode of operation. 3 (b) Doping profiles and the depletion regions under biasing conditions. (c) Electric-field profile. (d) Energy band diagram. Forward electron Reverse Hole 越過 EB junction 後, 若 Base 很窄, 則會大部分被 C 收集. Base 很寬就不是 Transistor, 所以二個背對背之 Diode 不等於 Transistor.

6 0 w BB : 補充電子 Cn : 熱產生之電子 Figure 5.5. Various current components in a p-n-p transistor under active mode of operation. The electron flow is in the opposite direction to the electron current.

7 En :B 到 E 之電子流, 越小越好 (p+ 很濃,heterojunction) Common-base current gain : 1 CB : Ri 小,Ro=Rc 大, Current follower. (5)

8 Emitter efficiency Base transport factor (En ) (6) (7) ( BB, W B, N B ) (8) CB current gain = (emmitter eff)*(base transport factor)

9 (9) 令 Cn= CB0 (10) 指 EB open Common base

10 Active mode Continuity eq. for E=0 (Chap 3 eq.(61) ) (11)

11 分解為 : (12) B.C. EB forward(13a) BC reverse (13b) Ref. Fig. 5.6 ( 後面 )

12 (14) f W/Lp<<1 (15) linear

13 (16) B.C (17) (18) (19)

14 W/Lp<<1 (20) (21) 越小越好 (22) (23)

15 =EP+En (24) =cp+cn (27) 又 a12=a21 (30)

16 for rev P+ N P W 大時 Figure 5.6. Minority carrier distribution in various regions of a p-n-p transistor under the active mode of operation.

17 Summary : 1. B, C 受 V 影響, 正比 exp(qv/kt), continuity eq. 2. C, E 可由邊界之少數載子梯度表示. 3. B=E-C Emitter eff. (31) E (31a) 欲使 γ 1 1. NB/NE 2. W

18 Analog : active, chip driver Digital : sat. cutoff 若寬 P+ N P 若寬 Figure 5-7. Junction polarities and minority carrier distributions of a p-n-p transistor under four modes of operation.

19 VBC 使 BC forward 注意 C 仍未變 X V BC Figure 5-8. (a) Common-base configuration of a p-n-p transistor. (b) ts output current-voltage characteristics.

20 解釋 act. 解釋 sat. BCJ forward (VBC<0) VBC= -0.8V CBJ reverse 變化不大所以 C 不變 VBC Figure 5.9. Minority carrier distributions in the base region of a p-n-p transistor. (a) Active mode for V BC = 0 and V BC > 0. (b) Saturation mode with both junctions forward biased.

21 Base Width Modulation CE 才是最常用的 (A 很大 ) C C C 0 ( ) CEO 0 B 0 C 0 CBO B C B E common-emitter current gain (1 B CBO 1 0 CEO 0 ) CBO 0 0 * α 0 = γ*α T 無 B 之 C 大小 CEO ~β 0 * CBO (35) (36) (37)

22 O/P V CB >0 Early effect /P V A Figure (a) Common-emitter configuration of a p-n-p transistor. (b) ts output current-voltage characteristics.

23 Figure Schematic diagram of the Early effect and Early voltage V A. The collector currents for different base currents meet at V A.

24 Figure (a) Bipolar transistor connected in the common-emitter configuration. (b) Small-signal operation of the transistor circuit.

25 Figure (a) Basic transistor equivalent circuit. (b) Basic circuit with the addition of depletion and diffusion capacitances. (c) Basic circuit with the addition of resistance and conductance.

26 P B B qv( x) p( x) A W dx W 0 v( x) 0 速度 W 2D W 2 P 分佈 qp( x) A dx P (42) (43) (44) ( 基極傳導時間影響 freq. response) Figure Current gain as a function of operating frequency. D ( 用 electron 之 Dn~3Dp 即多為 npn BJT)

27 sat. cutoff CEO Figure (a) Schematic of a transistor switching circuit. (b) Switching operation from cutoff to saturation.

28 B X sat Figure Transistor switching characteristics (a) nput base current pulse. (b) Variations of the base-stored charge with time. (c) Variation of the collector current with time. (d) Minoritycarrier distributions in the base at different times. cutoff Q B X cutoff Storage time delay E B C dp/dx~const sat.c 不變 (V CB >0) linear (V CB <0) V CB =0

29 En majority, Ep 抑制, 增加 γ Figure (a) Schematic cross section of an n-p-n heterojunction bipolar transistor (HBT) structure. (b) Energy band diagram of a HBT operated under active mode.

30 Figure Current gain as a function of operating frequency for an np-based HBT. 8

31 最重要的 BJT 電特性圖

32 Figure (a) Device structure of an n-p-n Si/SiGe/Si HBT. (b) Collector and base current versus V EB for a HBT and bipolar junction transistor (BJT). Compatible with Si standard technology

33 Graded base, ε bi Current gain, f T 不同材料形成之 junction (Eg 不同 ) Figure Energy band diagrams for a heterojunction bipolar transistor with and without graded layer in the junction, and with and without a graded-base layer.

34 Figure Energy band diagram for the ballistic collector transistor (BCT). 9

35 Figure 10.27

36 Figure 10.29

37 Thyristor (high power,voltage switch) Figure (a) Four-layer p-n-p-n diode. (b) Typical doping profile of a thyristor. (c) Energy band diagram of a thyristor in thermal equilibrium. i 大,area 大,uniform 要好 For high voltage n1 為 bulk (NTD wafer) P1,P2 為一起 dope n2 為 high dope (P2<P1)

38 *CMOS 之 latch-up 阻抗很小 阻斷 hold 阻抗很大 breakover 電壓 breakdown Figure Current-voltage characteristics of a p-n-p-n diode.

39 Q1 Q2 Figure Two-transistor representation of a thyristor. 2 Q1:PNP Q2:NPN

40 Q1: Q2: ) ( ) 1 ( CBO E C E C E B 1 1 ) 1 ( 1 為 Q1 之 CBO E C 2 為 Q2 之 CBO 令 B1 = C2 ) ( 1 ) ( CBO 之和 α1+α2~1 時,break over VAK, α1,α2 不大時, α1, α2 <<1

41 Figure Depletion layer widths and voltage drops of a thyristor operated under (a) equilibrium, (b) forward blocking, (c) forward conducting, and (d) reverse blocking. (d) Breakdown 由 J1 決定 (b) 若在 P2 加入 g,α2 ( α1+α2 ~ 1) 則能在小 V 進入 (c) 以 g 控制 thyristor 全在 act 全在 sat E C for 大部分壓降 B rev C for for for B E for α1+α2 ~ 1 V --

42 SCR: 矽控整流器 ( 即在 PNPN 加 -gate) Figure (a) Schematic of a planar three-terminal thyristor. (b) One-dimensional cross section of the planar thyristor. E B C C B E

43 PNPN 受到外界之破壞, 產生 g g 上升則 latch-up 越易發生 5 10 g 上升則 leakage 上升 Figure Affect of gate current on current-voltage characteristics of a thyristor.

44 SCR 之應用 CKT Figure (a) Schematic circuit for a thyristor application. (b) Wave forms of voltages and gate current.

45 Figure (a) Two reverseconnected p-n-p-n diodes. (b) ntegration of the diodes into a single twoterminal diode ac switch (diac). (c) Current-voltage characteristics of a diac.

46 Figure Cross section of a triode ac switch, a six-layer structure having five p n junctions.

47 Figure Comparison of the structure and electric field for the same forwardblocking voltage: (a) the asymmetric thyristor and (b) the conventional thyristor. Asymmetric: 因為 n+, 只要 deplete 一點優點 : n1 變薄, Von, t(on) T(off) (stored Q )

48 Figure The gate turn-off thyristor with a negative voltage applied to the gate. The main applications of thyristors. 10

49 Figure The main application of thyristors. 10