Lesson 08 Machine code and Compare & Test
|
|
- Gavin Hart
- 7 years ago
- Views:
Transcription
1 Lesson 08 Machine code and Compare & Test 1. Overview In this lesson, machine code is discussed and the compare & test instructions supported by the Cortex-M3 processor are introduced. Again, only a subset of these instructions will be discussed. The concept and syntax will generally extend to other instructions as you explore them in the Cortex-M3 instruction set. 2. Machine Code Before going any further, let s take a look at how our instructions are actually encoded As mentioned in the previous lessons, the instruction names (mnemonic) are created for users to develop assembly programs, these names are not what the processor can understand. The instructions must be translated into strings of binary machine (or object) code by an assembler such as the Keil assembler. All machine code is half-word (16 bits) aligned. It means that each instruction is either a single 16-bit half-word in that stream, or a 32-bit instruction consisting of two consecutive half-words. In the Keil IDE, the machine code is included in the listing file that is displayed in the disassembly window. In addition to the machine code, the listing also shows the memory locations where the instructions are stored and the original source code. A screenshot of the disassembly window is shown below. Memory Address Machine Code Source Code 1
2 The instruction encoding is explained in chapter A5 in the ARMv7-M Architecture Reference Manual document. For example, the machine code for the MOVW instruction with 16-bit constant is encoded with From ARMv7-M Architecture Reference Manual, ARM Limited, As we can see from the screenshot above, instruction movw r6, #0xC038 is encoded as 0xF24C0638. Let s look closely at how the encoding method was applied for this instruction. The constant to be loaded is 0xC038, so we can extract imm4, i, imm3, and imm8 fields as 0xC038 = Since the destination register (Rd) is R6, the RD field in the machine code is Now, we can encode the instruction movw r6, #0xC038 as The hex value for the machine code is: 0xF24C0638 (same as in example screenshot) Example: Find the machine code for movw r9, #0xA9C8. 0xA9C8 = 0b imm4 = 1010 i = 1 imm3 = 001 imm8 = Rd = 1001 So, the machine code for movw r9, #0xA9C8 is The hex value for the machine code is: 0xF64A19C8 2
3 Example: Find the machine code for movs r4, #0x003D. Since the constant is an 8-bit number and the destination register is a lower register, we can use 16-bit version of the movs instruction. From the ARMv7-M Architecture Reference Manual document, we have Machine code: = 0x243D 3. Compare and Test The compare and test instructions are used to update the status flags in the APSR (N, Z, C, and V). From The Definitive Guide to ARM Cortex-M3 and Cortex-M4 Processors, Joseph Yiu, Elsevier, 3 nd ed,
4 It is important to note that these instructions do not alter the contents of the registers they utilize. Essentially, these instructions perform the specified operation and set the flags based on the result, but do not store the result. For example: CMP R0, R1 CMN R0, R1 TST R0, R1 TEQ R0, R1 ; Subtraction (compare) ; Calculates R0 R1 and sets the flags based on the result ; Addition (compare negative) ; Calculates R0 + R1 and sets the flags based on the result ; Bitwise AND ; Calculates R0 & R1 and sets the flags based on the result ; Bitwise XOR ; Calculates R0 ^ R1 and sets the flags based on the result Another form of these instructions can be used to operate between one register and an immediate constant value. For example: CMP R0, #0x12 TST R0, #0x12 TEQ R0, #0x12 ; Calculates R0 #0x12 and sets the flags based on the result ; Calculates R0 & #0x12 and sets the flags based on the result ; Calculates R0 ^ #0x12 and sets the flags based on the result Example: Given the initial values for R0 through R7 in the table below, complete the table on the right to show the values of the flags after the execution of the following instructions. Before Code After Register Content R0 0x R1 0x R2 0x0000f000 R3 0x R4 R5 R6 R7 CMP R0, R1 CMP R1, R0 TST R1, R2 TEQ R0, R3 TEQ R2, #0xf000 N Z C V: 0b1001 N Z C V: 0b0011 N Z C V: 0b0111 (NZ only) N Z C V: 0b0111 (NZ only) N Z C V: 0b0101 C bit is impacted because barrel shifter is used. Notes: CMP is used to compare the relative magnitude of two operands using the N bit. TST is used to see if a given bits or bit(s) are cleared. If they are, then the result is zero (Z = 1). TEQ is used to check if two operands are equal. If they are, then the result is zero (Z = 1). 4
5 We often combine these compare and test instructions with conditional branches, as we shall see in the next lesson. Exercise: Write an assembly program to verify the examples above. 4. References [1]. Joseph Yiu, The Definitive Guide to ARM Cortex-M3 and Cortex-M4 Processors, Elsevier, 3 rd ed, [2]. [3]. Jonathan Valvano, Introduction to ARM Cortex-M Microcontroller, 4 nd ed, ARMv7-M Architecture Reference Manual, ARM Limited, [4]. LPC17xx User manual, NXP Semiconductors,
Lesson 16 Analog-to-Digital Converter (ADC)
Lesson 16 Analog-to-Digital Converter (ADC) 1. Overview In this lesson, the Analog-to-Digital Converter (ADC) of the Cortex-M3 is introduced. For detailed description of the features and controlling options
More informationARM Cortex-M3 Assembly Language
ARM Cortex-M3 Assembly Language When a high level language compiler processes source code, it generates the assembly language translation of all of the high level code into a processor s specific set of
More informationThe ARM Architecture. With a focus on v7a and Cortex-A8
The ARM Architecture With a focus on v7a and Cortex-A8 1 Agenda Introduction to ARM Ltd ARM Processors Overview ARM v7a Architecture/Programmers Model Cortex-A8 Memory Management Cortex-A8 Pipeline 2 ARM
More informationTHUMB Instruction Set
5 THUMB Instruction Set This chapter describes the THUMB instruction set. Format Summary 5-2 Opcode Summary 5-3 5. Format : move shifted register 5-5 5.2 Format 2: add/subtract 5-7 5.3 Format 3: move/compare/add/subtract
More informationGraded ARM assembly language Examples
Graded ARM assembly language Examples These examples have been created to help students with the basics of Keil s ARM development system. I am providing a series of examples that demonstrate the ARM s
More informationCSE 141L Computer Architecture Lab Fall 2003. Lecture 2
CSE 141L Computer Architecture Lab Fall 2003 Lecture 2 Pramod V. Argade CSE141L: Computer Architecture Lab Instructor: TA: Readers: Pramod V. Argade (p2argade@cs.ucsd.edu) Office Hour: Tue./Thu. 9:30-10:30
More informationDeveloper Suite ARM. Assembler Guide. Version 1.2. Copyright 2000, 2001 ARM Limited. All rights reserved. ARM DUI 0068B
ARM Developer Suite Version 1.2 Assembler Guide Copyright 2000, 2001 ARM Limited. All rights reserved. ARM DUI 0068B ARM Developer Suite Assembler Guide Copyright 2000, 2001 ARM Limited. All rights reserved.
More informationHOMEWORK # 2 SOLUTIO
HOMEWORK # 2 SOLUTIO Problem 1 (2 points) a. There are 313 characters in the Tamil language. If every character is to be encoded into a unique bit pattern, what is the minimum number of bits required to
More informationLSN 2 Computer Processors
LSN 2 Computer Processors Department of Engineering Technology LSN 2 Computer Processors Microprocessors Design Instruction set Processor organization Processor performance Bandwidth Clock speed LSN 2
More informationARM Instruction Set. ARM7TDMI-S Data Sheet. Final - Open Access
4 ARM Instruction Set This chapter describes the ARM instruction set. 4.1 Instruction Set Summary 4-2 4.2 The Condition Field 4-5 4.3 Branch and Exchange (BX) 4-6 4.4 Branch and Branch with Link (B, BL)
More informationAn Introduction to Assembly Programming with the ARM 32-bit Processor Family
An Introduction to Assembly Programming with the ARM 32-bit Processor Family G. Agosta Politecnico di Milano December 3, 2011 Contents 1 Introduction 1 1.1 Prerequisites............................. 2
More informationEECS 427 RISC PROCESSOR
RISC PROCESSOR ISA FOR EECS 427 PROCESSOR ImmHi/ ImmLo/ OP Code Rdest OP Code Ext Rsrc Mnemonic Operands 15-12 11-8 7-4 3-0 Notes (* is Baseline) ADD Rsrc, Rdest 0000 Rdest 0101 Rsrc * ADDI Imm, Rdest
More informationHigh level code and machine code
High level code and machine code Teacher s Notes Lesson Plan x Length 60 mins Specification Link 2.1.7/cde Programming languages Learning objective Students should be able to (a) explain the difference
More informationThe WIMP51: A Simple Processor and Visualization Tool to Introduce Undergraduates to Computer Organization
The WIMP51: A Simple Processor and Visualization Tool to Introduce Undergraduates to Computer Organization David Sullins, Dr. Hardy Pottinger, Dr. Daryl Beetner University of Missouri Rolla Session I.
More informationMACHINE ARCHITECTURE & LANGUAGE
in the name of God the compassionate, the merciful notes on MACHINE ARCHITECTURE & LANGUAGE compiled by Jumong Chap. 9 Microprocessor Fundamentals A system designer should consider a microprocessor-based
More informationCS101 Lecture 26: Low Level Programming. John Magee 30 July 2013 Some material copyright Jones and Bartlett. Overview/Questions
CS101 Lecture 26: Low Level Programming John Magee 30 July 2013 Some material copyright Jones and Bartlett 1 Overview/Questions What did we do last time? How can we control the computer s circuits? How
More informationBCD (ASCII) Arithmetic. Where and Why is BCD used? Packed BCD, ASCII, Unpacked BCD. BCD Adjustment Instructions AAA. Example
BCD (ASCII) Arithmetic We will first look at unpacked BCD which means strings that look like '4567'. Bytes then look like 34h 35h 36h 37h OR: 04h 05h 06h 07h x86 processors also have instructions for packed
More informationKeil C51 Cross Compiler
Keil C51 Cross Compiler ANSI C Compiler Generates fast compact code for the 8051 and it s derivatives Advantages of C over Assembler Do not need to know the microcontroller instruction set Register allocation
More informationCS201: Architecture and Assembly Language
CS201: Architecture and Assembly Language Lecture Three Brendan Burns CS201: Lecture Three p.1/27 Arithmetic for computers Previously we saw how we could represent unsigned numbers in binary and how binary
More information2011, The McGraw-Hill Companies, Inc. Chapter 3
Chapter 3 3.1 Decimal System The radix or base of a number system determines the total number of different symbols or digits used by that system. The decimal system has a base of 10 with the digits 0 through
More informationProgrammer s Model = model of µc useful to view hardware during execution of software instructions
HC12/S12 Programmer s Model Programmer s Model = model of µc useful to view hardware during execution of software instructions Recall: General Microcontroller/Computer Architecture note: Control Unit &
More informationThe 104 Duke_ACC Machine
The 104 Duke_ACC Machine The goal of the next two lessons is to design and simulate a simple accumulator-based processor. The specifications for this processor and some of the QuartusII design components
More informationUNIVERSITY OF CALIFORNIA, DAVIS Department of Electrical and Computer Engineering. EEC180B Lab 7: MISP Processor Design Spring 1995
UNIVERSITY OF CALIFORNIA, DAVIS Department of Electrical and Computer Engineering EEC180B Lab 7: MISP Processor Design Spring 1995 Objective: In this lab, you will complete the design of the MISP processor,
More informationLet s put together a Manual Processor
Lecture 14 Let s put together a Manual Processor Hardware Lecture 14 Slide 1 The processor Inside every computer there is at least one processor which can take an instruction, some operands and produce
More informationSyscall 5. Erik Jonsson School of Engineering and Computer Science. The University of Texas at Dallas
Syscall 5 System call 5 allows input of numerical data from the keyboard while a program is running. Syscall 5 is a bit unusual, in that it requires the use of register $v0 twice. In syscall 5 (as for
More informationMICROPROCESSOR AND MICROCOMPUTER BASICS
Introduction MICROPROCESSOR AND MICROCOMPUTER BASICS At present there are many types and sizes of computers available. These computers are designed and constructed based on digital and Integrated Circuit
More informationSoftware based Finite State Machine (FSM) with general purpose processors
Software based Finite State Machine (FSM) with general purpose processors White paper Joseph Yiu January 2013 Overview Finite state machines (FSM) are commonly used in electronic designs. FSM can be used
More informationARM Microprocessor and ARM-Based Microcontrollers
ARM Microprocessor and ARM-Based Microcontrollers Nguatem William 24th May 2006 A Microcontroller-Based Embedded System Roadmap 1 Introduction ARM ARM Basics 2 ARM Extensions Thumb Jazelle NEON & DSP Enhancement
More informationX86-64 Architecture Guide
X86-64 Architecture Guide For the code-generation project, we shall expose you to a simplified version of the x86-64 platform. Example Consider the following Decaf program: class Program { int foo(int
More informationSolution for Homework 2
Solution for Homework 2 Problem 1 a. What is the minimum number of bits that are required to uniquely represent the characters of English alphabet? (Consider upper case characters alone) The number of
More informationMigrating Application Code from ARM Cortex-M4 to Cortex-M7 Processors
Migrating Application Code from ARM Cortex-M4 to Cortex-M7 Processors Joseph Yiu and Robert Boys January 2015 Version 1.1 The latest version of this document is here: /appnotes/docs/apnt_270.asp 1 Cortex
More informationBinary Numbers. Binary Octal Hexadecimal
Binary Numbers Binary Octal Hexadecimal Binary Numbers COUNTING SYSTEMS UNLIMITED... Since you have been using the 10 different digits 0, 1, 2, 3, 4, 5, 6, 7, 8, and 9 all your life, you may wonder how
More informationIntroduction. Application Security. Reasons For Reverse Engineering. This lecture. Java Byte Code
Introduction Application Security Tom Chothia Computer Security, Lecture 16 Compiled code is really just data which can be edit and inspected. By examining low level code protections can be removed and
More informationToday. Binary addition Representing negative numbers. Andrew H. Fagg: Embedded Real- Time Systems: Binary Arithmetic
Today Binary addition Representing negative numbers 2 Binary Addition Consider the following binary numbers: 0 0 1 0 0 1 1 0 0 0 1 0 1 0 1 1 How do we add these numbers? 3 Binary Addition 0 0 1 0 0 1 1
More informationInstruction Set Reference
2015.04.02 Set Reference NII51017 Subscribe This section introduces the Nios II instruction word format and provides a detailed reference of the Nios II instruction set. Word Formats There are three types
More informationLecture N -1- PHYS 3330. Microcontrollers
Lecture N -1- PHYS 3330 Microcontrollers If you need more than a handful of logic gates to accomplish the task at hand, you likely should use a microcontroller instead of discrete logic gates 1. Microcontrollers
More informationReturn-oriented programming without returns
Faculty of Computer Science Institute for System Architecture, Operating Systems Group Return-oriented programming without urns S. Checkoway, L. Davi, A. Dmitrienko, A. Sadeghi, H. Shacham, M. Winandy
More informationProgramming Logic controllers
Programming Logic controllers Programmable Logic Controller (PLC) is a microprocessor based system that uses programmable memory to store instructions and implement functions such as logic, sequencing,
More informationADVANCED PROCESSOR ARCHITECTURES AND MEMORY ORGANISATION Lesson-17: Memory organisation, and types of memory
ADVANCED PROCESSOR ARCHITECTURES AND MEMORY ORGANISATION Lesson-17: Memory organisation, and types of memory 1 1. Memory Organisation 2 Random access model A memory-, a data byte, or a word, or a double
More informationInstruction Set Design
Instruction Set Design Instruction Set Architecture: to what purpose? ISA provides the level of abstraction between the software and the hardware One of the most important abstraction in CS It s narrow,
More informationM A S S A C H U S E T T S I N S T I T U T E O F T E C H N O L O G Y DEPARTMENT OF ELECTRICAL ENGINEERING AND COMPUTER SCIENCE
M A S S A C H U S E T T S I N S T I T U T E O F T E C H N O L O G Y DEPARTMENT OF ELECTRICAL ENGINEERING AND COMPUTER SCIENCE 1. Introduction 6.004 Computation Structures β Documentation This handout is
More informationLecture 3 Addressing Modes, Instruction Samples, Machine Code, Instruction Execution Cycle
Lecture 3 Addressing Modes, Instruction Samples, Machine Code, Instruction Execution Cycle Contents 3.1. Register Transfer Notation... 2 3.2. HCS12 Addressing Modes... 2 1. Inherent Mode (INH)... 2 2.
More informationCentral Processing Unit (CPU)
Central Processing Unit (CPU) CPU is the heart and brain It interprets and executes machine level instructions Controls data transfer from/to Main Memory (MM) and CPU Detects any errors In the following
More informationComputer Science 281 Binary and Hexadecimal Review
Computer Science 281 Binary and Hexadecimal Review 1 The Binary Number System Computers store everything, both instructions and data, by using many, many transistors, each of which can be in one of two
More informationASSEMBLY LANGUAGE PROGRAMMING (6800) (R. Horvath, Introduction to Microprocessors, Chapter 6)
ASSEMBLY LANGUAGE PROGRAMMING (6800) (R. Horvath, Introduction to Microprocessors, Chapter 6) 1 COMPUTER LANGUAGES In order for a computer to be able to execute a program, the program must first be present
More informationCS101 Lecture 11: Number Systems and Binary Numbers. Aaron Stevens 14 February 2011
CS101 Lecture 11: Number Systems and Binary Numbers Aaron Stevens 14 February 2011 1 2 1 3!!! MATH WARNING!!! TODAY S LECTURE CONTAINS TRACE AMOUNTS OF ARITHMETIC AND ALGEBRA PLEASE BE ADVISED THAT CALCULTORS
More informationA Choices Hypervisor on the ARM architecture
A Choices Hypervisor on the ARM architecture Rishi Bhardwaj, Phillip Reames, Russell Greenspan Vijay Srinivas Nori, Ercan Ucan ABSTRACT Choices is an object oriented operating system that runs on the x86
More informationInstruction Set Architecture
Instruction Set Architecture Consider x := y+z. (x, y, z are memory variables) 1-address instructions 2-address instructions LOAD y (r :=y) ADD y,z (y := y+z) ADD z (r:=r+z) MOVE x,y (x := y) STORE x (x:=r)
More informationARM: Assembly Language Programming
School of Design, Engineering & Computing BSc (Hons) Computing BSc (Hons) Software Engineering Management ARM: Assembly Language Programming Stephen Welsh Peter Knaggs December 22, 2003 Contents Contents
More informationCentral Processing Unit Simulation Version v2.5 (July 2005) Charles André University Nice-Sophia Antipolis
Central Processing Unit Simulation Version v2.5 (July 2005) Charles André University Nice-Sophia Antipolis 1 1 Table of Contents 1 Table of Contents... 3 2 Overview... 5 3 Installation... 7 4 The CPU
More informationNotes on Assembly Language
Notes on Assembly Language Brief introduction to assembly programming The main components of a computer that take part in the execution of a program written in assembly code are the following: A set of
More informationNemo 96HD/HD+ MODBUS
18/12/12 Pagina 1 di 28 MULTIFUNCTION FIRMWARE 2.30 Nemo 96HD/HD+ MODBUS COMMUNICATION PROTOCOL CONTENTS 1.0 ABSTRACT 2.0 DATA MESSAGE DESCRIPTION 2.1 Parameters description 2.2 Data format 2.3 Description
More informationSummary of the MARIE Assembly Language
Supplement for Assignment # (sections.8 -. of the textbook) Summary of the MARIE Assembly Language Type of Instructions Arithmetic Data Transfer I/O Branch Subroutine call and return Mnemonic ADD X SUBT
More informationAdvanced Computer Architecture-CS501. Computer Systems Design and Architecture 2.1, 2.2, 3.2
Lecture Handout Computer Architecture Lecture No. 2 Reading Material Vincent P. Heuring&Harry F. Jordan Chapter 2,Chapter3 Computer Systems Design and Architecture 2.1, 2.2, 3.2 Summary 1) A taxonomy of
More informationEC 362 Problem Set #2
EC 362 Problem Set #2 1) Using Single Precision IEEE 754, what is FF28 0000? 2) Suppose the fraction enhanced of a processor is 40% and the speedup of the enhancement was tenfold. What is the overall speedup?
More informationAn Introduction to the ARM 7 Architecture
An Introduction to the ARM 7 Architecture Trevor Martin CEng, MIEE Technical Director This article gives an overview of the ARM 7 architecture and a description of its major features for a developer new
More informationKeil Debugger Tutorial
Keil Debugger Tutorial Yifeng Zhu December 17, 2014 Software vs Hardware Debug There are two methods to debug your program: software debug and hardware debug. By using the software debug, you do not have
More informationUnpacked BCD Arithmetic. BCD (ASCII) Arithmetic. Where and Why is BCD used? From the SQL Server Manual. Packed BCD, ASCII, Unpacked BCD
BCD (ASCII) Arithmetic The Intel Instruction set can handle both packed (two digits per byte) and unpacked BCD (one decimal digit per byte) We will first look at unpacked BCD Unpacked BCD can be either
More informationCPU Organization and Assembly Language
COS 140 Foundations of Computer Science School of Computing and Information Science University of Maine October 2, 2015 Outline 1 2 3 4 5 6 7 8 Homework and announcements Reading: Chapter 12 Homework:
More informationSection 29. Instruction Set
M Section 29. Instruction Set HIGHLIGHTS This section of the manual contains the following major topics: 29. Introduction...29-2 29.2 Instruction Formats...29-4 29.3 Special Function Registers as Source/Destination...29-6
More informationThe AVR Microcontroller and C Compiler Co-Design Dr. Gaute Myklebust ATMEL Corporation ATMEL Development Center, Trondheim, Norway
The AVR Microcontroller and C Compiler Co-Design Dr. Gaute Myklebust ATMEL Corporation ATMEL Development Center, Trondheim, Norway Abstract High Level Languages (HLLs) are rapidly becoming the standard
More informationDEPARTMENT OF COMPUTER SCIENCE & ENGINEERING Question Bank Subject Name: EC6504 - Microprocessor & Microcontroller Year/Sem : II/IV
DEPARTMENT OF COMPUTER SCIENCE & ENGINEERING Question Bank Subject Name: EC6504 - Microprocessor & Microcontroller Year/Sem : II/IV UNIT I THE 8086 MICROPROCESSOR 1. What is the purpose of segment registers
More informationOn Demand Loading of Code in MMUless Embedded System
On Demand Loading of Code in MMUless Embedded System Sunil R Gandhi *. Chetan D Pachange, Jr.** Mandar R Vaidya***, Swapnilkumar S Khorate**** *Pune Institute of Computer Technology, Pune INDIA (Mob- 8600867094;
More informationl C-Programming l A real computer language l Data Representation l Everything goes down to bits and bytes l Machine representation Language
198:211 Computer Architecture Topics: Processor Design Where are we now? C-Programming A real computer language Data Representation Everything goes down to bits and bytes Machine representation Language
More informationTraditional IBM Mainframe Operating Principles
C H A P T E R 1 7 Traditional IBM Mainframe Operating Principles WHEN YOU FINISH READING THIS CHAPTER YOU SHOULD BE ABLE TO: Distinguish between an absolute address and a relative address. Briefly explain
More informationPolyglot: Automatic Extraction of Protocol Message Format using Dynamic Binary Analysis
Polyglot: Automatic Extraction of Protocol Message Format using Dynamic Binary Analysis Juan Caballero, Heng Yin, Zhenkai Liang Carnegie Mellon University Dawn Song Carnegie Mellon University & UC Berkeley
More informationHow It All Works. Other M68000 Updates. Basic Control Signals. Basic Control Signals
CPU Architectures Motorola 68000 Several CPU architectures exist currently: Motorola Intel AMD (Advanced Micro Devices) PowerPC Pick one to study; others will be variations on this. Arbitrary pick: Motorola
More informationMACHINE INSTRUCTIONS AND PROGRAMS
CHAPTER 2 MACHINE INSTRUCTIONS AND PROGRAMS CHAPTER OBJECTIVES In this chapter you will learn about: Machine instructions and program execution, including branching and subroutine call and return operations
More informationChapter 9 Computer Design Basics!
Logic and Computer Design Fundamentals Chapter 9 Computer Design Basics! Part 2 A Simple Computer! Charles Kime & Thomas Kaminski 2008 Pearson Education, Inc. (Hyperlinks are active in View Show mode)
More informationVLE 16-bit and 32-bit Instruction Length Decode Algorithm
Freescale Semiconductor Document Number: AN4648 Application Note Rev. 1, 3/2013 VLE 16-bit and 32-bit Instruction Length Decode Algorithm by: Pavel Bohacik 1 Introduction The Qorivva MPC56xx 32-bit microcontroller
More informationMicroprocessor and Microcontroller Architecture
Microprocessor and Microcontroller Architecture 1 Von Neumann Architecture Stored-Program Digital Computer Digital computation in ALU Programmable via set of standard instructions input memory output Internal
More informationIntroduction to MIPS Assembly Programming
1 / 26 Introduction to MIPS Assembly Programming January 23 25, 2013 2 / 26 Outline Overview of assembly programming MARS tutorial MIPS assembly syntax Role of pseudocode Some simple instructions Integer
More informationROM Monitor. Entering the ROM Monitor APPENDIX
APPENDIX B This appendix describes the Cisco router ROM monitor (also called the bootstrap program). The ROM monitor firmware runs when the router is powered up or reset. The firmware helps to initialize
More informationDigital Electronics Detailed Outline
Digital Electronics Detailed Outline Unit 1: Fundamentals of Analog and Digital Electronics (32 Total Days) Lesson 1.1: Foundations and the Board Game Counter (9 days) 1. Safety is an important concept
More informationApplication Note 195. ARM11 performance monitor unit. Document number: ARM DAI 195B Issued: 15th February, 2008 Copyright ARM Limited 2007
Application Note 195 ARM11 performance monitor unit Document number: ARM DAI 195B Issued: 15th February, 2008 Copyright ARM Limited 2007 Copyright 2007 ARM Limited. All rights reserved. Application Note
More informationAdministration. Instruction scheduling. Modern processors. Examples. Simplified architecture model. CS 412 Introduction to Compilers
CS 4 Introduction to Compilers ndrew Myers Cornell University dministration Prelim tomorrow evening No class Wednesday P due in days Optional reading: Muchnick 7 Lecture : Instruction scheduling pr 0 Modern
More informationGoals. Unary Numbers. Decimal Numbers. 3,148 is. 1000 s 100 s 10 s 1 s. Number Bases 1/12/2009. COMP370 Intro to Computer Architecture 1
Number Bases //9 Goals Numbers Understand binary and hexadecimal numbers Be able to convert between number bases Understand binary fractions COMP37 Introduction to Computer Architecture Unary Numbers Decimal
More informationA-level COMPUTER SCIENCE
A-level COMPUTER SCIENCE Paper 2 TBC am/pm 2 hours 30 minutes Materials There are no additional materials required for this paper. Instructions Use black ink or black ball-point pen. Fill in the boxes
More informationUseful Number Systems
Useful Number Systems Decimal Base = 10 Digit Set = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9} Binary Base = 2 Digit Set = {0, 1} Octal Base = 8 = 2 3 Digit Set = {0, 1, 2, 3, 4, 5, 6, 7} Hexadecimal Base = 16 = 2
More information64-Bit NASM Notes. Invoking 64-Bit NASM
64-Bit NASM Notes The transition from 32- to 64-bit architectures is no joke, as anyone who has wrestled with 32/64 bit incompatibilities will attest We note here some key differences between 32- and 64-bit
More informationNumber Representation
Number Representation CS10001: Programming & Data Structures Pallab Dasgupta Professor, Dept. of Computer Sc. & Engg., Indian Institute of Technology Kharagpur Topics to be Discussed How are numeric data
More informationMICROPROCESSOR. Exclusive for IACE Students www.iace.co.in iacehyd.blogspot.in Ph: 9700077455/422 Page 1
MICROPROCESSOR A microprocessor incorporates the functions of a computer s central processing unit (CPU) on a single Integrated (IC), or at most a few integrated circuit. It is a multipurpose, programmable
More informationA single register, called the accumulator, stores the. operand before the operation, and stores the result. Add y # add y from memory to the acc
Other architectures Example. Accumulator-based machines A single register, called the accumulator, stores the operand before the operation, and stores the result after the operation. Load x # into acc
More informationChapter 7D The Java Virtual Machine
This sub chapter discusses another architecture, that of the JVM (Java Virtual Machine). In general, a VM (Virtual Machine) is a hypothetical machine (implemented in either hardware or software) that directly
More informationPART B QUESTIONS AND ANSWERS UNIT I
PART B QUESTIONS AND ANSWERS UNIT I 1. Explain the architecture of 8085 microprocessor? Logic pin out of 8085 microprocessor Address bus: unidirectional bus, used as high order bus Data bus: bi-directional
More informationApplication Note. Introduction AN2471/D 3/2003. PC Master Software Communication Protocol Specification
Application Note 3/2003 PC Master Software Communication Protocol Specification By Pavel Kania and Michal Hanak S 3 L Applications Engineerings MCSL Roznov pod Radhostem Introduction The purpose of this
More informationCaml Virtual Machine File & data formats Document version: 1.4 http://cadmium.x9c.fr
Caml Virtual Machine File & data formats Document version: 1.4 http://cadmium.x9c.fr Copyright c 2007-2010 Xavier Clerc cadmium@x9c.fr Released under the LGPL version 3 February 6, 2010 Abstract: This
More informationComputer Organization and Architecture
Computer Organization and Architecture Chapter 11 Instruction Sets: Addressing Modes and Formats Instruction Set Design One goal of instruction set design is to minimize instruction length Another goal
More informationLecture 7: Machine-Level Programming I: Basics Mohamed Zahran (aka Z) mzahran@cs.nyu.edu http://www.mzahran.com
CSCI-UA.0201-003 Computer Systems Organization Lecture 7: Machine-Level Programming I: Basics Mohamed Zahran (aka Z) mzahran@cs.nyu.edu http://www.mzahran.com Some slides adapted (and slightly modified)
More informationChapter 4 Register Transfer and Microoperations. Section 4.1 Register Transfer Language
Chapter 4 Register Transfer and Microoperations Section 4.1 Register Transfer Language Digital systems are composed of modules that are constructed from digital components, such as registers, decoders,
More informationVolume Serial Numbers and Format Date/Time Verification
Volume Serial Numbers and Format Date/Time Verification Written by Craig Wilson, MSc MBCS CITP Digital Detective Group October 2003 (updated June 2005) Table of Contents Table of Contents... 2 Introduction...
More informationMachine Architecture and Number Systems. Major Computer Components. Schematic Diagram of a Computer. The CPU. The Bus. Main Memory.
1 Topics Machine Architecture and Number Systems Major Computer Components Bits, Bytes, and Words The Decimal Number System The Binary Number System Converting from Decimal to Binary Major Computer Components
More informationDongwoo Kim : Hyeon-jeong Lee s Husband
2/ 32 Who we are Dongwoo Kim : Hyeon-jeong Lee s Husband Ph.D. Candidate at Chungnam National University in South Korea Majoring in Computer Communications & Security Interested in mobile hacking, digital
More informationCS61: Systems Programing and Machine Organization
CS61: Systems Programing and Machine Organization Fall 2009 Section Notes for Week 2 (September 14 th - 18 th ) Topics to be covered: I. Binary Basics II. Signed Numbers III. Architecture Overview IV.
More informationMicroprocessor/Microcontroller. Introduction
Microprocessor/Microcontroller Introduction Microprocessor/Microcontroller microprocessor - also known as a CU or central processing unit - is a complete computation engine that is fabricated on a single
More informationSIM-PL: Software for teaching computer hardware at secondary schools in the Netherlands
SIM-PL: Software for teaching computer hardware at secondary schools in the Netherlands Ben Bruidegom, benb@science.uva.nl AMSTEL Instituut Universiteit van Amsterdam Kruislaan 404 NL-1098 SM Amsterdam
More informationADVANCED PROCESSOR ARCHITECTURES AND MEMORY ORGANISATION Lesson-12: ARM
ADVANCED PROCESSOR ARCHITECTURES AND MEMORY ORGANISATION Lesson-12: ARM 1 The ARM architecture processors popular in Mobile phone systems 2 ARM Features ARM has 32-bit architecture but supports 16 bit
More informationAssembly Language Programming
Assembly Language Programming Assemblers were the first programs to assist in programming. The idea of the assembler is simple: represent each computer instruction with an acronym (group of letters). Eg:
More informationHere is a diagram of a simple computer system: (this diagram will be the one needed for exams) CPU. cache
Computer Systems Here is a diagram of a simple computer system: (this diagram will be the one needed for exams) CPU cache bus memory controller keyboard controller display controller disk Computer Systems
More information1. Convert the following base 10 numbers into 8-bit 2 s complement notation 0, -1, -12
C5 Solutions 1. Convert the following base 10 numbers into 8-bit 2 s complement notation 0, -1, -12 To Compute 0 0 = 00000000 To Compute 1 Step 1. Convert 1 to binary 00000001 Step 2. Flip the bits 11111110
More information