M68HC11E Family. Data Sheet. HC11 Microcontrollers. freescale.com. M68HC11E Rev /2005
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1 M68HCE Family Data Sheet HC Microcontrollers M68HCE Rev. 5. 7/25 freescale.com
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3 MC68HCE Family Data Sheet To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information available, refer to: The following revision history table summarizes changes contained in this document. For your convenience, the page number designators have been linked to the appropriate location. Freescale and the Freescale logo are trademarks of Freescale Semiconductor, Inc. Freescale Semiconductor, Inc., 25. All rights reserved. Freescale Semiconductor 3
4 Revision History Date Revision Level May, 2 3. June, December, July, 22 4 June, 23 5 Revision History Description Page Number(s) System Configuration Register Addition to NOCOP bit description 44 Added.2 EPROM Characteristics 75.2 EPROM Characteristics For clarity, addition to note 2 following the table Serial Communications Control Register SCCR bit 4 (M) description corrected.7 MC68LE9/E2 DC Electrical Characteristics Title changed to include the MC68LE MC68LE9/E2 Supply Currents and Power Dissipation Title changed to include the MC68LE2 54. MC68LE9/E2 Control Timing Title changed to include the MC68LE MC68LE9/E2 Peripheral Port Timing Title changed to include the MC68LE MC68LE9/E2 Analog-to-Digital Converter Characteristics Title changed to include the MC68LE MC68LE9/E2 Expansion Bus Timing Characteristics Title changed to include the MC68LE MC68LE9/E2 Serial Peirpheral Interface Characteristics Title changed to include the MC68LE2 72 Title changed to include the MC68LE Extended Voltage Device Ordering Information (3. Vdc to 5.5 Vdc) Updated table to include MC68L2 8 Format updated to current publications standards Throughout.4.6 Non-Maskable Interrupt (XIRQ/VPPE) Added Caution note pertaining to EPROM programming of the MC68HC7E9 device only Port C Clarified description of DDRC[7:] bits.2 EPROM Characteristics Added note pertaining to EPROM programming of the MC68HC7E9 device only. 75 July, Updated to meet Freescale identity guidelines. Throughout 4 Freescale Semiconductor
5 List of Chapters Chapter General Description Chapter 2 Operating Modes and On-Chip Memory Chapter 3 Analog-to-Digital (A/D) Converter Chapter 4 Central Processor Unit (CPU) Chapter 5 Resets and Interrupts Chapter 6 Parallel Input/Output (I/O) Ports Chapter 7 Serial Communications Interface (SCI) Chapter 8 Serial Peripheral Interface (SPI) Chapter 9 Timing Systems Chapter Electrical Characteristics Chapter Ordering Information and Mechanical Specifications Appendix A Development Support Appendix B EVBU Schematic AN6 M68HC Bootstrap Mode EB84 Enabling the Security Feature on the MC68HC7E9 Devices with PCbug on the M68HC7E9PGMR EB88 Enabling the Security Feature on M68HC8E2 Devices with PCbug on the M68HC7E9PGMR EB296 Programming MC68HC7E9 Devices with PCbug and the M68HCEVBU Freescale Semiconductor 5
6 List of Chapters 6 Freescale Semiconductor
7 Table of Contents Chapter General Description. Introduction Features Structure Pin Descriptions V DD and V SS RESET Crystal Driver and External Clock Input (XTAL and EXTAL) E-Clock Output (E) Interrupt Request (IRQ) Non-Maskable Interrupt (XIRQ/V PPE ) MODA and MODB (MODA/LIR and MODB/V STBY ) V RL and V RH STRA/AS STRB/R/W Port Signals Port A Port B Port C Port D Port E Chapter 2 Operating Modes and On-Chip Memory 2. Introduction Operating Modes Single-Chip Mode Expanded Mode Test Mode Bootstrap Mode Memory Map RAM and Input/Output Mapping Mode Selection System Initialization System Configuration Register RAM and I/O Mapping Register System Configuration Options Register EPROM/OTPROM Programming an Individual EPROM Address Programming the EPROM with Downloaded Data Freescale Semiconductor 7
8 Table of Contents EPROM and EEPROM Programming Control Register EEPROM EEPROM and CONFIG Programming and Erasure Block Protect Register EPROM and EEPROM Programming Control Register EEPROM Bulk Erase EEPROM Row Erase EEPROM Byte Erase CONFIG Register Programming EEPROM Security Chapter 3 Analog-to-Digital (A/D) Converter 3. Introduction Overview Multiplexer Analog Converter Digital Control Result Registers A/D Converter Clocks Conversion Sequence A/D Converter Power-Up and Clock Select Conversion Process Channel Assignments Single-Channel Operation Multiple-Channel Operation Operation in Stop and Wait Modes A/D Control/Status Register A/D Converter Result Registers Chapter 4 Central Processor Unit (CPU) 4. Introduction CPU Registers Accumulators A, B, and D Index Register X (IX) Index Register Y (IY) Stack Pointer (SP) Program Counter (PC) Condition Code Register (CCR) Carry/Borrow (C) Overflow (V) Zero (Z) Negative (N) Interrupt Mask (I) Half Carry (H) X Interrupt Mask (X) STOP Disable (S) Freescale Semiconductor
9 4.3 Data Types Opcodes and Operands Addressing Modes Immediate Direct Extended Indexed Inherent Relative Instruction Set Chapter 5 Resets and Interrupts 5. Introduction Resets Power-On Reset (POR) External Reset (RESET) Computer Operating Properly (COP) Reset Clock Monitor Reset System Configuration Options Register Configuration Control Register Effects of Reset Central Processor Unit (CPU) Memory Map Timer Real-Time Interrupt (RTI) Pulse Accumulator Computer Operating Properly (COP) Serial Communications Interface (SCI) Serial Peripheral Interface (SPI) Analog-to-Digital (A/D) Converter System Reset and Interrupt Priority Highest Priority Interrupt and Miscellaneous Register Interrupts Interrupt Recognition and Register Stacking Non-Maskable Interrupt Request (XIRQ) Illegal Opcode Trap Software Interrupt (SWI) Maskable Interrupts Reset and Interrupt Processing Low-Power Operation Wait Mode Stop Mode Freescale Semiconductor 9
10 Table of Contents Chapter 6 Parallel Input/Output (I/O) Ports 6. Introduction Port A Port B Port C Port D Port E Handshake Protocol Parallel I/O Control Register Chapter 7 Serial Communications Interface (SCI) 7. Introduction Data Format Transmit Operation Receive Operation Wakeup Feature Idle-Line Wakeup Address-Mark Wakeup SCI Error Detection SCI Registers Serial Communications Data Register Serial Communications Control Register Serial Communications Control Register Serial Communication Status Register Baud Rate Register Status Flags and Interrupts Receiver Flags Chapter 8 Serial Peripheral Interface (SPI) 8. Introduction Functional Description SPI Transfer Formats Clock Phase and Polarity Controls SPI Signals Master In/Slave Out Master Out/Slave In Serial Clock Slave Select SPI System Errors SPI Registers Serial Peripheral Control Register Serial Peripheral Status Register Serial Peripheral Data I/O Register Freescale Semiconductor
11 Chapter 9 Timing Systems 9. Introduction Timer Structure Input Capture Timer Control Register Timer Input Capture Registers Timer Input Capture 4/Output Compare 5 Register Output Compare Timer Output Compare Registers Timer Compare Force Register Output Compare Mask Register Output Compare Data Register Timer Counter Register Timer Control Register Timer Interrupt Mask Register Timer Interrupt Flag Register Timer Interrupt Mask 2 Register Timer Interrupt Flag Register Real-Time Interrupt (RTI) Timer Interrupt Mask Register Timer Interrupt Flag Register Pulse Accumulator Control Register Computer Operating Properly (COP) Watchdog Function Pulse Accumulator Pulse Accumulator Control Register Pulse Accumulator Count Register Pulse Accumulator Status and Interrupt Bits Chapter Electrical Characteristics. Introduction Maximum Ratings for Standard and Extended Voltage Devices Functional Operating Range Thermal Characteristics DC Electrical Characteristics Supply Currents and Power Dissipation MC68LE9/E2 DC Electrical Characteristics MC68LE9/E2 Supply Currents and Power Dissipation Control Timing MC68LE9/E2 Control Timing Peripheral Port Timing MC68LE9/E2 Peripheral Port Timing Analog-to-Digital Converter Characteristics MC68LE9/E2 Analog-to-Digital Converter Characteristics Freescale Semiconductor
12 Table of Contents.5 Expansion Bus Timing Characteristics MC68LE9/E2 Expansion Bus Timing Characteristics Serial Peripheral Interface Timing Characteristics MC68LE9/E2 Serial Peirpheral Interface Characteristics EEPROM Characteristics MC68LE9/E2 EEPROM Characteristics EPROM Characteristics Chapter Ordering Information and Mechanical Specifications. Introduction Standard Device Ordering Information Custom ROM Device Ordering Information Extended Voltage Device Ordering Information (3. Vdc to 5.5 Vdc) Pin Plastic-Leaded Chip Carrier (Case 778) Pin Windowed Ceramic-Leaded Chip Carrier (Case 778B) Pin Quad Flat Pack (Case 84C) Pin Thin Quad Flat Pack (Case 848D) Pin Dual in-line Package (Case 859) Pin Plastic DIP (Case 767) Appendix A Development Support A. Introduction A.2 M68HC E-Series Development Tools A.3 EVS Evaluation System A.4 Modular Development System (MMDS) A.5 SPGMR Serial Programmer for M68HC MCUs Appendix B EVBU Schematic AN6 M68HC Bootstrap Mode EB84 Enabling the Security Feature on the MC68HC7E9 Devices with PCbug on the M68HC7E9PGMR EB88 Enabling the Security Feature on M68HC8E2 Devices with PCbug on the M68HC7E9PGMR EB296 Programming MC68HC7E9 Devices with PCbug and the M68HCEVBU Freescale Semiconductor
13 Chapter General Description. Introduction This document contains a detailed description of the M68HC E series of 8-bit microcontroller units (MCUs). These MCUs all combine the M68HC central processor unit (CPU) with high-performance, on-chip peripherals. The E series is comprised of many devices with various configurations of: Random-access memory (RAM) Read-only memory (ROM) Erasable programmable read-only memory (EPROM) Electrically erasable programmable read-only memory (EEPROM) Several low-voltage devices are also available. With the exception of a few minor differences, the operation of all E-series MCUs is identical. A fully static design and high-density complementary metal-oxide semiconductor (HCMOS) fabrication process allow the E-series devices to operate at frequencies from 3 MHz to dc with very low power consumption..2 Features Features of the E-series devices include: M68HC CPU Power-saving stop and wait modes Low-voltage devices available ( Vdc), 256, 52, or 768 bytes of on-chip RAM, data retained during standby, 2, or 2 Kbytes of on-chip ROM or EPROM, 52, or 248 bytes of on-chip EEPROM with block protect for security 248 bytes of EEPROM with selectable base address in the MC68HC8E2 Asynchronous non-return-to-zero (NRZ) serial communications interface (SCI) Additional baud rates available on MC68HC(7)E2 Synchronous serial peripheral interface (SPI) 8-channel, 8-bit analog-to-digital (A/D) converter 6-bit timer system: Three input capture (IC) channels Four output compare (OC) channels One additional channel, selectable as fourth IC or fifth OC 8-bit pulse accumulator Real-time interrupt circuit Freescale Semiconductor 3
14 General Description Computer operating properly (COP) watchdog system 38 general-purpose input/output (I/O) pins: 6 bidirectional I/O pins input-only pins output-only pins Several packaging options: 52-pin plastic-leaded chip carrier (PLCC) 52-pin windowed ceramic leaded chip carrier (CLCC) 52-pin plastic thin quad flat pack, mm x mm (TQFP) 64-pin quad flat pack (QFP) 48-pin plastic dual in-line package (DIP), MC68HC8E2 only 56-pin plastic shrink dual in-line package,.7-inch lead spacing (SDIP).3 Structure See Figure - for a functional diagram of the E-series MCUs. Differences among devices are noted in the table accompanying Figure -..4 Pin Descriptions M68HC E-series MCUs are available packaged in: 52-pin plastic-leaded chip carrier (PLCC) 52-pin windowed ceramic leaded chip carrier (CLCC) 52-pin plastic thin quad flat pack, mm x mm (TQFP) 64-pin quad flat pack (QFP) 48-pin plastic dual in-line package (DIP), MC68HC8E2 only 56-pin plastic shrink dual in-line package,.7-inch lead spacing (SDIP) Most pins on these MCUs serve two or more functions, as described in the following paragraphs. Refer to Figure -2, Figure -3, Figure -4, Figure -5, and Figure -6 which show the M68HC E-series pin assignments for the PLCC/CLCC, QFP, TQFP, SDIP, and DIP packages. 4 Freescale Semiconductor
15 Pin Descriptions MODA/ LIR MODB/ V STBY XTAL EXTAL E IRQ XIRQ/V PPE* RESET MODE CONTROL OSC CLOCK LOGIC INTERRUPT LOGIC ROM OR EPROM (SEE TABLE) PAI PULSE ACCUMULATOR COP OC2 OC3 OC4 OC5/IC4/OC IC IC2 IC3 PERIODIC INTERRUPT TIMER SYSTEM BUS EXPANSION ADDRESS M68HC CPU ADDRESS/DATA STROBE AND HANDSHAKE PARALLEL I/O R/W AS STRB STRA SERIAL PERIPHERAL INTERFACE SPI SS SCK MOSI MISO EEPROM (SEE TABLE) RAM (SEE TABLE) SERIAL COMMUNICATION INTERFACE SCI TxD RxD V DD V SS A/D CONVERTER CONTROL PORT D PORT E PC7/ADDR7/DATA7 PC6/ADDR6/DATA6 PC5/ADDR5/DATA5 PC4/ADDR4/DATA4 PC3/ADDR3/DATA3 PC2/ADDR2/DATA2 PC/ADDR/DATA PC/ADDR/DATA PE7/AN7 PE6/AN6 PE5/AN5 PE4/AN4 PE3/AN3 PE2/AN2 PE/AN PE/AN V RH V RL CONTROL STRB/R/W STRA/AS PD5/SS PD/RxD PORT A PORT B PORT C PA7/PAI PA6/OC2/OC PA5/OC3/OC PA4/OC4/OC PA3/OC5/IC4/OC PA2/IC PA/IC2 PA/IC3 PB7/ADDR5 PB6/ADDR4 PB5/ADDR3 PB4/ADDR2 PB3/ADDR PB2/ADDR PB/ADDR9 PB/ADDR8 PD4/SCK PD3/MOSI PD2/MISO PD/TxD * V PPE applies only to devices with EPROM/OTPROM. DEVICE MC68HCE MC68HCE MC68HCE9 MC68HC7E9 MC68HCE2 MC68HC7E2 MC68HC8E2 RAM ROM 2 K 2 K EPROM 2 K 2 K EEPROM Figure -. M68HC E-Series Block Diagram Freescale Semiconductor 5
16 General Description EXTAL STRB/R/W E STRA/AS MODA/LIR MODB/V STBY V SS V RH V RL PE7/AN7 PE3/AN3 PE6/AN6 PE2/AN2 XTAL PC/ADDR/DATA PC/ADDR/DATA PC2/ADDR2/DATA2 PC3/ADDR3/DATA3 PC4/ADDR4/DATA4 PC5/ADDR5/DATA5 PC6/ADDR6/DATA6 PC7/ADDR7/DATA7 RESET * XIRQ/V PPE IRQ PD/RxD PD/TxD PD2/MISO PD3/MOSI PD4/SCK M68HC E SERIES PD5/SS V DD PA7/PAI/OC PA6/OC2/OC PA5/OC3/OC PA4/OC4/OC PA3/OC5/IC4/OC * V PPE applies only to devices with EPROM/OTPROM. 48 PA2/IC PA/IC PE5/AN5 PE/AN PE4/AN4 PE/AN PB/ADDR8 PB/ADDR9 PB2/ADDR PB3/ADDR PB4/ADDR2 PB5/ADDR3 PB6/ADDR4 PB7/ADDR5 PA/IC3 Figure -2. Pin Assignments for 52-Pin PLCC and CLCC 6 Freescale Semiconductor
17 Pin Descriptions PA/IC3 NC NC NC PB7/ADDR5 PB6/ADDR4 PB5/ADDR3 PB4/ADDR2 PB3/ADDR PB2/ADDR PB/ADDR9 PB/ADDR8 PE/AN PE4/AN4 PE/AN PE5/AN5 NC PD/RxD IRQ XIRQ/V () PPE NC RESET PC7/ADDR7/DATA7 PC6/ADDR6/DATA6 PC5/ADDR5/DATA5 PC4/ADDR4/DATA4 PC3/ADDR3/DATA3 PC2/ADDR2/DATA2 PC/ADDR/DATA NC PC/ADDR/DATA XTAL PE2/AN2 PE6/AN6 PE3/AN3 PE7/AN7 V RL V RH V SS V SS MODB/V STBY NC MODA/LIR STRA/AS E STRB/R/W EXTAL NC PA/IC2 PA2/IC PA3/OC5/IC4/OC NC NC PA4/OC4/OC PA5/OC3/OC PA6/OC2/OC PA7/PAI/OC V DD PD5/SS PD4/SCK PD3/MOSI PD2/MISO PD/TxD V SS M68HC E SERIES V PPE applies only to devices with EPROM/OTPROM. Figure -3. Pin Assignments for 64-Pin QFP Freescale Semiconductor 7
18 General Description PA/IC2 PA2/IC PA3/OC5/IC4/OC PA4/OC4/OC PA5/OC3/OC PA6/OC2/OC PA7/PAI/OC V DD PD5/SS PD4/SCK PD3/MOSI PD2/MISO PD/TxD PA/IC3 PB7/ADDR5 PB6/ADDR4 PB5/ADDR3 PB4/ADDR2 PB3/ADDR PB2/ADDR PB/ADDR9 PB/ADDR8 PE/AN PE4/AN4 PE/AN PE5/AN M68HC E SERIES PE2/AN2 PE6/AN6 PE3/AN3 PE7/AN7 V RL V RH V SS MODB/V STBY MODA/LIR STRA/AS E STRB/R/W EXTAL PD/RxD IRQ () XIRQ/V PPE RESET PC7/ADDR7/DATA7 PC6/ADDR6/DATA6 PC5/ADDR5/DATA5 PC4/ADDR4/DATA4 PC3/ADDR3/DATA3 PC2/ADDR2/DATA2 PC/ADDR/DATA PC/ADDR/DATA XTAL. V PPE applies only to devices with EPROM/OTPROM. Figure -4. Pin Assignments for 52-Pin TQFP 8 Freescale Semiconductor
19 Pin Descriptions V SS MODB/V STBY 2 MODA/LIR 3 STRA/AS 4 E STRB/R/W 5 6 EXTAL 7 XTAL 8 PC/ADDR/DATA 9 PC/ADDR/DATA PC2/ADDR2/DATA2 PC3/ADDR3/DATA3 2 PC4/ADDR4/DATA4 3 PC5/ADDR5/DATA5 4 PC6/ADDR6/DATA6 5 PC7/ADDR7/DATA7 6 RESET 7 * XIRQ/V PPE 8 IRQ 9 PD/RxD 2 EV SS 2 PD/TxD 22 PD2/MISO 23 PD3/MOSI 24 PD4/SCK 25 PD5/SS 26 V DD 27 V SS 28 M68HC E SERIES 56 EV SS 55 V RH 54 V RL 53 PE7/AN7 52 PE3/AN3 5 PE6/AN6 5 PE2/AN2 49 PE5/AN5 48 PE/AN 47 PE4/AN4 46 PE/AN 45 PB/ADDR8 44 PB/ADDR9 43 PB2/ADDR 42 PB3/ADDR 4 PB4/ADDR2 4 PB5/ADDR3 39 PB6/ADDR4 38 PB7/ADDR5 37 PA/IC3 36 PA/IC2 35 PA2/IC PA3/OC5/IC4/OC PA4/OC4/OC PA5/OC3/OC PA6/OC2/OC PA7/PAI/OC EV DD * V PPE applies only to devices with EPROM/OTPROM. Figure -5. Pin Assignments for 56-Pin SDIP Freescale Semiconductor 9
20 General Description PA7/PAI/OC PA6/OC2/OC 2 PA5/OC3/OC 3 PA4/OC4/OC 4 PA3/OC5/IC4/OC 5 PA2/IC 6 PA/IC2 7 PA/IC3 8 PB7/ADDR5 PB6/ADDR4 PB5/ADDR3 PB4/ADDR2 PB3/ADDR PB2/ADDR PB/ADDR9 PB/ADDR8 PE/AN PE/AN PE2/AN2 9 PE3/AN3 2 V RL 2 V RH 22 V SS 23 MODB/V STBY 24 MC68HC8E V DD PD5/SS PD4/SCK PD3/MOSI PD2/MISO PD/TxD PD/RxD IRQ XIRQ RESET PC7/ADDR7/DATA7 PC6/ADDR6/DATA6 PC5/ADDR5/DATA5 PC4/ADDR4/DATA4 PC3/ADDR3/DATA3 PC2/ADDR2/DATA2 PC/ADDR/DATA PC/ADDR/DATA XTAL EXTAL STRB/R/W E STRA/AS MODA/LIR Figure -6. Pin Assignments for 48-Pin DIP (MC68HC8E2) 2 Freescale Semiconductor
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