Experiment #11 BJT filtering


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1 Jonathan Roderick Hakan Durmus Experiment #11 BJT fitering Introduction: Now that the BJT has bn expored in static and dynamic operation, the BJT, combined with what has bn aready presented, may be used as a fiter. This ab wi expore utiizing the canonic ces combined with capacitors to reaize very simpe owpass, bandpass, or highpass fiters. Theory: The canonic ce earned in previous abs can be easiy modified to create simpe fiters. Lowpass fiter: A owpass fiter is reaized by tying the output of the canonic ce to AC ground via a capacitor. The time constant resuting can be easiy cacuated by finding the output resistance of the canonic ce and the oad resistance. In figure 11.1 a owpass fiter using a commonemitter is shown, it is assumed that the transistor is biased in the inear region of operation, so biasing is negected. R C R out V out V s R Figure 11.1 A simpe owpass fiter. Assuming any parasitics from the BJT are insignificant for the frequency range of interest, the time constant and, in this case, the 3dB bandwidth if frequency is approximatey equa to f = (11.1) 1 2 π ( R R )C out So this fiter wi have a first order rooff cause by the capacitor tied to the output. The circuit in figure 11.1 can by inspection determined a owpass fiter. As the frequency of the signa is increased the capacitor acts more and more ike a short circuit to AC ground. Hence the output at high frequencies wi go to zero vots. The transfer function of 1
2 the owpass fiter featured in figure 11.1 can be found using Lapace transform and techniques earned in experiment #6 and is given beow. A v βr R = ( scr + 1)( r + r + r + ( β + 1)( r + R ) ( scr + 1) R s b π e (11.2) Notice how the transfer function is amost identica to the transfer function of a norma commonemitter canonic ce that was give in experiment #6, except for the poe that was added by introducing the capacitor to the topoogy. This efthaf pane poe is what gives the circuit its owpass response. Highpass fiter: A highpass fiter can be achieved by simpy putting a capacitor in series with the signa. You have aready buit and worked with high pass fiters and may have not reaized it. Couping capacitors are nothing more than highpass fiters that are used to bock DC or very ow frequency signas. An exampe of a highpass fiter is shown in figure 11.2, once again biasing has bn negected. r cc C V o r s r V s r Figure 11.2 A simpe highpass fiter. An anaysis on figure 11.2 yieds the foowing transfer function: A V βrccscr rccscr = ( sc( r + r ) + 1)( r + r + r + ( β + 1)( r + r ) ( sc( r + r ) + 1) r cc s b π e cc (11.3) Notice that the transfer function is the about the same as a norma commonemitter ampifier, except this time a efthaf pane poe and an s term in the numerator. This is what gives the high pass fiter it unique feature. By inspection you can determine that equation 11.3 is a transfer function of a highpass fiter. If you take the imit as s goes to infinity, you can s the transfer function reduces the gain magnitude to the parae combination of r and r cc 2
3 divided by r. Taking what was earned from experiment #6, this is exacty what you woud expect from this topoogy if the capacitor was shorted. One quick note, there is no way to reaize a true highpass fiter. The transistor parasitics wi dominate at reay high frequencies and the transfer function magnitude wi diminish. Bandpass: The bandpass presented here is nothing more than a combination of the ow and high pass fiters presented above. It can be sn in figure R 1 R L C L C H R out V out V s R 2 R in R Figure 11.3 A simpe bandpass fiter This bandpass uses a singe poe roup and rooff response for frequency rejection, thus the Q of this topoogy is very imited. The anaysis of figure 11.3 is eft as a preab exercise. Concusion: The fiters presented in this experiment are very mentary and not usefu for most appications. The utiity is imited by the inherenty ow Q that is associated when using fiter with a singe order response. Every fiter presented ony produces a 20dB/dec transitions from the pass band to the stopband. The Saen and Key fiters presented in experiment #3 perform much better due to the higher order responses. The mini project found in in the preab aso introduces the probems associated with biasing. Thus far in the exampes presented for BJY dynamic operation, the transistor was assumed to biased in its inear region. However, biasing does affect the ac response due to the ments nded to estabish the correct Qpoint. One wi find when designing circuits that these ments can have an effect on gain and the time constants of the circuits. Thus carefu design and anaysis is nded to correcty mode the true behavior of a topoogy. 3
4 Reference reading 1) John Choma, Jr. EE348 ecture notes. University of Southern Caifornia. Spring ) David Johns & Ken Martin. Anaog integrated Circuit Design. John Wiey & Sons, Inc., New York, ) Pau R. Gray & Robert G. Meyer. Anaysis and Design of Anaog Integrated Circuits. John Wiey & Sons, Inc., New York,
5 Preab 1) Design a owpass fiter that has a 3dB bandwidth of 10kHz. The BJT shoud be biased into inear operation and suppy a gain of 5. =5V. Verify your design in Spice. 2) Determine the 3dB point and transfer function for the highpass fiter pictured in figure ) Using a 5V suppy, design a highpass fiter that time constant is ocated at 15KHz. The BJT shoud be biased into inear operation and suppy a gain of 1. Verify your design in Spice. 4) Derive the transfer function and determine the Q in terms of circuit ments of the bandpass fiter? Are there any fundamenta imitations to this topoogy? What is the maximum possibe Q that can be obtained? How might you overcome this imitation? 5) In previous abs, the commonemitter canonic ce was used as an ampifier. It was shown in this experiment that a commonemitter coud be used as a fiter. You wi now use what you have earned to design a fiter with gain. For this exercise, you wi first nd to fiter the signa, and then appy a gain to it. A system diagram is shown beow. Input signa Fiter Ampifier Output signa Load With what you have earned so far, woud it be adequate to just repace the boxes with the appropriate canonic ces? 5a) Design the foowing system using the appropriate BJT canonic ces and to expore, identify, and address any design concerns or issues that maybe present. 5b) Modify the above system diagram and present a new system diagram to account for and overcome any design concerns that you discovered. 5c) Redesign the system diagram, buid the necessary circuitry to impement this system and verify your suspicions in Spice. Exampe of one design issue: Is the input impedance of the commonemitter ampifier high enough so that it doesn t affect the time constant of the fiter? If not, how do you design the system so that the impedance of the ampifier doesn t affect the time constant of the fiter? 5
6 Design Specs: Band pass fiter: Center frequency of 10k Hz Bandwidth < 50k Hz Ampifier: Gain of 20 Coector current cannot excd 1mA Load: Suppy: Signas: Spice modes: 300 Ohms ± 5V Input and output signas are both sinusoida votages Input signa nds a magnitude of 10mV (You wi actuay buid this, so you may nd to design a resistor divider to attenuate the output of the function generator if the actua generator that you wi use in ab has a min magnitude that is higher than 10mV) Use spice and the BJT modes that were given in your HW. 6
7 Lab Exercise 1) Buid the owpass fiter that you designed in question #1 of the preab. Verify it has correct dc biasing and is in the inear region of operation. Do a detaied frequency swp and pot its ac response. Does your data match with 10% to what you simuated in Spice? If not, expain why? Make sure, if you are foowing figure 11.1, that you give a dc offset votage to the frequency generator that you use, so the transistor is propery biased in inear operation. 2) Repeat the procedure in the ast question for the highpass fiter you designed for question #3 of the preab. Once again make sure the transistor is biased propery. 3) Design the bandpass fiter shown in figure Choose the vaues of R 1 and R 2 so the votage at the base is 1V. Choose the remaining resistor and capacitor vaues so that your circuit has a gain of 3 and a 10kHz center frequency with the maximum Q that you found in the preab. 4) Buid and test the circuit you designed in part 5 of the preab. Are your resuts with in ±15% of the design specs? If not use the remaining mount of ab time to tweak your design. Try to get your resuts to as cose to a ±15% as possibe. Report any difficuties that you come across as we as any soutions you came up with. 7
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