# Arithmetic Operations

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1 Arithmetic Operations Dongbing Gu School of Computer Science and Electronic Engineering University of Essex UK Spring 2013 D. Gu (Univ. of Essex) Arithmetic Operations Spring / 34

2 Outline 1 Introduction 2 Number Representations 3 Arithmetic Operations 4 Multiplication 5 Division 6 Square Root D. Gu (Univ. of Essex) Arithmetic Operations Spring / 34

3 Introduction Number representation techniques: signed/unsigned integers, two s complement, fixed point and floating point; Arithmetic operation structures: Addition/Subtraction, Multiplication, Division and Square Root; Complex arithmetic operations; FPGA specific arithmetic: Examples of implementing addition and multiplication in a Xilinx Virtex-II Pro FPGA are given. D. Gu (Univ. of Essex) Arithmetic Operations Spring / 34

4 Integer Number Representations Number representation is a fundamental issue in embedded systems. A number representation is limited with finite precision. The representation must be sufficiently accurate to handle the real world input and outputs of the system. The representation must also be efficient in terms of its implementation in hardware. D. Gu (Univ. of Essex) Arithmetic Operations Spring / 34

5 Unsigned Integers - Positive Values Only Unsigned integers can be used to represent non-negative numbers. For example using 8 bits we can represent from 0 to 255: Integer Value Binary Representation D. Gu (Univ. of Essex) Arithmetic Operations Spring / 34

6 2 s Complement A more sensible number system for +ve to ve numbers is 2 s complement which has only one representation of 0 (zero): Positive Numbers Integer Binary Invert all bits and ADD 1 Negative Numbers Integer Binary The 9th bit generated for 0 can be ignored. Note that -128 can be represented but +128 cannot D. Gu (Univ. of Essex) Arithmetic Operations Spring / 34

7 Non-Integer Values What about non-integer values? In DSP systems, we often want to represent signals such as this sine wave: 2 s complement is not much use, e.g. using just two bits gives values - 2, -1, 0, 1 we end up with a large quantization error: Clearly what we need is a representation that can cope with non-integer values. D. Gu (Univ. of Essex) Arithmetic Operations Spring / 34

8 Fixed-point Binary Numbers We can now define what is known as a fixed-point number: a number with a fixed position for the binary point. Bits on the left of the binary point are termed integer bits, and bits on the right of the binary point are termed fractional bits, for example: aaa.bbbbb 3 integer bits, 5 fractional bits This number behaves in a similar way to signed integers: D. Gu (Univ. of Essex) Arithmetic Operations Spring / 34

9 Fixed-point Quantization Consider again the number format: aaa.bbbbb 3 integer bits, 5 fractional bits Numbers between -4 and can be represented, in steps of As there are 8 bits, there are 2 8 = 256 different values. Revisiting our sine wave example, using this fixed-point format: Looks much better. We must always take into account the quantization when using fixed point - it will be +/- 1/2 of the LSB (least significant bit). D. Gu (Univ. of Essex) Arithmetic Operations Spring / 34

10 Truncation In binary, truncation is the process of simply removing bits. This is usually done in a constrained way to convert from a larger to a smaller binary wordlength; Usually truncation is performed on least significant bits (LSBs): The net effect is that we lose precision. D. Gu (Univ. of Essex) Arithmetic Operations Spring / 34

11 Rounding Rounding is a more accurate, but more complicated technique that requires an addition operation than the truncation. This process is equivalent to the technique for decimal rounding, i.e. to go from 7.89 to one decimal place is accomplished by adding 0.05 then truncating to 7.9. Note that rounding is not free it requires one extra full adder. D. Gu (Univ. of Essex) Arithmetic Operations Spring / 34

12 Addition A couple of examples of integer arithmetic: The most important point to note is that when a binary addition is performed, the interpretation of the binary strings as either unsigned integers or 2 s complement integers is valid - the additions are correct either way. D. Gu (Univ. of Essex) Arithmetic Operations Spring / 34

13 Overflow An example of an addition which overflows: The result requires 9 bits from two 8-bit operands. If the ninth bit isn t present, the result becomes = 31, which is incorrect. Overflow has occurred. It is often not acceptable to allow the output width to grow as in the example above. For example, a filter with 128 unit weights has 128 consecutive additions and therefore potentially requires 7 extra bits at the output. D. Gu (Univ. of Essex) Arithmetic Operations Spring / 34

14 Negative overflow We can get negative overflows as well: In this case, we lose the 9th bit (red) and the result wraps round to positive values: = 47. The solution to overflow, both negative and positive, is to ensure that the results of operations will not exceed a certain pre-defined number of bits. For example, with 8 bit operands, we might allow 16 bits, regardless of how many consecutive additions we perform. This can be difficult to achieve in practice, so overflow is a problem. D. Gu (Univ. of Essex) Arithmetic Operations Spring / 34

15 Saturation One method to reduce the effects of overflow is to use a technique known as saturation: When overflow is detected, the result is set to the largest possible value. Generally available in DSP processors - could be done on FPGA but requires additional logic. Very useful technique for dealing with the potential for overflow in, e.g., adaptive filtering algorithms. D. Gu (Univ. of Essex) Arithmetic Operations Spring / 34

16 Xilinx Virtex-II Pro addition D. Gu (Univ. of Essex) Arithmetic Operations Spring / 34

17 Fixed point addition First some examples of decimal non-integer addition: Now in fixed point binary (4 bits integer, 3 bits fractional): Note that for large operands, an extra bit may be required. Care must be taken to interpret the binary point - it must stay in the same location w.r.t. the LSB - this means a change of location w.r.t. the MSB. Subtraction follows the same binary arithmetic as for integers. D. Gu (Univ. of Essex) Arithmetic Operations Spring / 34

18 Multiplication in decimal Starting with an example in decimal: Note that we do = 1070 and then add to it the result of = 856 right-shifted by one column. For each additional column in the second operand, we shift the multiplication of that column with the first operand by another place. D. Gu (Univ. of Essex) Arithmetic Operations Spring / 34

19 Structure for multiplication This example shows a four-bit multiplication: The AND gate connected to a and b performs the selection for each bit. The diagonal structure of the multiplier effectively inserts zeros in the appropriate columns and shifts the operands right. Note that this structure is not for signed 2 s complement (needs modified)! D. Gu (Univ. of Essex) Arithmetic Operations Spring / 34

20 Xilinx Virtex-II Pro Slice multiplication D. Gu (Univ. of Essex) Arithmetic Operations Spring / 34

21 Xilinx Virtex-II Pro multiplication As we can do one bit of a multiply in a slice, we can do an N-bit by 2-bit multiply in N/2 slices. In the example above, we have 4-bit by 2-bit in 2 slices. Perhaps the most important thing to note is that this is very complicated! Tools are designed to automate the process of connecting the components within a slice in order to perform efficient operations. But it is important to note that the tools aren t infinitely clever, and sometimes we need to bear in mind the structure of the FPGA in order to generate an efficient design. D. Gu (Univ. of Essex) Arithmetic Operations Spring / 34

22 ROM-based multipliers Consider a ROM multiplier with 8 bit inputs: 65,536 8-bit locations are required. If input B is constant and B=k only 256 locations are accessed. This constitutes a Constant Coefficient Multiplier (KCM). D. Gu (Univ. of Essex) Arithmetic Operations Spring / 34

23 2 s complement multiplication For one negative and one positive operand just remember to sign extend the negative operand. D. Gu (Univ. of Essex) Arithmetic Operations Spring / 34

24 2s complement multiplication For both operands negative, subtract the last partial product. We use the trick of inverting (negating and adding 1) the last partial product and adding it rather than subtracting. Of course, if both operands are positive, just use the unsigned technique! D. Gu (Univ. of Essex) Arithmetic Operations Spring / 34

25 Fixed Point multiplication Fixed point multiplication is no more awkward than integer multiplication. Again we just need to remember to interpret the position of the binary point correctly D. Gu (Univ. of Essex) Arithmetic Operations Spring / 34

26 On-chip multipliers Many Xilinx FPGAs have various numbers of on-chip multipliers (from 4 to more than 500). These are in hardware on the ASIC, not actually in the user FPGA area, and therefore are permanently available, and they use no slices. They also consume less power than a slice-based equivalent. A and B are 18-bit input operands, and P is the 36-bit product. D. Gu (Univ. of Essex) Arithmetic Operations Spring / 34

27 Division A binary division example is given below. Note that each stage computes an addition or subtraction of the divisor A. The quotient is made up of the carry bits from each addition/subtraction. If the quotient bit is a 0, the next computation is an addition, and if it is a 1, the divisor is subtracted. D. Gu (Univ. of Essex) Arithmetic Operations Spring / 34

28 Division 6 bit non-restoring division array: Note that each cell can perform either addition or subtraction as shown in an earlier slide either S in + B in or S in B in can be selected. D. Gu (Univ. of Essex) Arithmetic Operations Spring / 34

29 The Problem With Division An important aspect of division is to note that the quotient is generated MSB first - unlike multiplication or addition/subtraction! This has implications for the rest of the system. It is unlikely that the quotient can be passed on to the next stage until all the bits are computed - hence slowing down the system! Also, an N by N array has another problem - ripple through adders. Note that we must wait for N full adder delays before the next row can begin its calculations. Unlike multiplication there is no way around this, and as result division is always slower than multiply even when performed on a parallel array - a N by N multiply will run faster than a N by N divide! D. Gu (Univ. of Essex) Arithmetic Operations Spring / 34

30 Pipelining The Division Array The division array shown earlier can be pipelined to increase throughput. D. Gu (Univ. of Essex) Arithmetic Operations Spring / 34

31 Square Root 6 bit non-restoring square root array: D. Gu (Univ. of Essex) Arithmetic Operations Spring / 34

32 Square Root - An Alternative Approach Unfortunately the square root algorithm suffers from the same problems as division although not to the same extent. These are: The result is generated MSB first. Each row has to wait longer and longer for the data it needs from the previous row. A solution is to use memory to store the pre-computed square root values. The input is then used as an address to look up the answer. This can be fast but if the input wordlength is large this approach quickly becomes unfeasible. Another approach is to use memory to look up a partial solution and then use an iterative approach like the Newton-Raphson algorithm to find the final solution. D. Gu (Univ. of Essex) Arithmetic Operations Spring / 34

33 Square Root and Divide - Pythagoras The main appearance of square roots and divides is in advanced adaptive algorithms such as QR using given rotations. For these techniques we often find equations of the form: cos(θ) = x x 2 + y 2 and sin(θ) = y x 2 + y 2 So in fact we actually have to perform two squares, a divide and a square root. (Note that squaring is simpler than multiply!). There are a number of iterative techniques that can be used to calculate square root. (However these routines invariably require multiplies and divides and do not converge in a fixed time.) D. Gu (Univ. of Essex) Arithmetic Operations Spring / 34

34 Conclusions Number representation techniques have been presented. Different methods, their advantages and disadvantages have been introduced; Basic and advanced operations and their implementation in hardware were reviewed; Special attention has been paid to highly effective implementation of addition and multiplication in Xilinx Virtex-II Pro FPGAs; A current generation of DSP algorithms and architectures (QR, least squares, MIMOs) require square root and divide calculations - hence knowledge and support of how to derive these is very important. D. Gu (Univ. of Essex) Arithmetic Operations Spring / 34

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