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1 Lam, C.K. ad Ta, M.T. ad Cox, Sephe M. ad Yeo, K.S. (3) Class D amplifier power sage wih feedback loop. IEEE Trasacios o Power Elecroics, 8 (8). pp ISSN Access from he Uiversiy of Noigham reposiory: hp://epris.oigham.ac.uk/885//lamacoxyeo.pdf Copyrigh ad reuse: The Noigham epris service makes his work by researchers of he Uiversiy of Noigham available ope access uder he followig codiios. This aricle is made available uder he Uiversiy of Noigham Ed User licece ad may be reused accordig o he codiios of he licece. For more deails see: hp://epris.oigham.ac.uk/ed_user_agreeme.pdf A oe o versios: The versio preseed here may differ from he published versio or from he versio of record. If you wish o cie his iem you are advised o cosul he publisher s versio. Please see he reposiory url above for deails o accessig he published versio ad oe ha access may require a subscripio. For more iformaio, please coac epris@oigham.ac.uk

2 hp://dx.doi.org/.9/tpel..37 Class D Amplifier Power Sage wih Feedback Loop Chu Ki Lam, Meg Tog Ta, Sephe M. Cox 3, ad Kia Seg Yeo, Seior Member, IEEE Absrac This paper preses a Secod-Order Pulse Widh Modulaio () feedback loop o improve Power Supply Rejecio (PSR) of ay ope-loop Class-D amplifiers (CDAs). PSR of he audio amplifier has always bee a key parameer i mobile phoe applicaios. I coras o Class AB amplifiers, he poor PSR performace has always bee he major drawback for CDAs wih half-bridge coeced power sage. The proposed feedback loop is fabricaed usig GLOBALFOUNDRIES' (GF s).8 µm CMOS process echology. The measured PSR is more ha 8 db ad he measured Toal Harmoic Disorio (THD) is less ha.4% wih a khz ipu siusoidal es oe. Idex Terms Class D amplifier, half-bridge power sage, PSR, THD, Feedback Loop. C I. INTRODUCTION LASS-D amplifiers (CDAs) are becomig he mos prevale choice for baery operaed audio sysems. This is maily due o heir remarkably high power efficiecy over a large modulaio idex rage [, ]. Fig. (a) depics he basic srucure of a coveioal Ope-Loop aalog CDA. I cosiss of hree basic blocks, amely a aalog Pulse Widh Modulaio () sage, a CDA power sage ad a passive LC low-pass filer. The aalog sage modulaes a ipu audio sigal oo he duy cycle of high frequecy swichig pulses (ypically khz o 4 khz). I has bee repored ha he sage ca be implemeed wih digial meas, hereby leadig o a fully digial audio amplifier soluio [3-5]. This is very desirable as digial CDAs elimiae he eed for a power hugry Digial-o-Aalog Coverer (DAC) o cover he digially sored audio sigal back io aalog form for amplificaio. Rece research shows ha he PCM-o- coversio sage ca geerally be liearized, a he cos of circui complexiy [6-8]. I view of ha, mos digial CDAs are implemeed i a Ope-Loop maer o avoid furher icreasig he desig complexiy of he digial sage. I fac, Ope-Loop digial CDAs ca achieve very good Mauscrip received May,. This work was suppored i par by Mediaek Ic. Sigapore. Chu Ki Lam ad Prof Kia Seg Yeo are wih he School of Elecrical ad Elecroic Egieerig, Nayag Techological Uiversiy, S Sigapore ( lamc@e.u.edu.sg, eksyeo@u.edu.sg). Dr. Meg Tog Ta, was wih he School of Elecrical ad Elecroic Egieerig, Nayag Techological Uiversiy, S Sigapore. He is ow wih he Isiue of Microelecroics ( am@ime.a-sar.edu.sg). 3 Dr. Sephe Cox is wih he School of Mahemaical Scieces, Uiversiy of Noigham, U.K. ( Sephe.Cox@oighm.ac.uk). performace provided ha he power supply rails i he power swichig sage are well regulaed [9]. However, audio amplifiers are ofe coeced o he baery direcly i cell phoe applicaios. The ypical charge ad discharge profile of he baery, ad he GSM TDMA oise caused by he rasmi RF power amplifier i he cell phoes a 7 Hz ofe modulaes he baery volage []. I some cases, he power supply oise a he load ca be parially suppressed by cofigurig he oupu as a bridge ied load as depiced i Fig. (b). However, he half-bridge amplifier power sage as depiced i Fig. (c) is sill adoped by mos of he curre-ar commercial CDA desigs due o is simple srucure, reduced maerial cos ad smaller form facor []. Addiioally, i applicaios such as a audio headphoe amplifier, he halfbridge power sage is more suiable due o he hardware limiaio of he headse coecor []. Sice a Ope-Loop half-bridge amplifier is sigle-eded, here is o commomode or oher form of oise rejecio as i is differeial fullbridge couerpar. Therefore, i is worhwhile o ivesigae a way o improve he power supply rejecio (PSR) of a digial Ope-Loop CDA wih half-bridge power sage. A evide way o miigae he power supply oise is o apply egaive feedback o he aalog sage i aalog CDA [3], alhough a Closed-Loop sage ofe resuls i DC errors ad aliasig errors due o he feedback ripple sigal [4]. Foruaely, hese errors ca be miimized by uilizig a Miimum Aliasig Error (MAE) loop filer as proposed i [4]. O he oher had, a similar echique i Digial CDA ofe requires a Aalog-o-Digial Coverer (ADC) i he feedback pah [5, 6]. This ADC resrics he cos ad performace compeeces of digial amplifiers. Therefore, a more elega error correcio echique is o apply egaive feedback direcly o he power sage isead of he PCM-o- sage []. I his way, he desig complexiy of he digial PCM-o- sage is grealy reduced, ad he requireme of ADC i he feedback pah is also elimiaed. I fac, several feedback echiques had bee developed o improve he PSR of he half-bridge CDA power sage [7-9], however, he improveme made by hese echiques is raher iadequae. I his paper, a aalysis of he desig ad performace of he proposed feedback loop for half-bridge CDA power sage is preseed. I had bee prove by simulaio i [] ha he Secod-Order feedback loop has a very good PSR ad THD performace. Here, he echiques o furher improve he THD performace of he Secod-Order

3 hp://dx.doi.org/.9/tpel..37 feedback loop by aalyzig he causes of is ihere harmoic disorio are discussed. Firs, a mahemaical aalysis of a Firs-Order feedback loop is performed o provide a isigh io is ihere harmoic disorio. To do so, he ipu sigal is assumed o be a ideal sigal derived by Ope-Loop aural samplig of a siusoidal sigal. The simulaio ad pracical measureme resuls based o GF s.8 µm process echology are preseed. I addiio, he THD performace of he proposed Closed-Loop CDA half-bridge power sage uder differe load codiio is also discussed. The oulie of his paper is give as follows: I Secio II, he pulse widh correcio cocep is preseed. I Secio III, he PSR aalysis for he proposed feedback loop is discussed. I secio IV, he THD aalysis for he proposed Firs- ad Secod-Order feedback loop for half-bridge CDA power sage is discussed. Fially, i Secio V, simulaio ad experimeal resuls of a iegraed circui based o he proposed archiecure which combies he beefis of digial ipu wih a aalog feedback loop are preseed. Aalog Sage V DD V SS (b) Half Bridge Oupu Sage Class D Oupu Sage Low Pass Filer (a) Coveioal Ope-Loop Class D amplifier V DD I OUT VDD/ I OUT V SS Fig.. Basic CDA ad is power sage cofiguraios. (c) Full H-Bridge Oupu Sage II. PULSE WIDTH CORRECTION CONCEPT V DD Oe of he uique feaures of CDA is ha he audio reproducio qualiy ca be preserved if he overall pulse area wihi each cycle is maiaied [8]. This ca be furher illusraed by he mahemaical expressio of he effecive average oupu sigal, v o (), ake from he load of ay CDAs as follows. Assumig ha he sigal is geeraed by a balaced power supply sysem, Fig. shows oe cycle wih a period of T. v o dt T ( ) = $ &! # + $ & '! # %( vsd " %( vsd T T dt " = ( d!) V SS v s () where T is he period of a cycle, d is he duy raio of he cycle, v s is he ampliude of he sigal. Equaio () shows ha ay chages i he ampliude of he sigal ca be direcly compesaed by alerig is duy raio wihi he same cycle o maiai he equivale v o (). I view of ha, a feedback sysem should be desiged o ielligely re-modulae he pulse-widh of he sigal i a similar maer o effecively compesae for ay ampliude error iroduced i he CDA oupu power sage. However, i is raher challegig o apply a feedback loop i he CDA power sage due o he followig cosrais. Firs, he sigal a he ipu ad he oupu of he power sage are boh digial. Secod, ay correcio iroduced o improve he PSR ad THD should preferably maiai he swichig frequecy a he oupu for low power dissipaio cosideraios. Third, he correcio sysem should o iroduce harmoic disorio o is oupu durig ormal operaio. v o () v s Cycle -v s dt Fig.. Pulse widh correcio approach. III. FEEDBACK LOOP FOR HALF-BRIDGE CDA POWER STAGE To circumve he cosrais ad o mee he objecives discussed i he previous secio, le us ake a look a a aalog egaive feedback loop [] as depiced i Fig. 3. Noe ha his opology is very similar o he oe used for self-oscillaig (SO) CDAs, despie he fac ha he ipu i his case is a sigal. I oher words, his opology ca be cosidered as a special case of he SO CDAs where a aalog feedback mechaism is applied o he digial sigal. As a resul, he sysem aalysis becomes very complicaed. A very deailed lieariy aalysis of he disorio mechaism for SO CDAs resulig from higher order loop filer had bee preseed i [] ad []. However, very lile lieraure had repored he lieariy aalysis of ipu amplifiers. 5% Duy Cycle Ipu Sigal Ipu + - Coiuous -Time Iegraor Correced Oupu pulses VDD T Noise Compesaio Class D Oupu Sage Low Pass Filer Speaker Load Fig. 3. CDA power sage wih egaive feedback. Oupu pulses wih Supply Noise Low Pass Oupu Sigal Fig. 4(a) ad 4(b) depic he implemeaio of he feedback opology described i Fig. 3 usig a Firs- ad Secod-Order iegraor respecively. The correspodig PSR performace of he proposed desigs was modeled based o he equivale Noise Trasfer Fucio (NTFs) i [] as show i (a) ad (b) for he Firs- ad Secod-Order feedback loop respecively. The deailed aalysis of he liearized comparaor gai K i (a) ad (b) has bee derived by Risbo i [3]. VDD/

4 hp://dx.doi.org/.9/tpel Ipu (a) Ipu (b) R R + - C R C C R R VDD VDD VDD/ VDD/ Fig. 4. A CDA power sage wih (a) Firs-Order feedback loop, ad (b) Secod-Order feedback loop. NTF s ' order & s # ( s) = $! % s + KG " (a) & # $! ( ) $ s! (b) NTFd ' order s = $! K K $ s + s +! % RC RR3CC " where G is he DC gai of he Firs-Order iegraor (G =- /(R*C )), K is he combied liearized gai of he quaizer ad he power sage, ad R! R C! C R = ad C = R + R C + C I geeral, CDA feedback sysems wih higher order loop filer ofe geerae exra disorio o he overall circui [3, -3]. This is eiher due o he DC error (for Closed-Loop sysem uilizig a eve-order loop filer) or he phase modulaio error (for Closed-Loop sysem uilizig a oddorder loop filer) from he high frequecy ripple ha affecs he overall sysem lieariy [4, 3]. I fac, his coclusio is draw based o a Quasi-Saioary Approximaio (QSA), which assumes ha he audio sigal is cosa over oe cycle. Isead, a sysemaic ime domai aalysis was derived for he proposed Secod-Order feedback loop i [4] wihou ay approximaio o fully capure all he olieariy i he sysem. The coclusio draw from [4] are furher discussed i he laer par of his paper. IV. THD ANALYSIS FOR THE PROPOSED CDA POWER STAGE A. Mahemaical aalysis for Firs-Order feedback loop I order o ehace he THD performace of he Secod- Order feedback loop ha was repored i [], a ivesigaio o he THD performace of is Firs-Order couerpar was firs doe o gai some isigh io he THD performace of he geeral feedback loop archiecure. Fig. 5 depics a Malab Simulik model for he Firs-Order feedback loop. A mahemaical aalysis is subsequely derived based o his model. Noice ha he ipu sigal for his model is geeraed by a Ope-Loop Naural Samplig sage. The reaso for ha is o isolae ay poeial o-lieariies geeraed by he feedback loop for aalysis purposes. I addiio, all of he sigal magiudes are ormalized bewee he rage of ±. I is worhwhile o meio here ha a adder is used i he Simulik model o obai he differece bewee he ipu ad oupu sigals isead of a subracor because of he egaive iegraor gai, hus givig rise o a egaive feedback sysem. Thereby, he iegraor performs a firs-order iegraio o he differece sigal, h i (), ad he relay resembles he hyseresis comparaors i Fig. 3. I addiio, he CDA oupu iverer sage is modeled by a simple delay for aalysis purposes. Fig. 6 depics he ime domai waveforms for oe cycle of he feedback loop wih 5% duy raio ipu sigal. Before aalyzig he sigal waveform, he cycle is divided io four phases. I phases ad 3, he ipu sigal (g i ()) ad he ai-phase oupu sigal (g o ()) have he same magiude, resulig i a large cosa iegraor ipu volage (h i ()). Thereby, he iegraor iegraes his cosa volage, resulig i a ramp a is oupu (h o ()) wih a gradie opposie o he polariy of h i () due o he egaive iegraor gai. Subsequely, g o () swiches is sae oce he volage of h o () reaches he hreshold volage of he hyseresis comparaor, ±V, as depiced i Fig. 6. O he oher had, g i () ad g o () have differe volage levels durig phases ad 4. As a resul, he resulig h i () is effecively zero uder his codiio. Therefore, h o () remais a he respecive hreshold volage level uil g i () swiches sae. g i () h i () h o () g o () K + + G s I Ou Forward Gai Iegraor Iegraor Gai K Feedback Gai Relay Class D Oupu Iverer Sage Fig. 5. Malab Simulik model of he proposed Firs-Order feedback loop Uder oise-free codiios, g o () should ideally be he same as g i () wih oly a cosa ime delay. This ca be prove i he followig by usig a similar mahemaical approach as i [5] From he characerisic of he hyseresis comparaor, he followig relaioship ca be obaied: ( ) ( ) # + whe ho > + V g ( ) = ", (3) o! $ whe ho < - V where = upper hreshold volage level of he hyseresis comparaor, = lower hreshold volage level of he hyseresis comparaor. I is assumed ha g i () is modulaed from a riagular waveform wih a carrier frequecy of /T ad he swichig isas of g i () ad g o () i Fig. 6 are deoed by (4). To simplify he aalysis, Table I summarizes he codiio of g i (), g o () ad h i () for each of he ime iervals bewee he swichig isas A, B, C ad D deoed i Fig. 6.

5 hp://dx.doi.org/.9/tpel = ( T + ), B ( T +! ) = ( T + ), D ( T +! ) A! C! =, =. (4) where is a ieger, T+α = a up-swichig isa whe g i () swiches o +, T+β = a dow-swichig isa whe g i () swiches o -, T+γ = a dow-swichig isa whe g o () swiches o -, T+δ = a up-swichig isa whe g o () swiches o +. Based o Fig. 5, he mahemaical expressio for h o () ca be described by he followig equaio: h ( ) = " G h ( d (5)! o i ) where G = DC gai of iegraor. To furher simplify he aalysis, he iiial codiio a he begiig of phase (whe =T+α ) for h o () is assumed o be a he upper hreshold volage level,, of he hyseresis comparaor as show i Fig. 6. Therefore, h ( T) h ( T + ) V =! (6) o o = Wih his iiial codiio defied i (6), equaio (5) ca be easily solved o obai he followig expressio which describes h o () i phase. h ( ) = G [ ( T + α )] V o + As depiced i Fig. 6, he volage level of h o () reaches he lower hreshold volage level,, of he hyseresis comparaor a he ed of phase (whe =T+γ ). Therefore, he fial codiio for (7) is give as: h ( T ) = V o! (7) + " (8) By subsiuig (8) io (7), we obai he expressio describig he imig ierval bewee A <<C. V # = C! A = (9) G [( T + )! ( T + " )] Similarly, he expressio for phase 3 ca be obaied usig he same approach, V [( T + # )! ( T + " )] = D! B = () G Accordig o [5], g i () ad g o () ca be described as: i ( ) = + H ( )! " = #" g () g o ( ) = + H ' ( ) = () where H ()=H(-(T+α )) - H(-(T+β )) H ()=-H(-(T+γ )) + H(-(T+δ )) H() is a sep fucio (H() = for < ad H() = for > ) By subsiuig (9) ad () io (), g o ( ) + H ( T + α ) = = = = + H V G V ( T + β ) G V H (3) G By comparig () ad (3), i ca be cocluded ha g o () for he Firs-Order feedback loop is jus a liear phase shifed versio of g i () by a cosa ime delay of (V/G ). I heory, he Firs-Order feedback loop would o geerae ay ihere harmoic disorio o is ipu referece sigal. Therefore, he oupu audio reproducio qualiy depeds solely o he ipu referece sigal, which is a opic beyod he scope of his paper. However, i is sill advisable o keep his delay o is miimum o avoid sabiliy problems. Hece, he iegraor gai of G should be maximized. I addiio, he NTF i (a) also suggess ha he PSR performace depeds heavily o boh G ad K. Therefore, i is agai advisable o keep boh G ad K as high as possible. Doig so miimizes he ime delay bewee g i () ad g o () as depiced i (3). However, here are some resricios i maximizig G ad K. For isace, if G is desiged o be excessively high, h o () migh saurae (see Fig. 7(a)) o he posiive supply rail while he iegraor is ryig o produce a posiive slope a is oupu whe compesaig for he drop i he supply volage level. O he oher had, if he hyseresis widow widh is oo arrow, oupu pulse spliig migh occur (see Fig. 7(b)) whe he loop is correcig for he posiive supply oise a he power sage. Due o he above meioed cosrais, a higher order iegraor is imperaive o furher ehace he PSR performace isead of idefiiely maximizig boh G ad K. g i () + - g o () + - h i () + - h o () Phase Phase Phase 3 Phase 4 Ipu Oupu Iegraor Ipu Iegraor Oupu T A C B D A + Fig. 6. ipu, oupu, Iegraor ipu ad Iegraor oupu of he proposed Firs-Order feedback loop for CDA power sage wihou ampliude error.

6 hp://dx.doi.org/.9/tpel A < < C (Phase ) TABLE I. INPUT CONDITIONS FOR EACH TIME INTERVAL. C < < B (Phase ) B < < D (Phase 3) D < < A + (Phase 4) g i () g o () h i () + - h o () -G [ (+α )T] -G [ (+β )T] - V (a) clipped correcio sigal due o large hyseresis widow ad high iegraor gai Ipu Sigal Oupu Sigal + Noise Correcio Sigal Hyseresis Widows Clippig Pulse Spliig (b) wih oupu pulse spliig due o arrow hyseresis widow ad high iegraor gai Fig. 7. Simulaed waveforms for a sigle supply Firs-Order feedback loop for CDA power sage B. Causes of Ihere Harmoic Disorio for Secod-Order Feedback Loop Fig. 8 depics a Malab Simulik model for he Secod- Order feedback loop. This model comprises a Firs- Order iegraor wih a gai of G ad a Secod-Order iegraor wih a gai of G. The correcio sigal is produced by summig he Firs- ad Secod-Order iegraor oupu sigals. I had bee show i [] ha he THD of he Secod- Order feedback loop is higher ha is Firs-Order couerpar. Equaio (5) describes he rasfer fucio of he Secod- Order iegraor based o Fig. 4(b). By comparig (5) o Fig. 8, he respecive gai values of G ad G ca be ideified as show i (6) ad (7). H ( ) ( ( ) ) & # o s R3 C + C s + = ' = ' ( ) $ +! (5) H i s s RR3CC % scr s RR3CC " G = (6) CR (7) G =! RR C C 3 where R! R C! C R = ad C = R + R C + C g i () h i () h o () g o () K + G I Ou - + s + Forward Gai Iegraor s Iegraor K Iegraor Gai s Iegraor Feedback Gai G Iegraor Gai Relay Class D Oupu Iverer Sage Fig. 8. Malab Simulik model of he proposed Secod-Order feedback Loop Fig. 9(a) shows he ime domai waveform of he Secod- Order feedback loop i he absece of supply oise. Similar o he aalysis for he Firs-Order desig, h o () is agai divided io four phases i a sigle cycle. However, h o () o loger has a cosa slope i phase ad 3, ad a cosa volage i phase ad 4 i his case. This is due o he Secod-Order iegraig effec o h i (). For isace, he cosa slope i phase ad 3 becomes a correspodig Secod-Order curve (parabola) due o he iegraio of a ramp sigal (firs-order iegraed sigal). Similarly, he cosa value i phase ad 4 becomes a correspodig cosa slope for he same reaso. As derived earlier, he mahemaical harmoic disorio aalysis for he Firs-Order desig was relaively sraighforward. This is because he isaaeous volage value of h o () a he ed of each phase is predicable ad cosise from cycle o cycle regardless of he modulaio idex of g i () uder o oise codiio. I coras, he correspodig mahemaical aalysis for he Secod-Order model is cosiderably more complicaed. I was explaied i [-3] ha he Secod-Order loop filer would always resul i higher disorio ha is Firs-Order couerpar due o he sigifica coribuio of he DC error as a direc cosequece of he ripple sigal [4]. However, he approach adoped i [-3] is based o a Quasi-Saioary Approximaio, which limis he accuracy of he lieariy aalysis. Therefore, a very deailed ad sysemaic mahemaical aalysis for he Secod-Order feedback loop was derived i [4] (see (8) laer). This aalysis proceeds i he ime domai: bewee each swichig isa of he ipu or oupu, he behavior of he amplifier is readily deermied by sraighforward iegraio. The resul is a sysem of differece equaios which are algebraic equaios relaig he iegraor oupus sampled a ime =A + o he correspodig values sampled a ime =A. The key o he aalysis is he observaio ha, while he iegraor oupus hemselves coai boh high-frequecy ad low-frequecy compoes, he sampled values vary oly slowly wih ad hece coai jus audio-frequecy compoes. The dispariy i ime scales bewee he swichig ad he audio sigal he allows he use of sysemaic perurbaio mehods o solve he differece equaios, givig he sampled iegraor oupus as power series i he small parameer ε = ωt, where ω is a ypical agular frequecy of he ipu. The audio oupu of he amplifier may also be calculaed erm-by-erm as a power series i ε. The sysemaic aure of he perurbaio calculaio esures ha: (i) all disorio erms are picked up a each order i ε, ad (ii) oe ca readily esimae he order of magiude of he remaiig disorio erms. The calculaio iself i [4] is highly deailed ad o all iermediae seps have a clear iuiive ierpreaio. However, he key o he

7 hp://dx.doi.org/.9/tpel calculaio is ha a o sage is ay Quasi-Saioary Approximaio made: a o poi is i assumed ha oe may cosider he audio sigal o be effecively cosa over a swichig period. While such a approximaio is good a leadig order, he sligh chages o he audio sigal over a swichig period mus be accoued for i a fully sysemaic reame. For a siusoidal audio ipu σ()= σ si(ω), he audio oupu of he Secod-Order feedback loop, g a (), is clearly also periodic ad so ca be expaded as a Fourier series. I view of he symmeries of he ipu, σ()=-σ() ad σ(+π/ω)=-σ(), i is clear ha oly sies are eeded ad he oly hose whose agular frequecies are odd muliples of ω. Thus g a () ca be expaded as a Fourier sie series of odd harmoics: ( k )! " k+ si + k= where k is a posiive ieger, ω is he agular frequecy of he ipu audio sigal G = σ +O((ωT) ), G k+ = O((ωT) ),ad σ is he oupu audio magiude. a g ( ) = G # (8) Equaio (8) shows ha he origial ipu siusoidal sigal is reproduced a he oupu of he Secod-Order feedback loop wih disorio of order (ωt). I meas ha he oupu harmoic disorio icreases wih he ipu audio frequecy. I geeral, (8) provides us a deailed isigh io he harmoic disorio behavior of he Secod-Order desig. However, i is more pracical o iuiively udersad he causes of harmoic disorio geeraed by he Secod-Order feedback loop from egieerig viewpois. Fig. 9(b) ad 9(c) depic he respecive oupu waveforms, h o (), of he Secod-Order feedback sysem wih wo differe ipu modulaio idexes. The absolue volage differece bewee h o (A ) ad h o (C ) is deoed as ΔV AC, ad similarly, he absolue volage differece bewee h o (B ) ad h o (D ) is deoed as ΔV BD. Based o Fig. 9(b) ad 9(c), ΔV AC ad ΔV BD are o a good approximaio proporioal o he modulaio idex of g i (). Furhermore, he duraio of he ime iervals i phase ad phase 3 depeds heavily o he values of ΔV AC ad ΔV BD, respecively. Pu differely, he ime duraios of phase ad phase 3 vary wih he duy raio of g i (). I coras o he Firs-Order desig, he ime delays i phase ad 3 i his case are o cosise i each cycle eve i he absece of supply oise. Hece, i ca be safely cocluded ha g o () is o a exac reproducio of g i () for he Secod-Order feedback loop. This effec is o very obvious for g i () ha carries low audio frequecy coe. This is because he chage i duy raio bewee adjace cycles would be relaively small for g i () wih low audio frequecy. Therefore, he magiude variaios of ΔV AC ad ΔV BD i he curre cycle compared o hose i he ex cycle are relaively small. However, his effec becomes more promie i a sigal carryig higher audio frequecy coe. This is because he duy raio chages bewee adjace cycles are relaively large. Therefore, he magiude differeces i ΔV AC ad ΔV BD bewee adjace cycles are icreased. I reur, he ime duraio of phase ad phase 3 become very icosise. Aoher poeial cause of harmoic disorio comes from he pulse skippig effec of g o (). This occurs whe g i (B ) ad g i (A + ) swich before h o () seles o is respecive hreshold volage level o rigger g o () o swich saes a C ad D respecively. For isace, he swichig ime sequece becomes A, B, C, D isead of...a, C, B, D uder o oise codiio. This effec arises whe ΔV AC or ΔV BD have a sufficiely high value o cause a very log iegraig ime i phase or phase 3 respecively. I oher words, poeial harmoic disorio would be iroduced whe he sysem is excied by g i () wih high modulaio idex. Also, i is worh meioig here ha his effec is acually cumulaive ad will carry over o he ex cycle. Therefore, harmoic disorio due o pulse skippig is more obvious for lower audio frequecy sigals wih large umber of cosecuive high duy raio pulses. gi() + - go() + - hi() + - ho() Phase A Phase Phase 3 Phase 4 C B D A+ Ipu Oupu Iegraor Ipu Iegraor Oupu gi() + - ho() (b) Duy Cycle of he Ipu sigal < 5% gi() (a) Duy Cycle of he Ipu A C B D A+ sigal = 5% (c) Duy Cycle of he Ipu sigal > 5% Fig. 9. ipu, oupu, Iegraor ipu ad Iegraor oupu of he Secod-Order feedback loop for CDA power sage wihou supply error. C. Proposed THD Ehaceme of he Secod-Order Feedback Loop I order o alleviae he harmoic disorio problem for he Secod-Order feedback desig, oe of he opios is o decrease he gai G. Doig so reduces he maximum value of ΔV AC ad ΔV BD, ad also he edecy owards pulse skippig as described i he previous secio. Based o (5), (6) ad (7), G ca be reduced wihou affecig G by icreasig he value of R 3 i Fig. 4(b). However, he zero i is rasfer fucio (5) would move owards he lower frequecy, ad eveually, a firs-order roll off rae would become domia if he value of R 3 is sufficiely large. As a resul, he PSR performace would deeriorae as he NTF d- Order (b) becomes a firs-order fucio ha is equivale o NTF s-order (a). This would defea he purpose of havig a Secod-Order iegraor i he correcio circui. I order o reduce he harmoic disorio while keepig is Secod-Order PSR performace, a profoud udersadig of how AC ad BD ca be miimized is required. + - ho() A C B D A+

8 hp://dx.doi.org/.9/tpel As meioed i he previous secio, he huge magiude of ΔV AC ad ΔV BD would resul i a large iegraig ime i phase ad phase 3. To miimize he delay ime, he value of AC ad BD mus be reduced. Based o he iegraor correcio mechaism, AC ca be miimized by ieioally icreasig he DC magiude (V c ) of g o (). As a resul, he iegraor would aemp o correc for he ieded DC error by producig a egaive curve i phase 4. Thus, he maximum value of AC would he be reduced. Cosequely, he overall iegraig ime i phase i each cycle would be reduced. However, he maximum magiude of BD is o affeced by simply icreasig he magiude of g o (). Therefore, i is ecessary o reduce he magiude of g i () by he same amou o produce a similar effec i phase. However, he magiude of V c should o be oo large as i migh iroduce a pulse spliig problem i g o () similar o Fig. 7(a). I geeral, i is recommeded ha he opimum isaaeous volage values of h o (A ) ad h o (B ) should be ear o ad respecively whe he sysem is excied by a 5% duy raio ipu sigal uder oisefree codiios as depiced i Fig. (a). Cosequely, he resulig h o () would become similar o he Firs-Order desig i Fig. 6. This codiio ca be summarized as follows: k p( D ) + km( D ) =! (9) k p( C ) + k m( C ) = "! () I his way, he resulig ime delays i phases ad 3 are effecively reduced. As a resul, he cycle-o-cycle ime delay variaios are also miimized. Thereby, he overall harmoic disorio of he sysem is reduced. I his maer, he rasfer fucio of he Secod-Order iegraor is preserved, ad he overall THD of he oupu sigal is herefore improved wihou compromisig he Secod-Order PSR performace. g i () + +C - g o () +C + - h i () + c c - h o () Phase Phase Phase 3 Phase 4 A C B D A + (a) Duy Cycle of he Ipu sigal = 5% g i () + - h o () + - h o () A C B D (b) Duy Cycle of he Ipu sigal < 5% g i () A C A + B D A + (c) Duy Cycle of he Ipu sigal > 5% Fig.. ipu, oupu, Iegraor ipu ad Iegraor oupu of he proposed Ehaced Secod-Order feedback loop for CDA power sage wihou supply error. I order o fid he opimum V c based o he above meioed crierio, he iegraor oupu sigal a each phase ha was defied i [4] has o be re-defied based o Fig.. The re-defied equaio for he iegraor oupu sigal is summarized i Table. Usig a similar approach o ha i [4] wih he codiios as idicaed i (9) ad (), he equaios i able ca be simplified o a cubic equaio for V c as show i (). Therefore, he opimum value of V c ca be easily foud by solvig he cubic equaio (). For example, by solvig he above equaio for V c wih k = , k = , T=5µs, ad =.5, he soluios for V c are V c =.89, V c =.3, V c =-.8. Based o simulaio wih boh Malab Simulik ad Cadece Specre, he opimum value of V c o saisfy he wo codiios where h o (C )=h o (B ) ad h o (D )=h o (A + ) was V c =.3. The egaive value of V c is rivial ad a high V c would lead o pulse spliig problems, which would cosequely icrease he swichig rae. k = 3 Vc " kktvc " 8kVc " 8k! () where defies he hyseresis of he comparaor TABLE II DEFINITION OF THE SECOND-ORDER FEEDBACK LOOP OUTPUT AT DIFFERENT PHASES WITHIN ONE CYCLE A <<C C <<B (phase ) (phase ) s() c c g() c - h i () + -(½)V c m() m() = m(a ) + (-A ) m() = m(c ) - ½V c ( - C ) p() p()= p(a ) + m(a )( - A ) p()= p(c ) + m(c )( - C ) + ½( - A ) - ¼V c ( - C ) B <<D (phase 3) D <<A + (phase 4) s() - - g() - c h i () - (½)V c m() m() = m(b ) - (-B ) m() = m(d ) + ½V c ( - D ) p() p()= p(b ) + m(b )( - B ) p()= p(d ) + m(d )( - D ) - ½( - B ) + ¼V c ( - D ) D. Proposed THD Ehaceme of he Secod-Order Feedback Loop Based o Fig. 4b ad Fig. 8, he simplified sysem loop gai of he Secod-Order loop is show i () ad he loop plo is show i Fig.. ( s + / R3C) loopgai = () s Noe ha () coais a LHP zero a /(R 3 C). Similar o he case i [6], his zero is desiged o be a high frequecy (bu less ha he uiy gai frequecy) o icrease he Ope- Loop phase a high frequecy, hus avoidig he AC isabiliy. I addiio he uiy gai frequecy should be lower ha he swichig frequecy o preve he pulse spliig problem (i.e. muliple high frequecy pulses appearig a he oupu sigal wihi oe cycle.) However, he occurrece of pulse spliig i he oupu

9 hp://dx.doi.org/.9/tpel sigal would o resul i a lieariy problem. I fac, his is very similar o he ripple isabiliy codiio described for he cofiguraio B i [3]. The zero magiude pole i he loop rasfer fucio esured he sabiliy of he Closed-Loop liearized small-sigal sysem, while he ripple isabiliy (i.e. pulse spliig effecs i his case) does o affec he Closed- Loop sysem lieariy [3]. Isead, a exra swichig i he oupu sigal improves he overall THD of he lowpassed audio oupu sigal (as he loop coiues o correc he low frequecy errors) a he expese of he swichig power cosumpio ad circui reliabiliy [3]. O he oher had, a more severe crierio for sabiliy cosideraio is he pulse skippig problem as meioed i he previous secio. I he case of his Secod-Order feedback loop uder oisefree codiios, pulse skippig occurs whe he iegraor gai is o sufficie o produce a oupu sigal ha is fas eough o rack he sigal. I more serious case, oscillaio occurs a he oupu audio sigal. Therefore, he low frequecy gai of he Secod-Order iegraor should be sufficiely high o avoid he pulse skippig problem. Hece, he sysem sabiliy ca be esured. Fig.. Loop gai rasfer fucio of he opimized Secod-Order feedback desig. V. THD ANALYSIS FOR THE PROPOSED CDA POWER STAGE I his secio, he simulaio ad measureme resuls are preseed. The Firs- ad Secod-Order desigs are simulaed usig boh Malab Simulik Model (refer o Fig. 5 ad 8) ad Cadece Specre simulaio wih GF s.8 µm CMOS process (refer o Fig. 4(a) ad 4(b)). I addiio, he proposed desig was fabricaed wih GF s.8 µm CMOS echology ad he micrograph of he es chip is show i Fig.. The circui operaes a 3.3V supply volage ad he maximum uclipped power efficiecy obaied wih a 6 Ω load codiio is 89.5%. I had bee show i [] ha he proposed desig aais a comparable PSR performace, wih much beer THD resuls ha he PowerDac desig ha was iroduced i [7]. I his paper, he sources of harmoic disorio of he proposed desig are ideified, ad verified wih he simulaio ad measureme resuls show i his secio. I his secio, he Secod-Order feedback loop desig discussed i secio IV par B is deoed as d-order Desig. O he oher had, he Secod-Order feedback loop desig wih Ehaced THD performace as iroduced i secio IV par C is deoed as Ehaced d-order Desig. Fig. 3 depics he PSR compariso of he proposed Closed-Loop CDA power sages across he audio bad (from Hz o khz). A 5% duy raio sigal wih a pulse frequecy of 4 khz was firs geeraed by a Naural Samplig modulaor. A siusoidal es oe was he applied o he posiive power supply rail of he CDA power sage o simulae he supply oise codiio. I addiio, a ACBC-DPZ [7] op-amp was used for he iegraor i boh Cadece Specre simulaio ad he acual chip measureme. O he basis of Fig. 3(a) ad (b), he followig observaios are made. ) The PSR for he proposed circuis geerally degrades as he supply oise frequecy icreases. This is due o he high-pass oise shapig effecs as show i (a) ad (b) ) The sligh deviaio i he PSR bewee he simulaio ad measureme resuls is maily due o he oise floor herei. 3) From Fig. 3(a), he PSR resuls for he s-order desig obaied from he Specre simulaio are closely mached o is Malab Simulik Model as well as is s- Order NTF plo derived earlier i (a). I addiio, he simulaio ad he measureme resuls show ha he s-order feedback opology has a PSR of more ha - 6dB a 7 Hz. 4) Boh of he d-order ad he Ehaced d-order desigs have similar PSR performace as hey share he same circui archiecure ad also he same NTF. 5) Fig. 3(b) shows ha boh he d-order desig ad he Ehaced d-order desig aai more ha - db PSR performace a 7 Hz for he simulaio. However, he acual measured PSR is approximaely -8 db. 6) The deviaio i he d-order NTF ad he respecive Specre simulaio, ad also he pracical measuremes, a low frequecy is maily due o he fac ha he Ope- Loop gai of he op-amp is o ake io accou i he NTF derivaio i (b). I coclusio, he proposed d-order iegraor feedback desig archiecures have a much beer PSR performace across he whole audio bad due o he Secod-Order oiseshapig effec. Fig.. Die phoo of he fabricaed chip for he proposed Class D amplifier power sage wih feedback

10 hp://dx.doi.org/.9/tpel (a) (b) PSRR (db) PSRR (db) Measureme Measureme for boh d-order desigs Specre Simulaio for boh d-order desigs Malab Simulik, Specre Simulaio & s order NTF Model (a) Malab Simulik for boh d-order desigs & NTF Model (b) Frequecy (Hz) Fig. 3. Compariso of PSR for he proposed power sage wih (a) s Order feedback loop, ad (b) d-order feedback loop. Fig. 4 depics he THD of he Closed-Loop power sages for differe ipu modulaig sigal frequecies (from Hz o khz). The referece ipu of he CDA power sage is geeraed by modulaig a siusoidal es oe wih a riagular wave carrier frequecy a 4 khz. I is worhwhile o meio here agai ha he ipu sigal is geeraed by ope-loop Naural samplig ad he Class D power sage is implemeed wih zero dead ime because we would like o isolae ad quaify he olieariies geeraed by he proposed Closed-Loop power sages for aalysis. O he basis of Fig. 4, he followig observaios are made. ) The THD resuls i Fig 4(a)-(b) show ha he Malab Simulik Models are closely mached o he Specre Simulaio. ) Based o Fig. 4(a)-(b), he simulaed s-order feedback loop desig aais he lowes THD amog he hree. These resuls verify he earlier coclusio ha o ihere THD was geeraed i he oupu sigal uder ideal codiio for he s-order feedback loop desig. 3) From Fig. 4(b), he simulaed THD resuls verify he aalysis i secio IV ha he THD performace for boh of he d-order ad Ehaced d-order desigs geerally degrades as he frequecy icreases. 4) Followig 3), he proposed Ehaced d-order Desig aais a subsaial improveme i THD performace across he audio bad as compared o he d-order Desig. I oher words, i furher verifies he coclusios i he THD ehaceme aalysis discussed i secio IV, par C. 5) The measured THD is geerally higher ha ha of he simulaed resuls. This is maily due o he oise floor, he qualiy of he LC low-pass filer, process variaio, /f ad hermal oise, power supply spike, groud bouce, subsrae oise due o he high swichig curre, he lieariy of he riagular carrier for he sage, he rise ad fall ime of he sigal, ad he measurig equipme ec, ha was beig used i he measureme.. 6) The measured THD resuls decrease wih he ipu frequecy because of he ieral filerig effec of he measureme devices. Therefore, he harmoics of hose sigals wih higher fudameal frequecy were o capured. (a) (b)..... (Specre) (Simulik) d-order (Specre) (Simulik) (Simulik) (Specre) Ehaced d-order 3 4 Frequecy (Hz) (Measureme) d-order (Measureme) Ehaced d-order (Measureme) Figure 4. THD Performace over differe ipu frequecies a ipu modulaio idex of 8% for (a) s -Order desig, (b) d -Order Desigs Fig. 5 depics he THD of he hree CDA power sages obaied agai by Malab Simulik, Cadece Specre simulaio, as well as pracical measureme over a full oupu power rage for khz ipu siusoidal sigal. The followig observaios are made. ) The resuls obaied from he Malab Simulik model are geerally beer ha hose obaied from he Specre simulaio ad he measureme because he behavior of he acual op-amp ad he process characerisics of he oupu power MOSFET rasisors are igored i he Malab Simulik model. ) Fig. 5(a) shows ha he simulaed THD performace for he s-order desig decreases as he oupu power icreases. Coversely, he simulaed THD resuls for boh he d-order ad he Ehaced d-order Desigs i Fig. 5(b) icrease wih he oupu power. 3) Fig. 5(b) also depics a relaively high simulaed THD resul for he d-order Desig wih oupu power a 54 mw (he correspodig modulaio idex=.9). This is maily due o he large values of AC ad BC, ad he pulse delay effec as explaied i he earlier secio. 4) Followig 3), i is worhwhile o meio here ha he measured THD resuls obaied from he Ehaced d- Order Desig are beer ha hose of he d-order Desig by a leas a facor of wo. I addiio, he Ehaced d-order Desig aais a much beer THD

11 hp://dx.doi.org/.9/tpel..37 performace a oupu power of 54 mw (modulaio idex =.9). (a) (b) s-order (Measureme) s-order (Specre) s-order (Simulik) d-order (Measureme) Ehaced d-order (Measureme) d-order (Specre) d-order (Simulik) Ehaced d-order (Specre) Oupu Power (mw) Ehaced d-order (Simulik) Figure 5. Performace vs oupu power (mw) wih ipu sigal frequecy of khz for (a) s -Order desig, (b) d -Order Desigs As he impedace for mos headphoe speakers varies wih frequecy, i is worhwhile o ivesigae he performace of he proposed s- ad d-order feedback loops agais he oupu load variaios. Therefore, he resisace of he oupu load is reduced by approximaely 4 imes o ivesigae he o-liear effecs o he sysem due o he reducio of he load. The cuoff freqeucy for he respecive loadig codiio is beig maiaied a 35 khz. Fig. 6 shows he THD resuls across he audio bad for he CDA power sages wih wo differe loadig codiios ( ad 6Ω). ) As depiced by he Specre simiulaio resuls of he Ope-Loop CDA power sage i Fig. 6(a), he THD resuls obaied for resisive load is aroud 7 imes higher ha ha obaied for 6Ω resisive load codiio. I oher words, harmoic disorio is iroduced as he load resisace decreases i he Ope-Loop codiio. ) Comparig he THD resuls of he s-order desig uder he wo loadig codiios i Fig. 6(b), i ca be see ha i is sill relaively sesiive o he chages i he load resisace. The THD resuls obaied for resisive load is approximaely 4 imes higher ha ha obaied for 6Ω resisive load codiio. 3) Followig ), i was suggesed by he mahemaical aalysis for he s-order feedback loop i he earlier secio ha is THD performace depeds very much o he qualiy of he ipu referece sigal. From he simulaio ad measureme resuls, i is see ha he amou of o-lieariy iroduced i he oupu power sage is also a facor affecig is THD performace. I is worhwhile o meio here agai ha he s-order feedback loop would o geerae ay ihere THD by iself. 4) Coversely, Fig. 6(c) show ha he load resisace variaios do o affec he THD resuls obaied by boh he d-order Desig ad he Ehaced d- Order Desig across he audio bad. The THD performace of he proposed desig agais power sage rasisor variaios is ivesigaed by performig he four corer simulaios as depiced i Fig. 7. The wors case THD resul for he Ope-Loop CDA power sage is obaied i he sf codiio ad i deviaes from he ypical codiio THD resuls by approximaely 6%. I coras, he wors case THD deviaio i he four corer simulaio for he s-order desig is below 3%, ad less ha % for boh Ehaced d-order ad d-order desigs. (a) (b) (c) Ω 6Ω 6Ω 6Ω 6Ω d-order (Specre) 6Ω Ehaced d-order (Specre) Ope-Loop (Measureme) Ope-Loop (Specre) Ope-Loop (Measureme) Ope-Loop (Specre) s-order (Measureme) s-order (Specre) s-order (Measureme) s-order (Specre) 6Ω 6Ω d-order (Measureme) Ehaced d-order (Measureme) Frequecy (Hz) Figure 6. THD vs Frequecy plo for differe load resisace, R L for (a) Ope Loop CDA power sage, (b) s -order desig (c) d -order desigs I summary, he simulaio ad measureme resuls show ha he s-order desig has a good THD performace of less ha.% wih a proper sizig of he power sage MOSFET rasisor, regardless of ipu audio frequecy. However, he s-order desig is relaively sesiive o load resisace variaios. Also, is measured PSR performace a 7 Hz is

12 hp://dx.doi.org/.9/tpel..37 oly -6 db. O he oher had, boh of he proposed d- Order desigs achieved very good PSR measureme of -8 db a 7 Hz ad he d-order Class D power sages feedback loop desig is isesiive o ay load variaios. I addiio, wih careful aalysis of he causes of is ihere harmoic disorio, he THD resuls ca be reduced by a leas a facor of. Accordig o he Specre simulaio, he maximum THD resul for he Ehaced d-order Desig is less ha.% across he audio bad ad he full modulaio idex rage. Hece, he proposed Ehaced d-order Desig has he bes PSR ad THD rade-off over he eire rage of modulaio idex ad frequecy... Four Corer Simulaio a khz Ehaced d-order d-order s-order Ope-Loop ypical ff fs sf ss Simulaio Corer Codiio Figure 7. Four Corer simulaio for ipu sigal frequecy of khz VI. CONCLUSIONS A i-deph mahemaical aalysis of he proposed Firs- Order feedback loop CDA power sage is preseed. Also, a iuiive way o udersad he causes of ihere harmoic disorio of he Secod-Order feedback loop CDA power sage is provided. Based o such udersadig, he harmoic disorio of he Secod-Order feedback loop is effecively reduced by ieioally creaig a volage differece bewee he ipu ad oupu sigals. The respecive behaviors of PSR ad THD performace for he CDA power sage feedback loop desigs are verified usig he Malab Simulik Model, he Specre Simulaio, as well as pracical measureme wih GF s.8 µm CMOS process. The proposed Ehaced Secod-Order feedback loop ca achieve a simulaed PSR of more ha db ad -8 db pracically a 7 Hz, ad a THD below.% from khz o khz regardless of ay loadig codiio as well as process variaio. This shows ha he proposed egaive feedback loop ca effecively reduce he power supply oise ad o-lieariies of a CDA power sage. Hece, he power sage is very suiable for CDA applicaios i which he sigal from a digial ca be replicaed wih sufficie drive o drive he loud speaker. VII. ACKNOWLEDGMENT The auhors would like o express heir greaes appreciaio o MediaTek Ic. Sigapore for heir suppor i his work. REFERENCES [] K. Nielse, "MECC - A ovel corol mehod for high ed swichig audio power amplificaio," i 5h AES Coveio, Sa Fracisco, CA, USA, prepri o. 4839, Sepember 998. [] M. T. Ta, J. S. Chag, H. C. Chua, ad B. H. Gwee, "A ivesigaio io he parameers affecig oal harmoic disorio i low-volage low-power Class-D amplifiers," IEEE Trasacios o Circuis ad Sysems I: Fudameal Theory ad Applicaios, vol. 5, pp , 3. [3] L. Risbo ad T. Morch, "Performace of a all-digial power amplificaio sysem," preseed a he 4h AES Coveio, Amserdam, The Neherlads, May 998. [4] B. Puzeys, "Digial audio's fial froier," IEEE Specrum, vol. 4, pp. 34-4, 3. [5] V. M. E. Aues, V. F. Pires, ad J. F. A. Silva, "Narrow Pulse Elimiaio for Mulilevel Digial Audio Power Amplifiers Usig Two Cascaded H-Bridges as a Nie-Level Coverer," IEEE Trasacios o Power Elecroics, vol., pp , 7. [6] A. Yoeya ad A. Waaabe, "Low disorio digial pulse widh modulaio for audio class-d amplifier," i IEEE Ieraioal Symposium o Commuicaios ad Iformaio Techology, 4, pp vol.. [7] C. Pascual, Z. Sog, P. T. Krei, D. V. Sarwae, P. Midya, ad W. J. Roecker, "High-fideliy iverer for digial audio amplificaio: Specral aalysis, real-ime DSP implemeaio, ad resuls," IEEE Trasacios o Power Elecroics, vol. 8, pp , 3. [8] P. H. Mellor, S. P. Leigh, ad B. M. G. Cheeham, "Digial samplig process for audio class D, pulse widh modulaed power amplifiers," Elecroics Leers, vol. 8, pp , 99. [9] Z. Yu ad H. Feg, "A mehod of error correcio for digial class D power amplifier," i Asia Pacific Coferece o Posgraduae Research i Microelecroics & Elecroics, 9. PrimeAsia 9., 9, pp [] M. Berkhou, "Class-D audio amplifiers i mobile applicaios," i IEEE Ieraioal Symposium o Circuis ad Sysems, 9, pp [] S. DAVIS. (Augus 5). Treds i class D amplifiers CIRRUS LOGIC AUSTIN TX. [] G. Pilloe, N. Abouchi, R. Cellier, ad A. Nagari, "A.%THD, 7dB PSRR Sigle Eded Class D usig variable hyseresis corol for headphoe amplifiers," i IEEE Ieraioal Symposium o Circuis ad Sysems, 9, pp [3] J. Yu, M. T. Ta, S. M. Cox, ad W. L. Goh, "Time-Domai Aalysis of Iermodulaio Disorio of Closed-Loop Class-D Amplifiers," IEEE Trasacios o Power Elecroics, vol. 7, pp ,. [4] L. Risbo ad C. Neesgaard, " Amplifier Corol Loops wih Miimum Aliasig Disorio," i AES h Coveio Paris, Frace, May, 6, p [5] P. Midya, B. Roecker, ad S. Bergsed, "Digial correcio of swichig amplifiers," IEEE Power Elecroics Leers, vol., pp. 68-7, 4. [6] T. Forzley ad R. Maso, "A low power Class D audio amplifier wih discree ime loop filer compesaio," i Joi IEEE Norh- Eas Workshop o Circuis ad Sysems ad TAISA Coferece., 9, pp. -4. [7] K. Philips, J. va de Homberg, ad C. Dijkmas, "PowerDAC: a sigle-chip audio DAC wih a 7%-efficie power sage i.5 µm CMOS," i IEEE Ieraioal Solid-Sae Circuis Coferece, 999, pp [8] K. Nielse, "PEDEC-a ovel pulse refereced corol mehod for high qualiy digial swichig power amplificaio," i Power Elecroics Specialiss Coferece, 998. PESC 98 Record. 9h Aual IEEE, 998, pp. -7 vol.. [9] S. Loga ad M. O. J. Hawksford, "Liearizaio of class D oupu sages for high-performace audio power amplifiers," i Secod Ieraioal Coferece o Advaced A-D ad D-A Coversio Techiques ad heir Applicaios, 994, pp [] C. K. Lam ad M. T. Ta, "A Class D amplifier oupu sage wih low THD ad high PSRR," i IEEE Ieraioal Symposium o Circuis ad Sysems, 9, pp

13 hp://dx.doi.org/.9/tpel..37 [] M. C. W. Høyerby ad M. A. E. Aderse, "Carrier Disorio i Hysereic Self-Oscillaig Class-D Audio Power Amplifiers: Aalysis ad Opimizaio," IEEE Trasacios o Power Elecroics, vol. 4, pp , 9. [] J. Lu ad R. Gharpurey, "Desig ad Aalysis of a Self-Oscillaig Class D Audio Amplifier Employig a Hysereic Comparaor," IEEE Joural of Solid-Sae Circuis, vol. 46, pp ,. [3] L. Risbo, "Discree-ime modelig of coiuous-ime pulse-widh modulaor loops," preseed a he 7h I. AES Coferece, Hillerød, Demark, Sepember 5. [4] S. M. Cox, C. K. Lam, ad M. T. Ta, "A secod-order i/-ou class-d audio amplifier," IMA J. Appl. Mah., Jue,. [5] S. M. Cox ad B. H. Cady, "Class-D audio amplifiers wih egaive feedback," SIAM J. Appl. Mah. 66, pp , 5. [6] R. Cellier, G. Pilloe, N. Abouchi, R. M'Rad, ad A. Nagari, "Aalysis ad desig of a aalog corol loop for digial ipu class D amplifiers," i IEEE Ieraioal Coferece o Elecroics, Circuis ad Sysems,, pp [7] M. T. Ta, P. K. Cha, C. K. Lam, ad C. W. Ng, "AC-Boosig Frequecy Compesaio wih Double Pole-Zero Cacellaio for Mulisage Amplifiers," Circui, Sysems, ad Sigal Processig, vol. 9, No.5, pp ,.

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