Index i xi xv xxvi. Abstract List of Tables List of Figures Glossary. Page.No CHAPTER 1 INTRODUCTION


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1 iv Abstract List of Tables List of Figures Glossary Index i xi xv xxvi CHAPTER 1 INTRODUCTION 1.1 Introduction 1.2 Formulation of the problem 1.3 Objectives 1.4 Methodology 1.5 Contribution of the Thesis 1.6 Organization of Thesis Page.No CHAPTER2 BASICS 2.1 MOSFET Basic Study N  Channel Enhancement MOSFET Structure Nchannel DMOSFET structure N channel EMOSFET operation N channel DMOSFET operation Characteristics of N channel EMOSFET and Nchannel DMOSFET Transfer characteristics of EMOSFET Drain characteristics of EMOSFET The transfer characteristics of DMOSFET Drain characteristics of DMOSFET Effect of Threshold voltage on the characteristics Threshold voltage  VT of MOSFET Effect of length and width on the characteristics of MOSFETS
2 v Effect of Technology on the characteristics of MOSFETS Sub threshold conduction Sub threshold slope and sub threshold swing 2.2 CMOS inverter structure and operation Voltage transfer characteristics of CMOS inverter Noise Margins of CMOS Inverter Dynamic characteristics of CMOS Inverter Delay time definitions of CMOS Inverter Power consumption of CMOS Inverter The Dynamic (Switching) power Consumption of CMOS Inverter The Short circuit power consumption of CMOS Inverter The Static power consumption of CMOS Inverter Power delay product of CMOS Inverter 2.3 Combinational circuits 2.4 Sequential circuits 2.5 Conclusions CHAPTER3 REVIEW OF LITERATURE 3.1 Low power digital design techniques Supply voltage reduction Effective capacitance reduction Physical capacitance reduction Switching activity reduction Reduction of leakage and static current Adiabatic circuit approach Technology scaling 3.2 Power reduction by sub threshold operation Body biasing techniques Swapped Body Biasing technique Dynamic threshold MOS Technique
3 vi MTCMOS Technique Switched source impedance Technique Transistor stacking Variable threshold CMOS technique Dynamic threshold voltage scaling Dual threshold CMOS technique 3.3 Conclusions CHAPTER4 CURRENTVOLTAGE CHARACTERISTICS OF VARIABLE THRESHOLD MOSFETS 4.1 Introduction Current voltage characteristics of NMOS and PMOS Transistors under VTMOS operating conditions in Sub threshold region Current voltage characteristics of NMOS devices under VTMOS operating conditions in subthreshold region Current voltage characteristics of PMOS devices under VTMOS operating conditions in sub threshold region Comparison of sub threshold VTMOS Transistor with sub threshold DTMOS transistor and conventional sub threshold MOS transistor configurations Comparison of VTNMOSFET (VAN=0.2V) with DTNMOS (VAN=0V) and NMOS transistors under sub threshold region Comparison of VTPMOSFET ( VAP=0.2v) characteristics with DTPMOS and PMOS transistors under sub threshold region 4.4 Conclusions CHAPTER5 VTMOS INVERTER 5.1 Introduction 76
4 vii 5.2 VTMOS Inverter circuit 5.3 Voltage transfer characteristics of VTMOS Inverter Significance of logic level shifting for VTMOS Inverter Noise margin for VTMOS Inverter Comparison of Voltage transfer characteristics of Sub threshold CMOS Sub threshold DTMOS and Sub threshold VTMOS Inverter 5.4 Input output waveforms for VTMOS Inverter Cascadability of Inverters 5.5 Performance analysis of VTMOS Inverter 5.6 Discussion on Results of different Inverters 5.7 Effect of frequency on the static and dynamic Characteristics 5.8 Conclusions CHAPTER 6 VTMOS UNIVERSAL LOGIC GATES 6.1 Introduction 6.2 VTMOS two input NAND gate Circuit description and operation of VTMOS two input NAND gate Input output wave forms for VTMOS two input NAND gate Performance measurements of two input NAND gate circuit Discussion on results of two input VTMOS NAND gate Performance analysis of two input NAND gate with random input vectors at 100khz frequency
5 viii Effect of frequency on the performance of two input NAND gate 6.3 VTMOS two input NOR gate Circuit diagram and operation of VTMOS two input NOR gate Input output waveforms for VTMOS two input NOR Gate Performance measurements of two input NOR gate circuit Discussion on results of two input VTMOS NOR gate Performance analysis of two input NOR gate with random input vectors at 100 khz frequency Effect of frequency on the performance of two input NOR gate 6.4 Conclusions CHAPTER 7 VTMOS SEQUENTIAL CIRCUITS 7.1 Introduction 7.2 VTMOS Clocked D Latch circuit The circuit diagram, truth table and operation of the VTMOS Clocked D Latch circuit Input output wave forms for VTMOS Clocked D Latch Circuit Performance analysis of clocked D Latch circuit Discussion on Results of D latch circuit Performance analysis of VTMOS D Latch with random input vectors at 100 KHZ frequency Discussion on performance analysis of clocked D Latch circuit with random input sequences Effect of frequency on performance characteristics of clocked D Latch circuit 7.3 VTMOS D Master Slave flip flop circuit Circuit diagram, truthtable and operation of VTMOS
6 ix D Master Slave flip flop circuit Input output wave forms for VTMOS D Master Slave flip flop circuit Performance analysis of D Master Slave circuit Discussion on Results of D Master Slave flip flop circuits Discussion on performance analysis of D Master Slave Flipflop circuit with random input sequences at 100 KHz frequency Discussion on performance analysis of D Master Slave Circuit with Random input sequences Effect of frequency on performance characteristics of D Master Slave flip flop 7.4 Conclusions CHAPTER 8 VTMOS APPLICATIONS 8.1 Introduction 8.2 VTMOS 8 to 1 Digital Multiplexer Circuit Circuit operation of VTMOS 8 to 1 Digital Multiplexer Input output wave forms for VTMOS 8 to 1 Multiplexer Performance analysis of 8 to 1 Multiplexer circuit Discussion of VTMOS 8 to 1 Multiplexer circuit Effect of frequency on the performance Characteristics of VTMOS Multiplexer circuit 8.3 VTMOS 4 bit Array Multiplier Circuit Circuit Diagram and Operation of VTMOS 4Bit Array Multiplier circuit Input output wave forms for VTMOS 4Bit Array Multiplier circuit Performance analysis of VTMOS 4Bit Array Multiplier Circuit Discussion on Results of VTMOS 4Bit Array multiplier Effect of frequency on performance characteristics of
7 x 4bit Array Multiplier circuit 8.4 VTMOS Serial in Serial out Shift Register Circuit operation of Serial in Serial out Shift Register Input output wave forms for VTMOS Serial in Serial out Shift Register for a typical input pattern Performance analysis of VTMOS Serial in Serial out Shift Register Discussion on Results of VTMOS Serial in Serial out Shift Register Effect of frequency on performance characteristics of Serial in Serial out Shift Register. 8.5 Conclusions CHAPTER9 CONCLUSIONS References List of Publications Appendix I XX a
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