Review: MOSFET Modeling and CMOS Circuits. Sangyoung Park Institute for Real-Time Computer Systems Technische Universität München
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1 Review: MOSFET Modeling and CMOS Circuits Sangyoung Park Institute for Real-Time Computer Systems
2 Contents MOSFET Structure and Operation MOSFET Threshold Voltage 1st-Order Current-Voltage Characteristics Velocity Saturation Short-Channel Effect MOS Capacitance 2
3 MOSFET Structure and Operation MOSFET structure 3
4 MOSFET Threshold Voltage Energy band diagram 4
5 MOSFET Structure and Operation Cut-off / sub-threshold / weak inversion mode Triode mode / linear region Saturation / active mode reference: 5
6 MOSFET Structure and Operation Depletion Mobile holes are pushed down under the gate Weak inversion Depletion layer thickness increases and an initial layer of mobile electron appears at the surface of the silicon Strong inversion The concentration of the mobile electrons is increased until it becomes equal to the concentration of the holes in the substrate Depletion layer thickness remains constant 6
7 MOSFET Threshold Voltage Flat-band voltage: V FB The voltage that when applied to a MOS Capacitor produces zero net charge in the underlying semiconductor 7
8 MOSFET Threshold Voltage V GS required to produce strong inversion is threshold voltage V T Offset the induced depletion-layer charge Q B Need to bend the bands in the channel region by relative to the substrate Surface potential must be equal to The semiconductor surface that is normally p-type becomes n-type 8
9 MOSFET Threshold Voltage Rearrangement of V T Body effect coefficient 9
10 MOSFET Threshold Voltage With no body bias (V BS =0), and With body bias (V BS ), 10
11 1st-Order Current-Voltage Characteristics Cut off No inversion layer exists Drain current is approximately zero 11
12 1st-Order Current-Voltage Characteristics Linear when 12
13 1st-Order Current-Voltage Characteristics Drain current: In the 1st order model, the velocity is linearly proportional to the E field Carrier mobility in cm/s 13
14 1st-Order Current-Voltage Characteristics Drain current 14
15 1st-Order Current-Voltage Characteristics Saturation (pinched off) 15
16 1st-Order Current-Voltage Characteristics Saturation voltage Beyond the saturation voltage, I DS is obtained by 16
17 1st-Order Current-Voltage Characteristics Channel-length modulation 17
18 1st-Order Current-Voltage Characteristics Channel-length modulation Measured V-I characteristics show a weak function of V DS Width of the depletion layer between the pinch-off point and the drain Corrected saturation current 18
19 1st-Order Current-Voltage Characteristics The i D v DS characteristics for a device with k n (W/L) = 1.0 ma/ V 2 Channel-length modulation 19
20 Velocity Saturation Quadratic model is valid for long-channel devices Modern DSM devices Channel length has been scaled to the point where the vertical and horizontal electric fields may interact Saturation occurs at the pinch-off point is no longer valid Saturation occurs due to velocity saturation 0.18um device is rather linear than quadratic 20
21 Velocity Saturation Horizontal field acts to push the carriers to their velocity limit and cause Early saturation Mobility degradation Due to electron scattering caused by dangling bonds at the Si-SiO 2 interface Empirical values 21
22 Velocity Saturation Piece-wise continuous model Drain current 22
23 Short-Channel Effect Short-channel effect V T roll-off: charge partitioning model Long channel Short channel 23
24 Short-Channel Effect V T roll-off impact Threshold voltage reduces as L reduces I off increases Reduced control of the gate on the channel 24
25 MOS Capacitance Very important for transient simulation Thin oxide capacitance: C gs, C gd and C gb ) represented by C g Junction capacitance (C sb and C db ) Depletion layer capacitance (C jc ) associated with C gb 25
26 MOS Capacitance Thin oxide capacitance The most important MOS capacitance Two plates of the capacitance are defined as the gate and the channel Cg remains constant for over 25 years because both L and tox are scaled at the same rate 26
27 MOS Capacitance Area of source and drain Bottom area: A b =WY Side wall area: A sw =Wx j Junction capacitance 27
28 Note Slides are modified from lecture notes of Advanced Computer System Design from Seoul National University (Lecturer: Prof. Naehyuck Chang) 28
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