BELS Digital IC Report

Size: px
Start display at page:

Download "BELS Digital IC Report"

Transcription

1 CMOS Digital IC Report 74HC00, Quad 2-Input NAND Gate DIP A HCT00, Quad 2-Input NAND Gate DIP A HC02, Quad 2 Input NOR DIP A HC04, Hex Inverter, buffered DIP A HC04, Hex Inverter (buffered) DIP A HCT04, Hex Inverter (Open Collector) DIP A HC08, Quad 2 Input AND Gate DIP A HC10, Triple 3-Input NAND DIP A HC32, Quad OR DIP B HC32, Quad 2-Input OR Gates DIP B HC138, 3-line to 8-line decoder / demultiplexer DIP C HCT139, Dual 2-line to 4-line decoders / demultiplexers DIP C HC154, 4-16 line decoder/demulitplexer, 0.3 wide DIP - Small none HC154W, 4-16 line decoder/demultiplexer, 0.6wide DIP none HC190, Synchronous 4-Bit Up/Down Decade and Binary Counters DIP D HCT240, Octal Buffers and Line Drivers w/ 3-State outputs DIP D HC244, Octal Buffers And Line Drivers w/ 3-State outputs DIP D HCT245, Octal Bus Transceivers w/ 3-State outputs DIP D HCT273, Octal D- Flip-Flops w/ Clear DIP D HCT373, Octal Transparent D- Latches w/ 3-State outputs DIP E HCT377, Octal D- Flip-Flops w/ Clock Enable DIP E HCT573, Octal Transparent D- Latches w/ 3-State outputs DIP E CMOS CD4000 Series CD4001, Quad 2-input NOR DIP F CD4011, Quad 2-Input NAND gate DIP F CD4013, Dual D Flip-Flop with set/reset DIP F CD4015, Dual 4-Stage Static Shift Register DIP F CD4016, Quad Bilateral Switch DIP F CD4017, Decade Counter/Divider DIP F CD4020, 14-Stage Binary Ripple Counter DIP F CD4023, Triple 3-Input NAND Gates DIP F CD4024, 7-Stage Binary Counter DIP F CD4027, Dual JK Master-Slave flip-flop DIP F CD4040, 12-Stage Binary Ripple Counter DIP F CD4046, Micropower Phase-Locked Loop (PLL) DIP F CD4049, Hex Buffer Converter (inverting) DIP F CD4050, Hex Buffer Converter (N-inverting) DIP F CD4051, Single 8-Channel Multi/demultiplexer DIP F CD4066, Quad Bilateral Switch DIP F CD4069, Hex Inverter (74C04) DIP F CD4070, Quad Exclusive-OR gate (74C86) DIP F CD4071, Quad 2-Input OR Gate DIP F CD4081, Quad 2-Input AND Gate DIP F Tuesday, April 09, 2002 Page 1 of 6

2 Digital IC Report CD4093, Quad 2-Input NAND Schmitt Trigger DIP F CD4511, BCD to 7-Segment Latch/decoder/driver DIP F CD4543, BCD to 7-segment decoder (LCD) DIP F CD4538, Dual precision monostable multivibrator DIP F CD4584, Hex Schmitt Trigger (74C14) DIP F EEPROM AM27C512, EEPROM, 64Kx8, 5V Logic DIP Flash Memory 29F010B-xxxPx, Memory, EEPROM, 5V Flash, 128Kx8 DIP F010B-xxxJx, Memory, EEPROM, 5V Flash, 128Kx8 PLCC F010x-xxxPx, Memory, EEPROM, 12V Flash, 128Kx8 (Obsolete) DIP 3B Processor MC6803E, 8-Bit Microprocessor (Obsolete) DIP AM2901DC, 4-Bit-Slice Processor (Obsolete) DIP Static Ram M5M256BP, Static Ram, 64K (32Kx8) (Obsolete) DIP TTL 74LS00, Quad 2-Input NAND Gate DIP A F00, Quad 2-Input NAND Gate DIP A , Quad 2-Input NAND Gate w/ open-collect outputs DIP A LS01, Quad 2-Input NAND Gate w/ open-collect outputs DIP A , Quad 2-Input NOR Gate DIP A F02, Quad 2-Input NOR Gate DIP A LS02, Quad 2-Input NOR Gate DIP A , Quad 2-Input NAND Gate w/ open-collect outputs DIP A S03, Quad 2-Input NAND Gate w/ open-collector outputs DIP A , Hex Inverter DIP A LS04, Hex Inverter DIP A F04, Hex Inverter DIP A LS05, Hex Inverter w/ open-collect outputs DIP A , Hex Inverter w/ open-collect outputs DIP A , Hex Buffer w/ open-collect outputs DIP A LS08, Quad 2-Input AND Gate DIP A F08, Quad 2-Input AND Gate DIP A , Quad 2-Input AND Gate DIP A LS09, Quad 2-Input AND Gate w/ open-collect outputs DIP A LS10, Triple 3-Input NAND DIP A , Triple 3-Input AND DIP A LS11, Triple 3-Input AND DIP A LS12, Triple 3-Input NAND Gate w/ open-collect outputs DIP A , Triple 3-Input NAND Gate w/ open-collect outputs DIP A LS13, Dual 4-Input NAND Schmitt triggers DIP A , Dual 4-Input NAND Schmitt triggers DIP A LS14, Hex Schmitt trigger Inverter DIP A Tuesday, April 09, 2002 Page 2 of 6

3 Digital IC Report 74F20, Dual 4-Input NAND Gate DIP A S20, Dual 4-Input NAND Gate DIP A LS20, Dual 4-Input NAND Gate DIP A ALS20, Dual 4-Input NAND Gate DIP A LS21, Dual 4-Input AND Gate DIP A , Dual 4-Input NAND Schmitt triggers w/ open-collect outputs DIP A , Expandable Dual 4-Input NOR Gates DIP A , Quad 2-Input high-voltage interface NAND Gates DIP A , Triple 3-Input NOR Gates DIP A LS27, Triple 3-Input NOR Gates DIP A , Quad 2-Input NOR buffers DIP B LS28, Quad 2-Input NOR buffers DIP B LS30, 8-Input NAND Gates DIP B , 8-Input NAND Gates DIP B LS32, Quad 2-Input OR Gates DIP B F32, Quad 2-Input OR Gates DIP B ALS32, Quad 2-Input OR Gates DIP B LS33, Quad 2-Input NOR buffers w/ open-collect outputs DIP B , Quad 2-Input NOR buffers w/ open-collect outputs DIP B , Quad 2-Input NAND buffers DIP B , Quad 2-Input NAND buffers w/ open-collect outputs DIP B , Dual 4-Input NAND buffers DIP B , BCD to Decimal Decoder DIP B , 4-Line BCD to 10-Line Decimal Decoders DIP B , BCD-to-Decimal Decoders/Drivers DIP B , BCD-to-Seven-Segment Decoders/Drivers DIP B , Dual 2-Wide 2-Input AND-OR-invert Gates (One Gate Expandable) DIP B LS51, Dual 2-wide 2-input and 3-input AND-NOR Gates DIP B , AND-OR-invert Gates DIP B S51, Dual 2-wide 2-input and 3-input AND-NOR Gates DIP B , Expandable 4-Wide AND-OR-invert Gates DIP B , 4-Wide AND-OR-invert Gates DIP B LS55, 2-Wide 4-Input AND-OR-invert Gates DIP B , Dual 4-Input Expander DIP B , AND-Gated J-K Positive-Edge-Triggered Flip-Flop w/ preset and clear DIP B , Dual J-K Negative-Edge-Triggered Flip-Flops w/ clear DIP B LS73, Dual J-K Negative-Edge-Triggered Flip-Flops w/ clear DIP B F74, Dual Positive-Edge-Triggered D- Flip-Flops w/ clear and preset DIP B LS74, Dual Positive-Edge-Triggered D- Flip-Flops w/ clear and pres DIP B S74, Dual Positive-Edge-Triggered D- Flip-Flops w/ clear and preset DIP B LS76, Dual J-K Positive-Edge-Triggered Flip-Flops w/ Preset and Clear DIP B , Gated Full Adder DIP B , 2 Bit Binary Full Adder DIP B , 4-bit Binary full Adder DIP B Tuesday, April 09, 2002 Page 3 of 6

4 Digital IC Report 74LS83, 4-Bit Binary Adder w/ Fast Carry DIP B LS85, 4-Bit Magnitude Comparator DIP B F86, Quad 2-Input Exclusive-OR Gates DIP B LS86, Quad 2-Input Exclusive-OR Gates DIP B , Quad 2-Input Exclusive-OR Gates DIP B , 64 Bit RAM DIP B LS90, Decade Counter DIP B , Decade Counter DIP B A, 8-Bit Shift Registers DIP B LS91, Serial-in / serial-out shift registers DIP B , Divide-By-Twelve Decade Counter DIP B LS93, 4-Bit Binary Counters DIP C , Shift registers DIP C , 4-bit parallel-access shift register (K155N) DIP C , N-Bit Serial-to-Parallel/Parallel-to-Serial Converter/N-Bit Storage Regi DIP C , Gated J-K Master-Slave Flip-Flops DIP C , Gated J-K Master-Slave Flip-Flops DIP C , Dual J-K Flip-Flops w/ Clear DIP C LS107, Dual J-K Flip-Flops w/ Clear DIP C LS113, Dual J-K edge-trig. Flip-Flops DIP C LS114, Dual J-K F-F w/com Clk DIP C , Monostable multivibrator w/ Schmitt-trigger inputs DIP C , Retriggerable monostable multivibrator DIP C LS125, Quad Bus Buffers w/ 3-State outputs DIP C , Quad 2-Input NAND Schmitt triggers DIP C LS132, Quad 2-input NAND Schmitt triggers DIP C LS138, 3-line to 8-line decoder / demultiplexer DIP C S138, 3-line to 8-line decoder / demultiplexer DIP C LS139, Dual 2-line to 4-line decoders / demultiplexers DIP C , 10-Line to 4-Line BCD Priority Encoder DIP C , 8-Line to 3-Line Priority Encoders DIP C , 16-line to 1-line data selector / multiplexer DIP C LS151, 8-Line to 1-Line Data Selectors/Multiplexers DIP C S151, 8-Line to 1-Line Data Selectors/Multiplexers DIP C LS153, Dual 4-Line to 1-Line Data Selectors/Multiplexers DIP C LS154, 4-Line to 16-Line Decoders/Demultiplexers DIP C , 4-Line to 16-Line Decoders/Demultiplexers DIP C LS154, 4-16 line decoder/demultiplexer, 0.7 wide DIP LS155A, Dual 2-Line to 4-Line Decoders/Demultiplexers DIP C , Dual 2-Line to 4-line Decoders/Demultiplexers w/ Open-Collect outp DIP C , Quad 2-line to 1-line data selectors / multiplexers DIP C LS157, Quad 2-line to 1-line data selectors / multiplexers DIP C , Quad 2-Line to 1-Line Data selectors/ multiplexers DIP C , 4-Line to 16-Line Decoders/Demultiplexers w/ open-collect outputs DIP C 619 Tuesday, April 09, 2002 Page 4 of 6

5 Digital IC Report 74160, Synchronous decade counters DIP C LS161, Synchronous 4-bit binary counters DIP C , Synchronous 4-bit binary counters DIP C , Synchronous decade counters DIP C , Synchronous 4-bit binary counters DIP C , 8-bit serial shift register DIP C , 8-bit serial shift register, parallel load DIP C , Serial-out shift registers DIP C , 4-By-4 Register Files w/ open-collect outputs DIP C , Quad D-type Registers w/ 3-State outputs DIP D , 6-bit D-type positive-edge-triggered flip-flops w/ clear DIP D LS175, Quadruple D- Flip-Flops w/ clear DIP D , 35-MHz Presettable Decade and Binary Counters/Latches DIP D , Parallel-access shift registers DIP D , 9-Bit Odd/Even Parity Generators / Checkers DIP D LS181, Arithmetic Logic s/function Generators DIP D S189, 16 x 4 RAM (Tri-State Output) DIP D LS191, Synchronous 4-Bit Up/Down Counters w/ Up/Down Mode Control DIP D LS191, Synchronous Up/Down Counter, 4-bit DIP LS194A, Bidirectional universal shift registers DIP D , Bidirectional shift registers DIP D , Shift registers w/ J-/K serial inputs DIP D LS240, Octal buffers and line drivers DIP D LS240, Octal Buffer/Line Driver, Inverting DIP LS241, Octal Buffers and Line Drivers w/ 3-State outputs DIP D LS243, Quad bus transceivers DIP D LS244, Octal Buffers and Line Drivers w/ 3-State outputs DIP D LS245, Octal bus transceivers DIP D LS247, BCD-to-Seven-Segment Decoders/Drivers DIP D LS253, Dual 4-Line to 1-Line Data Selectors/Multiplexers w/ 3-State outp DIP D S253, Dual 4-line to 1-line data selectors / multiplexers DIP D S257, Quadruple 2-Line to 1-Line Data Selectors/Multiplexers w/ 3-State DIP D LS258, Quadruple 2-Line to 1-Line Data Selectors/Multiplexers w/ 3-State DIP D LS260, Dual 5-input NOR gate DIP D LS273, Octal D- Flip-Flops w/ Clear DIP D LS279A, Quad set-reset latches DIP D LS280, 9-bit odd/even parity generators / checkers DIP D LS283, 4-Bit Binary Full Adders w/ Fast Carry DIP D LS367A, Hex Bus Drivers w/ 3-State outputs DIP E LS373, Octal D-type Transparent Latches w/ 3-state outputs DIP E ALS373, Octal D- Transparent Latches w/ 3-state outputs DIP E S373, Octal D-type Transparent Latches w/ 3-state outputs DIP E LS374, Octal D F/F edge-trig tri-state DIP E LS377, Octal D- Flip-Flops w/ Clock Enable DIP E Tuesday, April 09, 2002 Page 5 of 6

6 Digital IC Report 74LS393, Dual 4-Bit Binary Counters DIP E LS540, Octal buffers and line drivers DIP E LS541, Octal Buffers And Line Drivers w/ 3-State outputs DIP E LS573, Octal Transparent D- Latches w/ 3-State outputs DIP E LS590, 8-Bit Binary Counters w/ Output Registers And 3-State outputs DIP E Tuesday, April 09, 2002 Page 6 of 6

DATA SHEETS DE COMPONENTES DA FAMÍLIA LÓGICA TTL GATES AND INVERTERS POSITIVES NAND GATES AND INVERTERS DESCRIÇÃO

DATA SHEETS DE COMPONENTES DA FAMÍLIA LÓGICA TTL GATES AND INVERTERS POSITIVES NAND GATES AND INVERTERS DESCRIÇÃO GATES AND INVERTERS POSITIVES NAND GATES AND INVERTERS Hex Invertes 74LS04 Quadruple 2 Inputs Gates 74LS00 Triple 3 Inputs Gates 74LS10 Dual 4 Inputs Gates 74LS20 8 Inputs Gates 74LS30 13 Inputs Gates

More information

Standart TTL, Serie 74... Art.Gruppe 13.15. 1...

Standart TTL, Serie 74... Art.Gruppe 13.15. 1... Standart TTL, Serie 74... Art.Gruppe 13.15. 1... Standart TTL, Serie 74... 7400 Quad 2-Input Nand Gate (TP) DIL14 7402 Quad 2 Input Nor Gate (TP) DIL14 7403 Quad 2 Input Nand Gate (OC) DIL14 7404 Hex Inverter

More information

LOGICOS SERIE 4000. Precios sujetos a variación. Ref. Part # Descripción Precio Foto Ref. Quad 2-Input NOR Buffered B Series Gate / PDIP-14

LOGICOS SERIE 4000. Precios sujetos a variación. Ref. Part # Descripción Precio Foto Ref. Quad 2-Input NOR Buffered B Series Gate / PDIP-14 LOGICOS SERIE 4000 Precios sujetos a variación Ref. Part # Descripción Precio Foto Ref. A-6-1 CD4001 Quad 2-Input NOR Buffered B Series Gate / PDIP-14 $ 290 A-6-2 CD4001BCM Quad 2-Input NOR Buffered B

More information

IC Overview: 74HC family

IC Overview: 74HC family IC Overview: 74HC family Part no Description Manufacture 74HC HCMOS family characteristics 74HC00 Quad 2-input NAND gate 74HC01 Quad. 2-input NAND Gates (with open drain outputs) Hitachi Semiconductor

More information

Semiconduttori - C-MOS

Semiconduttori - C-MOS 4000 nor gate 2010-0005 TC4000BP TOS DIL14 4001 nor gate 2010-0010 CD4001BE TEX DIL14 2010-0015 HCF4001BEY STM DIL14 2010-0020 HCF4001BM1 STM SOIC14 2010-0011 HEF4001BP PHS DIL14 4002 nor gate 2010-0025

More information

Universidad Interamericana de Puerto Rico Recinto de Bayamón Escuela de Ingeniería Departamento de Ingeniería Eléctrica

Universidad Interamericana de Puerto Rico Recinto de Bayamón Escuela de Ingeniería Departamento de Ingeniería Eléctrica Universidad Interamericana de Puerto Rico Recinto de Bayamón Escuela de Ingeniería Departamento de Ingeniería Eléctrica Inventario de Materiales Edificio: Escuela de Ingeniería Oficina o Salón: G-221 Descripción(Circuitos

More information

Copyright Peter R. Rony 2009. All rights reserved.

Copyright Peter R. Rony 2009. All rights reserved. Experiment No. 1. THE DIGI DESIGNER Experiment 1-1. Socket Connections on the Digi Designer Experiment No. 2. LOGIC LEVELS AND THE 7400 QUADRUPLE 2-INPUT POSITIVE NAND GATE Experiment 2-1. Truth Table

More information

Megatone Electronic CATALOGO

Megatone Electronic CATALOGO 74298N 74ACT74B 74AHCT86N 74ALS569AN 74C902 74C922 74C925 74C926 74F175PC 74F86 74HC00N 74HC03 74HC04N 74HC05 74HC107 74HC11N 74HC123 74HC126 74HC132N 74HC139 74HC14N 74HC151 74HC153N 74HC163 74HC164 74HC21

More information

Sovelletun elektroniikan laboratoriosta löytyvät komponentit 4.5.2004

Sovelletun elektroniikan laboratoriosta löytyvät komponentit 4.5.2004 Sovelletun elektroniikan laboratoriosta löytyvät komponentit 4.5.2004 *punaisella merkityt komponentit ovat pintaliitoskomponentteja Vastukset: E12 sarja 10ohm-1Mohm 51ohm, 1% tarkkuusvastus 10 Mohm 50

More information

Operating Manual Ver.1.1

Operating Manual Ver.1.1 4 Bit Binary Ripple Counter (Up-Down Counter) Operating Manual Ver.1.1 An ISO 9001 : 2000 company 94-101, Electronic Complex Pardesipura, Indore- 452010, India Tel : 91-731- 2570301/02, 4211100 Fax: 91-731-

More information

Memory Elements. Combinational logic cannot remember

Memory Elements. Combinational logic cannot remember Memory Elements Combinational logic cannot remember Output logic values are function of inputs only Feedback is needed to be able to remember a logic value Memory elements are needed in most digital logic

More information

BINARY CODED DECIMAL: B.C.D.

BINARY CODED DECIMAL: B.C.D. BINARY CODED DECIMAL: B.C.D. ANOTHER METHOD TO REPRESENT DECIMAL NUMBERS USEFUL BECAUSE MANY DIGITAL DEVICES PROCESS + DISPLAY NUMBERS IN TENS IN BCD EACH NUMBER IS DEFINED BY A BINARY CODE OF 4 BITS.

More information

Chapter 9 Latches, Flip-Flops, and Timers

Chapter 9 Latches, Flip-Flops, and Timers ETEC 23 Programmable Logic Devices Chapter 9 Latches, Flip-Flops, and Timers Shawnee State University Department of Industrial and Engineering Technologies Copyright 27 by Janna B. Gallaher Latches A temporary

More information

Modeling Sequential Elements with Verilog. Prof. Chien-Nan Liu TEL: 03-4227151 ext:34534 Email: jimmy@ee.ncu.edu.tw. Sequential Circuit

Modeling Sequential Elements with Verilog. Prof. Chien-Nan Liu TEL: 03-4227151 ext:34534 Email: jimmy@ee.ncu.edu.tw. Sequential Circuit Modeling Sequential Elements with Verilog Prof. Chien-Nan Liu TEL: 03-4227151 ext:34534 Email: jimmy@ee.ncu.edu.tw 4-1 Sequential Circuit Outputs are functions of inputs and present states of storage elements

More information

Experiment # 9. Clock generator circuits & Counters. Eng. Waleed Y. Mousa

Experiment # 9. Clock generator circuits & Counters. Eng. Waleed Y. Mousa Experiment # 9 Clock generator circuits & Counters Eng. Waleed Y. Mousa 1. Objectives: 1. Understanding the principles and construction of Clock generator. 2. To be familiar with clock pulse generation

More information

Latches, the D Flip-Flop & Counter Design. ECE 152A Winter 2012

Latches, the D Flip-Flop & Counter Design. ECE 152A Winter 2012 Latches, the D Flip-Flop & Counter Design ECE 52A Winter 22 Reading Assignment Brown and Vranesic 7 Flip-Flops, Registers, Counters and a Simple Processor 7. Basic Latch 7.2 Gated SR Latch 7.2. Gated SR

More information

COMBINATIONAL and SEQUENTIAL LOGIC CIRCUITS Hardware implementation and software design

COMBINATIONAL and SEQUENTIAL LOGIC CIRCUITS Hardware implementation and software design PH-315 COMINATIONAL and SEUENTIAL LOGIC CIRCUITS Hardware implementation and software design A La Rosa I PURPOSE: To familiarize with combinational and sequential logic circuits Combinational circuits

More information

COMBINATIONAL CIRCUITS

COMBINATIONAL CIRCUITS COMBINATIONAL CIRCUITS http://www.tutorialspoint.com/computer_logical_organization/combinational_circuits.htm Copyright tutorialspoint.com Combinational circuit is a circuit in which we combine the different

More information

CHAPTER IX REGISTER BLOCKS COUNTERS, SHIFT, AND ROTATE REGISTERS

CHAPTER IX REGISTER BLOCKS COUNTERS, SHIFT, AND ROTATE REGISTERS CHAPTER IX-1 CHAPTER IX CHAPTER IX COUNTERS, SHIFT, AN ROTATE REGISTERS REA PAGES 249-275 FROM MANO AN KIME CHAPTER IX-2 INTROUCTION -INTROUCTION Like combinational building blocks, we can also develop

More information

ECE380 Digital Logic

ECE380 Digital Logic ECE38 igital Logic Flip-Flops, Registers and Counters: Flip-Flops r.. J. Jackson Lecture 25- Flip-flops The gated latch circuits presented are level sensitive and can change states more than once during

More information

Content Map For Career & Technology

Content Map For Career & Technology Content Strand: Applied Academics CT-ET1-1 analysis of electronic A. Fractions and decimals B. Powers of 10 and engineering notation C. Formula based problem solutions D. Powers and roots E. Linear equations

More information

CONTENTS PREFACE 1 INTRODUCTION 1 2 NUMBER SYSTEMS AND CODES 25. vii

CONTENTS PREFACE 1 INTRODUCTION 1 2 NUMBER SYSTEMS AND CODES 25. vii 2006 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. This material is CONTENTS PREFACE xv 1 INTRODUCTION 1 1.1 About Digital Design 1 1.2 Analog versus Digital 3 1.3 Digital Devices

More information

Module 3: Floyd, Digital Fundamental

Module 3: Floyd, Digital Fundamental Module 3: Lecturer : Yongsheng Gao Room : Tech - 3.25 Email : yongsheng.gao@griffith.edu.au Structure : 6 lectures 1 Tutorial Assessment: 1 Laboratory (5%) 1 Test (20%) Textbook : Floyd, Digital Fundamental

More information

SECTION C [short essay] [Not to exceed 120 words, Answer any SIX questions. Each question carries FOUR marks] 6 x 4=24 marks

SECTION C [short essay] [Not to exceed 120 words, Answer any SIX questions. Each question carries FOUR marks] 6 x 4=24 marks UNIVERSITY OF KERALA First Degree Programme in Computer Applications Model Question Paper Semester I Course Code- CP 1121 Introduction to Computer Science TIME : 3 hrs Maximum Mark: 80 SECTION A [Very

More information

Lecture-3 MEMORY: Development of Memory:

Lecture-3 MEMORY: Development of Memory: Lecture-3 MEMORY: It is a storage device. It stores program data and the results. There are two kind of memories; semiconductor memories & magnetic memories. Semiconductor memories are faster, smaller,

More information

Lab 1: Study of Gates & Flip-flops

Lab 1: Study of Gates & Flip-flops 1.1 Aim Lab 1: Study of Gates & Flip-flops To familiarize with circuit implementations using ICs and test the behavior of different logic gates and Flip-flops. 1.2 Hardware Requirement a. Equipments -

More information

Sequential Logic Design Principles.Latches and Flip-Flops

Sequential Logic Design Principles.Latches and Flip-Flops Sequential Logic Design Principles.Latches and Flip-Flops Doru Todinca Department of Computers Politehnica University of Timisoara Outline Introduction Bistable Elements Latches and Flip-Flops S-R Latch

More information

Asynchronous Counters. Asynchronous Counters

Asynchronous Counters. Asynchronous Counters Counters and State Machine Design November 25 Asynchronous Counters ENGI 25 ELEC 24 Asynchronous Counters The term Asynchronous refers to events that do not occur at the same time With respect to counter

More information

Contents COUNTER. Unit III- Counters

Contents COUNTER. Unit III- Counters COUNTER Contents COUNTER...1 Frequency Division...2 Divide-by-2 Counter... 3 Toggle Flip-Flop...3 Frequency Division using Toggle Flip-flops...5 Truth Table for a 3-bit Asynchronous Up Counter...6 Modulo

More information

To design digital counter circuits using JK-Flip-Flop. To implement counter using 74LS193 IC.

To design digital counter circuits using JK-Flip-Flop. To implement counter using 74LS193 IC. 8.1 Objectives To design digital counter circuits using JK-Flip-Flop. To implement counter using 74LS193 IC. 8.2 Introduction Circuits for counting events are frequently used in computers and other digital

More information

The components. E3: Digital electronics. Goals:

The components. E3: Digital electronics. Goals: E3: Digital electronics Goals: Basic understanding of logic circuits. Become familiar with the most common digital components and their use. Equipment: 1 st. LED bridge 1 st. 7-segment display. 2 st. IC

More information

A Lesson on Digital Clocks, One Shots and Counters

A Lesson on Digital Clocks, One Shots and Counters A Lesson on Digital Clocks, One Shots and Counters Topics Clocks & Oscillators LM 555 Timer IC Crystal Oscillators Selection of Variable Resistors Schmitt Gates Power-On Reset Circuits One Shots Counters

More information

Flip-Flops, Registers, Counters, and a Simple Processor

Flip-Flops, Registers, Counters, and a Simple Processor June 8, 22 5:56 vra235_ch7 Sheet number Page number 349 black chapter 7 Flip-Flops, Registers, Counters, and a Simple Processor 7. Ng f3, h7 h6 349 June 8, 22 5:56 vra235_ch7 Sheet number 2 Page number

More information

ETEC 2301 Programmable Logic Devices. Chapter 10 Counters. Shawnee State University Department of Industrial and Engineering Technologies

ETEC 2301 Programmable Logic Devices. Chapter 10 Counters. Shawnee State University Department of Industrial and Engineering Technologies ETEC 2301 Programmable Logic Devices Chapter 10 Counters Shawnee State University Department of Industrial and Engineering Technologies Copyright 2007 by Janna B. Gallaher Asynchronous Counter Operation

More information

Digital Logic Design. Basics Combinational Circuits Sequential Circuits. Pu-Jen Cheng

Digital Logic Design. Basics Combinational Circuits Sequential Circuits. Pu-Jen Cheng Digital Logic Design Basics Combinational Circuits Sequential Circuits Pu-Jen Cheng Adapted from the slides prepared by S. Dandamudi for the book, Fundamentals of Computer Organization and Design. Introduction

More information

CpE358/CS381. Switching Theory and Logical Design. Class 10

CpE358/CS381. Switching Theory and Logical Design. Class 10 CpE358/CS38 Switching Theory and Logical Design Class CpE358/CS38 Summer- 24 Copyright 24-373 Today Fundamental concepts of digital systems (Mano Chapter ) Binary codes, number systems, and arithmetic

More information

ANALOG & DIGITAL ELECTRONICS

ANALOG & DIGITAL ELECTRONICS ANALOG & DIGITAL ELECTRONICS Course Instructor: Course No: PH-218 3-1-0-8 Dr. A.P. Vajpeyi E-mail: apvajpeyi@iitg.ernet.in Room No: #305 Department of Physics, Indian Institute of Technology Guwahati,

More information

Upon completion of unit 1.1, students will be able to

Upon completion of unit 1.1, students will be able to Upon completion of unit 1.1, students will be able to 1. Demonstrate safety of the individual, class, and overall environment of the classroom/laboratory, and understand that electricity, even at the nominal

More information

Digital Electronics Detailed Outline

Digital Electronics Detailed Outline Digital Electronics Detailed Outline Unit 1: Fundamentals of Analog and Digital Electronics (32 Total Days) Lesson 1.1: Foundations and the Board Game Counter (9 days) 1. Safety is an important concept

More information

Chapter 2 Logic Gates and Introduction to Computer Architecture

Chapter 2 Logic Gates and Introduction to Computer Architecture Chapter 2 Logic Gates and Introduction to Computer Architecture 2.1 Introduction The basic components of an Integrated Circuit (IC) is logic gates which made of transistors, in digital system there are

More information

A Lesson on Digital Clocks, One Shots and Counters

A Lesson on Digital Clocks, One Shots and Counters A Lesson on Digital Clocks, One Shots and Counters Topics Clocks & Oscillators LM 555 Timer IC Crystal Oscillators Selection of Variable Resistors Schmitt Gates Power-On Reset Circuits One Shots Counters

More information

DEPARTMENT OF INFORMATION TECHNLOGY

DEPARTMENT OF INFORMATION TECHNLOGY DRONACHARYA GROUP OF INSTITUTIONS, GREATER NOIDA Affiliated to Mahamaya Technical University, Noida Approved by AICTE DEPARTMENT OF INFORMATION TECHNLOGY Lab Manual for Computer Organization Lab ECS-453

More information

Chapter 7. Registers & Register Transfers. J.J. Shann. J. J. Shann

Chapter 7. Registers & Register Transfers. J.J. Shann. J. J. Shann Chapter 7 Registers & Register Transfers J. J. Shann J.J. Shann Chapter Overview 7- Registers and Load Enable 7-2 Register Transfers 7-3 Register Transfer Operations 7-4 A Note for VHDL and Verilog Users

More information

Counters and Decoders

Counters and Decoders Physics 3330 Experiment #10 Fall 1999 Purpose Counters and Decoders In this experiment, you will design and construct a 4-bit ripple-through decade counter with a decimal read-out display. Such a counter

More information

List of Experiment. 8. To study and verify the BCD to Seven Segments DECODER.(IC-7447).

List of Experiment. 8. To study and verify the BCD to Seven Segments DECODER.(IC-7447). G. H. RAISONI COLLEGE OF ENGINEERING, NAGPUR Department of Electronics & Communication Engineering Branch:-4 th Semester[Electronics] Subject: - Digital Circuits List of Experiment Sr. Name Of Experiment

More information

Digital Systems Based on Principles and Applications of Electrical Engineering/Rizzoni (McGraw Hill

Digital Systems Based on Principles and Applications of Electrical Engineering/Rizzoni (McGraw Hill Digital Systems Based on Principles and Applications of Electrical Engineering/Rizzoni (McGraw Hill Objectives: Analyze the operation of sequential logic circuits. Understand the operation of digital counters.

More information

Design Example: Counters. Design Example: Counters. 3-Bit Binary Counter. 3-Bit Binary Counter. Other useful counters:

Design Example: Counters. Design Example: Counters. 3-Bit Binary Counter. 3-Bit Binary Counter. Other useful counters: Design Eample: ers er: a sequential circuit that repeats a specified sequence of output upon clock pulses. A,B,C,, Z. G, O, T, E, R, P, S,!.,,,,,,,7. 7,,,,,,,.,,,,,,,,,,,. Binary counter: follows the binary

More information

Digital Electronics Part I Combinational and Sequential Logic. Dr. I. J. Wassell

Digital Electronics Part I Combinational and Sequential Logic. Dr. I. J. Wassell Digital Electronics Part I Combinational and Sequential Logic Dr. I. J. Wassell Introduction Aims To familiarise students with Combinational logic circuits Sequential logic circuits How digital logic gates

More information

Flip-Flops and Sequential Circuit Design. ECE 152A Winter 2012

Flip-Flops and Sequential Circuit Design. ECE 152A Winter 2012 Flip-Flops and Sequential Circuit Design ECE 52 Winter 22 Reading ssignment Brown and Vranesic 7 Flip-Flops, Registers, Counters and a Simple Processor 7.5 T Flip-Flop 7.5. Configurable Flip-Flops 7.6

More information

Flip-Flops and Sequential Circuit Design

Flip-Flops and Sequential Circuit Design Flip-Flops and Sequential Circuit Design ECE 52 Winter 22 Reading ssignment Brown and Vranesic 7 Flip-Flops, Registers, Counters and a Simple Processor 7.5 T Flip-Flop 7.5. Configurable Flip-Flops 7.6

More information

DIGITAL COUNTERS. Q B Q A = 00 initially. Q B Q A = 01 after the first clock pulse.

DIGITAL COUNTERS. Q B Q A = 00 initially. Q B Q A = 01 after the first clock pulse. DIGITAL COUNTERS http://www.tutorialspoint.com/computer_logical_organization/digital_counters.htm Copyright tutorialspoint.com Counter is a sequential circuit. A digital circuit which is used for a counting

More information

Counters & Shift Registers Chapter 8 of R.P Jain

Counters & Shift Registers Chapter 8 of R.P Jain Chapter 3 Counters & Shift Registers Chapter 8 of R.P Jain Counters & Shift Registers Counters, Syllabus Design of Modulo-N ripple counter, Up-Down counter, design of synchronous counters with and without

More information

Digital Fundamentals. Lab 8 Asynchronous Counter Applications

Digital Fundamentals. Lab 8 Asynchronous Counter Applications Richland College Engineering Technology Rev. 0 B. Donham Rev. 1 (7/2003). Horne Rev. 2 (1/2008). Bradbury Digital Fundamentals CETT 1425 Lab 8 Asynchronous Counter Applications Name: Date: Objectives:

More information

Chapter 8. Sequential Circuits for Registers and Counters

Chapter 8. Sequential Circuits for Registers and Counters Chapter 8 Sequential Circuits for Registers and Counters Lesson 3 COUNTERS Ch16L3- "Digital Principles and Design", Raj Kamal, Pearson Education, 2006 2 Outline Counters T-FF Basic Counting element State

More information

Systems I: Computer Organization and Architecture

Systems I: Computer Organization and Architecture Systems I: omputer Organization and Architecture Lecture 8: Registers and ounters Registers A register is a group of flip-flops. Each flip-flop stores one bit of data; n flip-flops are required to store

More information

Chapter 4 Register Transfer and Microoperations. Section 4.1 Register Transfer Language

Chapter 4 Register Transfer and Microoperations. Section 4.1 Register Transfer Language Chapter 4 Register Transfer and Microoperations Section 4.1 Register Transfer Language Digital systems are composed of modules that are constructed from digital components, such as registers, decoders,

More information

Sequential Logic. (Materials taken from: Principles of Computer Hardware by Alan Clements )

Sequential Logic. (Materials taken from: Principles of Computer Hardware by Alan Clements ) Sequential Logic (Materials taken from: Principles of Computer Hardware by Alan Clements ) Sequential vs. Combinational Circuits Combinatorial circuits: their outputs are computed entirely from their present

More information

CHAPTER 11 LATCHES AND FLIP-FLOPS

CHAPTER 11 LATCHES AND FLIP-FLOPS CHAPTER 11 LATCHES AND FLIP-FLOPS This chapter in the book includes: Objectives Study Guide 11.1 Introduction 11.2 Set-Reset Latch 11.3 Gated D Latch 11.4 Edge-Triggered D Flip-Flop 11.5 S-R Flip-Flop

More information

Course Requirements & Evaluation Methods

Course Requirements & Evaluation Methods Course Title: Logic Circuits Course Prefix: ELEG Course No.: 3063 Sections: 01 & 02 Department of Electrical and Computer Engineering College of Engineering Instructor Name: Justin Foreman Office Location:

More information

GETTING STARTED WITH PROGRAMMABLE LOGIC DEVICES, THE 16V8 AND 20V8

GETTING STARTED WITH PROGRAMMABLE LOGIC DEVICES, THE 16V8 AND 20V8 GETTING STARTED WITH PROGRAMMABLE LOGIC DEVICES, THE 16V8 AND 20V8 Robert G. Brown All Rights Reserved August 25, 2000 Alta Engineering 58 Cedar Lane New Hartford, CT 06057-2905 (860) 489-8003 www.alta-engineering.com

More information

Layout of Multiple Cells

Layout of Multiple Cells Layout of Multiple Cells Beyond the primitive tier primitives add instances of primitives add additional transistors if necessary add substrate/well contacts (plugs) add additional polygons where needed

More information

RAM & ROM Based Digital Design. ECE 152A Winter 2012

RAM & ROM Based Digital Design. ECE 152A Winter 2012 RAM & ROM Based Digital Design ECE 152A Winter 212 Reading Assignment Brown and Vranesic 1 Digital System Design 1.1 Building Block Circuits 1.1.3 Static Random Access Memory (SRAM) 1.1.4 SRAM Blocks in

More information

Engr354: Digital Logic Circuits

Engr354: Digital Logic Circuits Engr354: igital Circuits Chapter 7 Sequential Elements r. Curtis Nelson Sequential Elements In this chapter you will learn about: circuits that can store information; Basic cells, latches, and flip-flops;

More information

150127-Microprocessor & Assembly Language

150127-Microprocessor & Assembly Language Chapter 3 Z80 Microprocessor Architecture The Z 80 is one of the most talented 8 bit microprocessors, and many microprocessor-based systems are designed around the Z80. The Z80 microprocessor needs an

More information

Digital Systems Laboratory

Digital Systems Laboratory Eskişehir Osmangazi University Digital Systems Laboratory Rev 3.01 February 2011 LIST OF EXPERIMENTS 1. BINARY AND DECIMAL NUMBERS 2. DIGITAL LOGIC GATES 3. INTRODUCTION TO LOGICWORKS 4. BOOLEAN ALGEBRA

More information

DIGITAL TECHNICS II. Dr. Bálint Pődör. Óbuda University, Microelectronics and Technology Institute 5. LECTURE: REGISTERS AND RELATED

DIGITAL TECHNICS II. Dr. Bálint Pődör. Óbuda University, Microelectronics and Technology Institute 5. LECTURE: REGISTERS AND RELATED DIGITAL TECHNICS II Dr. Bálint Pődör Óbuda University, Microelectronics and Technology Institute 5. LECTURE: REGISTERS AND RELATED 2nd (Spring) term 22/23 5. LECTURE: REGISTERS. Storage registers 2. Shift

More information

FORDHAM UNIVERSITY CISC 3593. Dept. of Computer and Info. Science Spring, 2011. Lab 2. The Full-Adder

FORDHAM UNIVERSITY CISC 3593. Dept. of Computer and Info. Science Spring, 2011. Lab 2. The Full-Adder FORDHAM UNIVERSITY CISC 3593 Fordham College Lincoln Center Computer Organization Dept. of Computer and Info. Science Spring, 2011 Lab 2 The Full-Adder 1 Introduction In this lab, the student will construct

More information

WEEK 8.1 Registers and Counters. ECE124 Digital Circuits and Systems Page 1

WEEK 8.1 Registers and Counters. ECE124 Digital Circuits and Systems Page 1 WEEK 8.1 egisters and Counters ECE124 igital Circuits and Systems Page 1 Additional schematic FF symbols Active low set and reset signals. S Active high set and reset signals. S ECE124 igital Circuits

More information

DM74LS169A Synchronous 4-Bit Up/Down Binary Counter

DM74LS169A Synchronous 4-Bit Up/Down Binary Counter Synchronous 4-Bit Up/Down Binary Counter General Description This synchronous presettable counter features an internal carry look-ahead for cascading in high-speed counting applications. Synchronous operation

More information

EXPERIMENT 8. Flip-Flops and Sequential Circuits

EXPERIMENT 8. Flip-Flops and Sequential Circuits EXPERIMENT 8. Flip-Flops and Sequential Circuits I. Introduction I.a. Objectives The objective of this experiment is to become familiar with the basic operational principles of flip-flops and counters.

More information

PART B QUESTIONS AND ANSWERS UNIT I

PART B QUESTIONS AND ANSWERS UNIT I PART B QUESTIONS AND ANSWERS UNIT I 1. Explain the architecture of 8085 microprocessor? Logic pin out of 8085 microprocessor Address bus: unidirectional bus, used as high order bus Data bus: bi-directional

More information

Digital Logic Design Sequential circuits

Digital Logic Design Sequential circuits Digital Logic Design Sequential circuits Dr. Eng. Ahmed H. Madian E-mail: ahmed.madian@guc.edu.eg Dr. Eng. Rania.Swief E-mail: rania.swief@guc.edu.eg Dr. Eng. Ahmed H. Madian Registers An n-bit register

More information

Counters. Present State Next State A B A B 0 0 0 1 0 1 1 0 1 0 1 1 1 1 0 0

Counters. Present State Next State A B A B 0 0 0 1 0 1 1 0 1 0 1 1 1 1 0 0 ounter ounters ounters are a specific type of sequential circuit. Like registers, the state, or the flip-flop values themselves, serves as the output. The output value increases by one on each clock cycle.

More information

54LS169 DM54LS169A DM74LS169A Synchronous 4-Bit Up Down Binary Counter

54LS169 DM54LS169A DM74LS169A Synchronous 4-Bit Up Down Binary Counter 54LS169 DM54LS169A DM74LS169A Synchronous 4-Bit Up Down Binary Counter General Description This synchronous presettable counter features an internal carry look-ahead for cascading in high-speed counting

More information

A Digital Timer Implementation using 7 Segment Displays

A Digital Timer Implementation using 7 Segment Displays A Digital Timer Implementation using 7 Segment Displays Group Members: Tiffany Sham u2548168 Michael Couchman u4111670 Simon Oseineks u2566139 Caitlyn Young u4233209 Subject: ENGN3227 - Analogue Electronics

More information

Diploma in Computer Hardware Maintenance and Network Technologies(DCHMNT)

Diploma in Computer Hardware Maintenance and Network Technologies(DCHMNT) Diploma in Computer Hardware Maintenance and Network Technologies(DCHMNT) Duration: One year including 3 months industrial Training The examination and evaluation pattern : Same as BTE The Structure of

More information

Fig1-1 2-bit asynchronous counter

Fig1-1 2-bit asynchronous counter Digital electronics 1-Sequential circuit counters Such a group of flip- flops is a counter. The number of flip-flops used and the way in which they are connected determine the number of states and also

More information

[ 4 ] Logic Symbols and Truth Table

[ 4 ] Logic Symbols and Truth Table [ 4 ] Logic s and Truth Table 1. How to Read MIL-Type Logic s Table 1.1 shows the MIL-type logic symbols used for high-speed CMO ICs. This logic chart is based on MIL-TD-806. The clocked inverter and transmission

More information

DIGITAL TECHNICS II. Dr. Bálint Pődör. Óbuda University, Microelectronics and Technology Institute. 2nd (Spring) term 2012/2013

DIGITAL TECHNICS II. Dr. Bálint Pődör. Óbuda University, Microelectronics and Technology Institute. 2nd (Spring) term 2012/2013 DIGITAL TECHNICS II Dr. Bálint Pődör Óbuda University, Microelectronics and Technology Institute 4. LECTURE: COUNTERS AND RELATED 2nd (Spring) term 2012/2013 1 4. LECTURE: COUNTERS AND RELATED 1. Counters,

More information

Electronics Merit Badge Class 3. 1/30/2014 Electronics Merit Badge Class 3 1

Electronics Merit Badge Class 3. 1/30/2014 Electronics Merit Badge Class 3 1 Electronics Merit Badge Class 3 1/30/2014 Electronics Merit Badge Class 3 1 Decimal Base 10 In base 10, there are 10 unique digits (0-9). When writing large numbers (more that 1 digit), each column represents

More information

3-Digit Counter and Display

3-Digit Counter and Display ECE 2B Winter 2007 Lab #7 7 3-Digit Counter and Display This final lab brings together much of what we have done in our lab experiments this quarter to construct a simple tachometer circuit for measuring

More information

EE360: Digital Design I Course Syllabus

EE360: Digital Design I Course Syllabus : Course Syllabus Dr. Mohammad H. Awedh Fall 2008 Course Description This course introduces students to the basic concepts of digital systems, including analysis and design. Both combinational and sequential

More information

NTE2053 Integrated Circuit 8 Bit MPU Compatible A/D Converter

NTE2053 Integrated Circuit 8 Bit MPU Compatible A/D Converter NTE2053 Integrated Circuit 8 Bit MPU Compatible A/D Converter Description: The NTE2053 is a CMOS 8 bit successive approximation Analog to Digital converter in a 20 Lead DIP type package which uses a differential

More information

1-800-831-4242

1-800-831-4242 Distributed by: www.jameco.com 1-800-831-4242 The content and copyrights of the attached material are the property of its owner. DM74LS161A DM74LS163A Synchronous 4-Bit Binary Counters General Description

More information

SN54/74LS192 SN54/74LS193

SN54/74LS192 SN54/74LS193 PRESEABLE BCD/DECADE UP/DOWN COUNER PRESEABLE 4-BI BINARY UP/DOWN COUNER he SN4/74LS2 is an UP/DOWN BCD Decade (842) Counter and the SN4/74LS3 is an UP/DOWN MODULO-6 Binary Counter. Separate Count Up and

More information

74LS193 Synchronous 4-Bit Binary Counter with Dual Clock

74LS193 Synchronous 4-Bit Binary Counter with Dual Clock 74LS193 Synchronous 4-Bit Binary Counter with Dual Clock General Description The DM74LS193 circuit is a synchronous up/down 4-bit binary counter. Synchronous operation is provided by having all flip-flops

More information

DM74LS191 Synchronous 4-Bit Up/Down Counter with Mode Control

DM74LS191 Synchronous 4-Bit Up/Down Counter with Mode Control August 1986 Revised February 1999 DM74LS191 Synchronous 4-Bit Up/Down Counter with Mode Control General Description The DM74LS191 circuit is a synchronous, reversible, up/ down counter. Synchronous operation

More information

Asynchronous counters, except for the first block, work independently from a system clock.

Asynchronous counters, except for the first block, work independently from a system clock. Counters Some digital circuits are designed for the purpose of counting and this is when counters become useful. Counters are made with flip-flops, they can be asynchronous or synchronous and they can

More information

CDA 3200 Digital Systems. Instructor: Dr. Janusz Zalewski Developed by: Dr. Dahai Guo Spring 2012

CDA 3200 Digital Systems. Instructor: Dr. Janusz Zalewski Developed by: Dr. Dahai Guo Spring 2012 CDA 3200 Digital Systems Instructor: Dr. Janusz Zalewski Developed by: Dr. Dahai Guo Spring 2012 Outline SR Latch D Latch Edge-Triggered D Flip-Flop (FF) S-R Flip-Flop (FF) J-K Flip-Flop (FF) T Flip-Flop

More information

Chapter 5. Sequential Logic

Chapter 5. Sequential Logic Chapter 5 Sequential Logic Sequential Circuits (/2) Combinational circuits: a. contain no memory elements b. the outputs depends on the current inputs Sequential circuits: a feedback path outputs depends

More information

DIGITAL ELECTRONICS. Counters. By: Electrical Engineering Department

DIGITAL ELECTRONICS. Counters. By: Electrical Engineering Department Counters By: Electrical Engineering Department 1 Counters Upon completion of the chapter, students should be able to:.1 Understand the basic concepts of asynchronous counter and synchronous counters, and

More information

Having read this workbook you should be able to: recognise the arrangement of NAND gates used to form an S-R flip-flop.

Having read this workbook you should be able to: recognise the arrangement of NAND gates used to form an S-R flip-flop. Objectives Having read this workbook you should be able to: recognise the arrangement of NAND gates used to form an S-R flip-flop. describe how such a flip-flop can be SET and RESET. describe the disadvantage

More information

Sistemas Digitais I LESI - 2º ano

Sistemas Digitais I LESI - 2º ano Sistemas Digitais I LESI - 2º ano Lesson 6 - Combinational Design Practices Prof. João Miguel Fernandes (miguel@di.uminho.pt) Dept. Informática UNIVERSIDADE DO MINHO ESCOLA DE ENGENHARIA - PLDs (1) - The

More information

Machine Architecture and Number Systems. Major Computer Components. Schematic Diagram of a Computer. The CPU. The Bus. Main Memory.

Machine Architecture and Number Systems. Major Computer Components. Schematic Diagram of a Computer. The CPU. The Bus. Main Memory. 1 Topics Machine Architecture and Number Systems Major Computer Components Bits, Bytes, and Words The Decimal Number System The Binary Number System Converting from Decimal to Binary Major Computer Components

More information

Sequential Circuit Design

Sequential Circuit Design Sequential Circuit Design Lan-Da Van ( 倫 ), Ph. D. Department of Computer Science National Chiao Tung University Taiwan, R.O.C. Fall, 2009 ldvan@cs.nctu.edu.tw http://www.cs.nctu.edu.tw/~ldvan/ Outlines

More information

Lab 11 Digital Dice. Figure 11.0. Digital Dice Circuit on NI ELVIS II Workstation

Lab 11 Digital Dice. Figure 11.0. Digital Dice Circuit on NI ELVIS II Workstation Lab 11 Digital Dice Figure 11.0. Digital Dice Circuit on NI ELVIS II Workstation From the beginning of time, dice have been used for games of chance. Cubic dice similar to modern dice date back to before

More information

Combinational Logic Design

Combinational Logic Design Chapter 4 Combinational Logic Design The foundations for the design of digital logic circuits were established in the preceding chapters. The elements of Boolean algebra (two-element switching algebra

More information

L4: Sequential Building Blocks (Flip-flops, Latches and Registers)

L4: Sequential Building Blocks (Flip-flops, Latches and Registers) L4: Sequential Building Blocks (Flip-flops, Latches and Registers) Acknowledgements: Materials in this lecture are courtesy of the following sources and are used with permission. Prof. Randy Katz (Unified

More information