# EE105 Fall 2014 Microelectronic Devices and Circuits. Operational Amplifier Error Sources: dc Current and Output Range Limitations

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1 EE105 Fall 014 Microelectronic Devices and Circuits Prof. Ming C. Wu 511 Sutardja Dai Hall (SDH) 1 Operational Amplifier Error Sources: dc Current and Output Range Limitations dc error sources result from the need to bias the internal circuits that form an operational amplifier and from mismatches between pairs of solid state devices in these circuits. These dc error sources include: Input offset voltage V OS i O Input bias current I B Input offset current I OS A real op amp obviously cannot deliver infinite output voltage or output current. Both are bounded: -V EE v O +V CC i O I max 1

2 Input-Offset Voltage With inputs being zero, the amplifier output rests at some non zero dc voltage level The equivalent dc input offset voltage is V OS = V O A The amplifier is connected as a voltage-follower to give output voltage that is approximately equal to the offset voltage. To model the effects of offset voltage, v O = A(v ID + V OS ) 3 Input-Offset Voltage (Example) Problem: Find quiescent dc voltage at output. Given data: R 1 =1. kω, R = 99 kω, V OS 3 mv Assumptions: The op amp is ideal except for nonzero offset voltage. Output voltage is given by # V OS 1+ 99kΩ & % (( 0.003) = 0.51 V \$ 1.kΩ' The actual sign of V OS is unknown as only an upper bound is given. Note: The offset voltage of most IC op amps can be manually adjusted by adding a potentiometer as shown. 4

3 Power Supply Rejection Ratio (PSRR) Power supply voltages change due to long-term drift or noise on supplies. Equivalent input offset voltage changes in response to power supply voltage changes. PSRR measures the ability of amplifier to reject power supply variations. PSRR indicates how offset voltage changes in response to change in power supply voltages. PSRR + = ΔV OS ΔV CC PSRR = ΔV OS ΔV EE Generally The + and values of PSRR are generally different. Both CMRR and PSRR fall rapidly with frequency increase. 5 Input-Bias and Offset Currents Bias currents I B1 and I B ( base currents in BJTs or gate currents in MOSFETs or JFETs) are similar in value with directions depending on the internal amplifier circuitry. I OS = I B1 I B Sign of the offset current is unknown as only upper bound is given. In the inverting amplifier shown, I B1 shorted out by the ground connection. Since, the inverting input is at virtual ground, the amplifier output is forced to supply I B through R. V O = I B R 6 3

4 Bias Current Compensation Using superpostion: " V T O = I B R I B1 R B 1+ R % \$ ' # & R 1 V T O = ( I B I B1 ) R = I OS R for R B = R 1 R R 1 + R Bias current compensation resistor R B is placed in series with the non-inverting input. Output due to I B1 alone is " V O = I B1 R B 1+ R % \$ ' # & R 1 Since, the offset current is typically 5-10 times smaller than individual bias currents, the dc output voltage error can be reduced by using bias compensation. 7 Bias Currents Errors in Integrator At t = 0, the reset switch is opened, and the circuit starts integrating its own offset voltage and bias current. Using analysis by superposition: v t ( ) = V OS + V RC t + I B C t At t < 0, the reset switch is closed, circuit becomes a voltage-follower with The output becomes a ramp with slope determined by V OS and I B, and eventually saturates at one of the power supplies. V O = V OS 8 4

5 Output Voltage and Current Limits Practical op amps have limited output voltage and current ranges. Voltage: Typically limited to several volts less than power supply span. Current: Limited by additional circuits (to limit power dissipation or protect against accidental short circuits). Current limit is often specified as minimum load resistance that the amplifier can drive with a given voltage swing. For example, i O 10V 5kΩ = ma i o = i L + i F = v O v + O = v O R L R + R 1 R EQ R EQ = R L ( R + R 1 ) For the inverting amplifier, R EQ = R L R 9 Output Voltage and Current Limits Example Assumptions: Ideal op amp except for limited output current. Analysis: R EQ = R L R 10V.5mA = 4 kω Since R L 5 kω, R 0 kω Problem: Design an inverting amp with given specifications. Given Data: A v = 0 db, R L 5 kω, v O 10 V. Magnitude of output current less than.5 ma. A v = 0 db R R 1 =10 Choose R 1 = 10 kω and R = 100 kω to provide an input resistance of 10 kω. The maximum output current will be: i O 10V 100kΩ + 10V =.1 ma <.5 ma 5kΩ 10 5

6 Finite Common-Mode Rejection Ratio (CMRR) A real amplifier responds to signal common to both inputs, called common-mode input voltage. In general, v ( ) + A 1 + v cm \$ v O = A v 1 v v O = A( v id ) + A cm ( v ic ) " # % ' & Differential-mode Input: v id = v 1 v Common-mode Input: v ic = v 1 + v 11 Finite Common-Mode Rejection Ratio CMRR v 1 = v ic + v id v = v ic v id A (or A dm ) = differential-mode gain A cm = common-mode gain v id = differential-mode input voltage v ic = common-mode input voltage An ideal amplifier has A cm = 0, but for a real amplifier,! v O = A v id + A v \$! cm ic v # & = A v id + ic \$ # & " A % " CMRR % CMRR = A A cm The actual sign of CMRR is not known before hand as only a lower bound is typically provided. 1 6

7 Finite CMRR Example Problem: Find the error introduced by finite CMRR. Given Data: A = 500, CMRR = 80 db, v 1 = V, v = V Assumptions: Op amp is ideal except for finite gain and CMRR. The CMRR of 80 db corresponds to CMRR of ±10 4. Assume CMRR = Analysis: v id = 5.001V 4.999V = 0.00 V v ic = V = 5.00 V " v v O = A v id + ic % " \$ ' = % \$ ' = 6.5 V # CMRR & # & A A cm = CMRR = 500 = 0.5 or -1 db The error introduced by the common-mode input is 5% of the differential input voltage. 13 Finite CMRR Voltage Follower Gain Error Ideal gain for voltage follower is unity, gain error v id = v i v o v ic = v i + v o " v o = A ( v i v o ) + v + v % i o # \$ CMRR& ' ( 1 + A v = v A* 1+ - o ) CMRR, = v i ( A* 1 - ) CMRR, A 1 GE =1 A v = CMRR " 1 % 1+ A\$ 1 ' # CMRR & 1 A 1 CMRR since both A and CMRR >> 1 The first term is due to finite amplifier gain; the second term shows that CMRR may introduce an even larger error. 14 7

8 Common-mode Input Resistance Op Amp Input Equivalent Circuit When a purely common-mode signal v ic is applied to the amplifier input (v id = 0), total resistance presented to source is R ic R ic = R ic where R ic is the common-mode input resistance. Normally, R ic >> R id. For a purely differential-mode input signal, input resistance is R in = R id 4R ic 15 8

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