ORDERING INFORMATION # of Ports Pressure Type Device Name
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1 Freescale Semiconductor 10 kpa On-Chip Temperature + Compensated and Calibrated Silicon Pressure The series silicon piezoresistive pressure sensors provide a very accurate and linear voltage output directly proportional to the applied pressure. These sensors house a single monolithic silicon die with the strain gauge and thin film resistor network integrated. The sensor is laser trimmed for precise span, offset calibration and temperature compensation. Features Temperature Compensated over 0 C to +85 C Ratiometric to Supply Voltage Differential and Gauge Options Available in Easy-to-Use Tape & Reel Series Pressure Rev 13, 10/ to 10 kpa (0 to 1.45 psi) 25 mv Full Scale (Typical) Application Examples Respiratory Diagnostics Air Movement Control Controllers Pressure Switching ORDERING INFORMATION Package Case # of Ports Pressure Type Device Name Device Marking Options No. None Single Dual Gauge Differential Absolute Small Outline Package (MPXV2010 Series) MPXV2010GP Tray 1369 MPXV2010GP MPXV2010DP Tray 1351 MPXV2010DP Unibody Package ( Series) D Tray 344 D DP Tray 344C DP GP Tray 344B GP GS Tray 344E D GSX Tray 344F D MPAK Package (MPXM2010 Series) MPXM2010D Rail 1320 MPXM2010D MPXM2010DT1 Tape and Reel 1320 MPXM2010D MPXM2010GS Rail 1320A MPXM2010GS MPXM2010GST1 Tape and Reel 1320A MPXM2010GS SMALL OUTLINE PACKAGES MPAK PACKAGES MPXV2010GP CASE MPXV2010DP CASE MPXM2010D/DT1 CASE MPXM2010GS/GST1 CASE 1320A-02 UNIBODY PACKAGES D CASE GP CASE 344B-01 DP CASE 344C-01 GS CASE 344E-01 GSX CASE 344F-01 Freescale Semiconductor, Inc., All rights reserved.
2 Operating Characteristics Table 1. Operating Characteristics (V S = 10 V DC, T A = 25 C unless otherwise noted, P1 > P2) Characteristic Symbol Min Typ Max Units Pressure Range (1) Supply Voltage (2) P OP 0 10 kpa V S V DC Supply Current I O 6.0 madc Full Scale Span (3) Offset (4) V FSS mv V OFF mv Sensitivity ΔV/ΔΡ 2.5 mv/kpa Linearity %V FSS Pressure Hysteresis (0 to 10 kpa) ±0.1 %V FSS Temperature Hysteresis ( 40 C to +125 C) ±0.5 %V FSS Temperature Coefficient on Full Scale Span TCV FSS %V FSS Temperature Coefficient on Offset TCV OFF mv Input Impedance Z IN Ω Output Impedance Z OUT Ω Response Time (5) (10% to 90%) t R 1.0 ms Warm-Up Time 20 ms Offset Stability (6) ±0.5 %V FSS kpa (kilopascal) equals psi. 2. Device is ratiometric within this specified excitation range. Operating the device at a different range may induce additional error due to device self-heating. 3. Full Scale Span (V FSS ) is defined as the algebraic difference between the output voltage at full rated pressure and the output voltage at the minimum rated pressure. 4. Offset (V OFF ) is defined as the output voltage at the minimum rated pressure. 5. Response Time is defined as the time for the incremental change in the output to go from 10% to 90% of its final value when subjected to a specified step change in pressure. 6. Offset stability is the product's output deviation when subjected to 1000 hours of Pulsed Pressure, Temperature Cycling with Bias Test. 2 Freescale Semiconductor
3 Maximum Ratings Pressure Table 2. Maximum Ratings (1) Rating Symbol Value Unit Maximum Pressure (P1 > P2) P MAX 75 kpa Burst Pressure (P1 > P2) P BURST 100 kpa Storage Temperature T STG 40 to +125 C Operating Temperature T A 40 to +125 C 1. Exposure beyond the specified limits may cause permanent damage or degradation to the device. Voltage Output versus Applied Differential Pressure The output voltage of the differential or gauge sensor increases with increasing pressure applied to the pressure side (P1) relative to the vacuum side (P2). Similarly, output voltage increases as increasing vacuum is applied to the vacuum side (P2) relative to the pressure side (P1). Figure 1. shows a block diagram of the internal circuitry on the stand-alone pressure sensor chip. V S 3 Sensing Element Thin Film Temperature Compensation and Calibration Circuitry 2 +V OUT 4 V OUT 1 GND Figure 1. Temperature Compensated and Calibrated Pressure Sensor Schematic Freescale Semiconductor 3
4 On-Chip Temperature Compensation and Calibration Figure 2. shows the output characteristics of the series at 25 C. The output is directly proportional to the differential pressure and is essentially a straight line. The effects of temperature on full scale span and offset are very small and are shown under Operating Characteristics. This performance over temperature is achieved by having both the shear stress strain gauge and the thin-film resistor circuitry on the same silicon diaphragm. Each chip is dynamically laser trimmed for precise span and offset calibration and temperature compensation. Figure 3. illustrates the differential/gauge die in the basic chip carrier (Case 344). A silicone gel isolates the die surface and wire bonds from the environment, while allowing the pressure signal to be transmitted to the silicon diaphragm. The series pressure sensor operating characteristics and internal reliability and qualification tests are based on use of dry air as the pressure media. Media other than dry air may have adverse effects on sensor performance and long term reliability. Contact the factory for information regarding media compatibility in your application. LINEARITY Linearity refers to how well a transducer's output follows the equation: V out = V off + sensitivity x P over the operating pressure range. There are two basic methods for calculating nonlinearity: (1) end point straight line fit (see Figure 4.) or (2) a least squares best line fit. While a least squares fit gives the best case linearity error (lower numerical value), the calculations required are burdensome. Conversely, an end point fit will give the worst case error (often more desirable in error budget calculations) and the calculations are more straightforward for the user. Freescale s specified pressure sensor linearities are based on the end point straight line method measured at the midrange pressure. Output (mvdc) kpa PSI V S = 10 Vdc T A = 25 C P1 > P2 a MAX TYP MIN Figure 2. Output vs. Pressure Differential Span Range (Typical) Offset (Typical) Wire Bond Lead Frame Silicone Die Coat Die P1 P2 Stainless Steel Metal Cover Epoxy Case RTV Die Bond Relative Voltage Output Least Squares Fit Exaggerated Performance Curve End Point Straight Line Fit Least Square Deviation Straight Line Deviation Offset Pressure (% Full Scale) Figure 3. Unibody Package: Cross Sectional Diagram (not to scale) Figure 4. Linearity Specification Comparison 4 Freescale Semiconductor
5 PRESSURE (P1)/VACUUM (P2) SIDE IDENTIFICATION TABLE Freescale designates the two sides of the pressure sensor as the Pressure (P1) side and the Vacuum (P2) side. The Pressure (P1) side is the side containing silicone gel which isolates the die from the environment. The pressure sensor is designed to operate with positive differential pressure applied, P1 > P2. The Pressure (P1) side may be identified by using the following table. Table 3. Pressure (P1) Side Delineation Part Number Case Type Pressure Pressure (P1) Side Identifier D 344 Stainless Steel Cap DP 344C Side with Part Marking GP 344B Side with Port Attached GS 344E Side with Port Attached GSX 344F Side with Port Attached MPXV2010GP 1369 Side with Port Attached MPXV2010DP 1351 Side with Part Marking MPXM2010D/DTI 1320 Side with Part Marking MPXM2010GS/GSTI 1320A Side with Port Attached Freescale Semiconductor 5
6 PACKAGE DIMENSIONS B J C M -T- SEATING PLANE -A- PIN 1 F D 4 PL R (0.005) M T G N A M L 1 F 2 3 Y DAMBAR TRIM ZONE: THIS IS INCLUDED WITHIN DIM. "F" 8 PL 4 Z NOTES: DIMENSIONING AND TOLERANCING PER ASME Y14.5M, CONTROLLING DIMENSION: INCH. DIMENSION -A- IS INCLUSIVE OF THE MOLD STOP RING. MOLD STOP RING NOT TO EXCEED (0.630). INCHES MILLIMETERS DIM MIN MAX MIN MAX A B C D F G BSC 2.54 BSC J L M 30 NOM 30 NOM N R Y Z STYLE 1: PIN 1. GROUND 2. + OUTPUT 3. + SUPPLY 4. - OUTPUT STYLE 2: PIN 1. VCC 2. - SUPPLY 3. + SUPPLY 4. GROUND STYLE 3: PIN 1. GND 2. -VOUT 3. VS 4. +VOUT CASE ISSUE AA UNIBODY PACKAGE SEATING PLANE -P- -T- J R C N B -Q- PORT #1 POSITIVE PRESSURE (P1) 0.25 (0.010) M T Q PIN 1 S F G H D 4 PL L S K 0.13 (0.005) M S Q S T S -A- U NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, CONTROLLING DIMENSION: INCH. INCHES MILLIMETERS DIM MIN MAX MIN MAX A B C D F G BSC 2.54 BSC H J K L N P Q R S U BSC BSC STYLE 1: PIN 1. GROUND 2. + OUTPUT 3. + SUPPLY 4. - OUTPUT CASE 344B-01 ISSUE B UNIBODY PACKAGE 6 Freescale Semiconductor
7 PACKAGE DIMENSIONS R PORT #2 SEATING PLANE PORT #1 SEATING PLANE PORT #2 VACUUM (P2) J V C B N W F G D 4 PL -Q- PIN 1 -P- -T- -T (0.010) M T Q S -A- U (0.005) M T S S Q S S L H PORT #1 POSITIVE PRESSURE (P1) K NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, CONTROLLING DIMENSION: INCH. INCHES MILLIMETERS DIM MIN MAX MIN MAX A B C D F G BSC 2.54 BSC H J K L N P Q R S U BSC BSC V W STYLE 1: PIN 1. GROUND 2. + OUTPUT 3. + SUPPLY 4. - OUTPUT CASE 344C-01 ISSUE B UNIBODY PACKAGE CASE 344E-01 ISSUE B UNIBODY PACKAGE Freescale Semiconductor 7
8 PACKAGE DIMENSIONS V PORT #1 POSITIVE PRESSURE (P1) C E J 0.25 (0.010) M T Q M F A U G K PIN 1 N S -T- -P- -Q- R B NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, CONTROLLING DIMENSION: INCH. INCHES MILLIMETERS DIM MIN MAX MIN MAX A B C D E F G BSC 2.54 BSC J K N P Q R S U V D 4 PL 0.13 (0.005) M T P S Q S STYLE 1: PIN 1. GROUND 2. V (+) OUT 3. V SUPPLY 4. V (-) OUT CASE 344F-01 ISSUE B UNIBODY PACKAGE 8 Freescale Semiconductor
9 PACKAGE DIMENSIONS Pressure PAGE 1 OF 2 CASE ISSUE A SMALL OUTLINE PACKAGE Freescale Semiconductor 9
10 PACKAGE DIMENSIONS PAGE 2 OF 2 CASE ISSUE A SMALL OUTLINE PACKAGE 10 Freescale Semiconductor
11 PACKAGE DIMENSIONS Pressure PAGE 1 OF 2 CASE ISSUE B SMALL OUTLINE PACKAGE Freescale Semiconductor 11
12 PACKAGE DIMENSIONS PAGE 2 OF 2 CASE ISSUE B SMALL OUTLINE PACKAGE 12 Freescale Semiconductor
13 PACKAGE DIMENSIONS Pressure CASE ISSUE B MPAK Freescale Semiconductor 13
14 PACKAGE DIMENSIONS CASE ISSUE A MPAK 14 Freescale Semiconductor
15 PACKAGE DIMENSIONS Pressure PIN 4 PIN 1 CASE 1320A-02 ISSUE A MPAK Freescale Semiconductor 15
16 PACKAGE DIMENSIONS CASE ISSUE A MPAK 16 Freescale Semiconductor
17 How to Reach Us: Home Page: Web Support: USA/Europe or Locations Not Listed: Freescale Semiconductor, Inc. Technical Information Center, EL East Elliot Road Tempe, Arizona or Europe, Middle East, and Africa: Freescale Halbleiter Deutschland GmbH Technical Information Center Schatzbogen Muenchen, Germany (English) (English) (German) (French) Japan: Freescale Semiconductor Japan Ltd. Headquarters ARCO Tower 15F 1-8-1, Shimo-Meguro, Meguro-ku, Tokyo Japan or support.japan@freescale.com Asia/Pacific: Freescale Semiconductor China Ltd. Exchange Building 23F No. 118 Jianguo Road Chaoyang District Beijing China support.asia@freescale.com For Literature Requests Only: Freescale Semiconductor Literature Distribution Center P.O. Box 5405 Denver, Colorado or Fax: LDCForFreescaleSemiconductor@hibbertgroup.com Information in this document is provided solely to enable system and software implementers to use Freescale Semiconductor products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. Freescale Semiconductor reserves the right to make changes without further notice to any products herein. Freescale Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. Typical parameters that may be provided in Freescale Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals, must be validated for each customer application by customer s technical experts. Freescale Semiconductor does not convey any license under its patent rights nor the rights of others. Freescale Semiconductor products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Freescale Semiconductor product could create a situation where personal injury or death may occur. Should Buyer purchase or use Freescale Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold Freescale Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Freescale Semiconductor was negligent regarding the design or manufacture of the part. Freescale and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. Freescale Semiconductor, Inc All rights reserved. Rev /2008
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