Embedded systems. chapter 7

Transcription

1 Embedded systems chapter 7

2 Embedded systems definition Embedded systems can be defined as systems that: directly control some hardware designed to a specific task only we will consider that an Embedded systems is a computer system designed for specific control functions possibly within a larger system So when designing Embedded systems it must be decided what is implemented by: hardware software It is common, but not required, that Embedded systems have real time computing constraints 20-Apr-14 Real Time Systems - Helder Daniel 2

3 Embedded systems complexity Embedded systems complexity depend on its purpose: Simple Embedded systems can have only one processor or microcontroller Complex Embedded systems can have several processors, DSPs, microcontrollers, analogue or digital interfaces and even peripherals They can be portable devices: Digital watches, Media players (MP3, MP4) or large unmovable devices like traffic light controllers, factory controllers The key characteristic that defines and Embedded system is that they are designed to handle a specific task only 20-Apr-14 Sistemas de tempo real - Helder Daniel 3

4 Embedded systems examples Some car systems (ECUs): ignition control, suspension, Some avionics (aircraft control systems) Medical equipment Portable navigation systems like GPS Media Players, video cameras, remote controllers Network routers, modems, printers, video subsystem (embedded in a larger computational system) Although some times cited as example of Embedded systems, today Mobile phones models are NOT designed to a single task (make phone calls) They can be used as all purpose computing systems, so they are NOT embedded systems. 20-Apr-14 Real Time Systems - Helder Daniel 4

5 Intro to Embedded system design I Embedded systems have a specific purpose Low cost systems can be designed to accomplish this specific purpose (we do not need an all purpose PC to control a micro-wave oven) Designers can take advantage of the sole purpose to develop a low cost system, yet fulfilling specifications, such as: Reliability Temporal constrains (real time or NOT) Physical dimensions Power consumption deciding which functions are implemented by hardware or by software 20-Apr-14 Sistemas de tempo real - Helder Daniel 5

6 Intro to Embedded system design II Specific hardware can be designed or the system can be assembled from components available in the market: Microcontrollers, DSPs, FPGAs, Memory, Some low cost small boards have a microprocessor (up) or a microcontroller (uc) assembled with some memory and some I/O capabilities (to be connect to other parts, or to control some hardware) Normally the cost grows with the complexity Choosing the parts required depends on the purpose and specifications for some embedded system 20-Apr-14 Sistemas de tempo real - Helder Daniel 6

7 Intro to Embedded system design III Developing software for some boards that include a processor can be done in an all purpose PC with a Software Development Kit, eg: For PIC uc based boards can be used the MPLAB IDE For boards running Android can be used Eclipse IDE with ADT plugin These kits includes tools like: cross-compiler (compile in the PC code to run in the hardware of the board) Emulator, simulator, debugger, After tested the code can be uploaded and ran in the board 20-Apr-14 Sistemas de tempo real - Helder Daniel 7

8 Intro to Embedded system design IV Programming languages commonly used: C/C++ Ada Java (commonly used with android) Assembly VHDL (FPGAs) Depending on the system and the library or framework used Assembly may be the only option to access some hardware functions Assembly can be embedded inside C/C++ or ADA code 20-Apr-14 Sistemas de tempo real - Helder Daniel 8

9 Intro to Embedded system design V In this chapter we will briefly address some tools and hardware that can be used to design and develop real time and embedded systems we will briefly address Microcontrollers (PIC) Android devices and finally some system modelling techniques 20-Apr-14 Sistemas de tempo real - Helder Daniel 9

10 Choosing a CPU When choosing the hardware for an embedded system, an important decision is the CPU Factors of choice may be: CPU have enough performance for the specifications CPU power consumption CPU supports the required operating system Software development tools available Processor classes that can be chosen: Microprocessors Microcontrollers DSPS 20-Apr-14 Sistemas de tempo real - Helder Daniel 10

11 Choosing a CPU: Microcontrollers and DSPs Normally microprocessors (ups) have in the chip only the core(s) (which might include FPU(S) or NOT) Microcontrollers (ucs) can have more devices in the chip, such as analogue and/or digital interfaces or other I/O capabilities and devices This way there is no need for extra chips (like I/O chips) This may reduce system cost and since signals do not need to cross the board More efficient More reliable DSPs, besides being designed for fast signal processing, may have in the chip some I/O devices too 20-Apr-14 Sistemas de tempo real - Helder Daniel 11

12 Choosing a CPU: Microcontrollers Microcontrollers and DSPs can be: very simple or very complex Microcontrollers can be specially designed (such as PIC family) or based on common microprocessors core (such as Motorola 68k based microcontrollers) The decision on which microcontroller to use depends on project requirements The huge variety of microcontroller families allows the designers to choose a suitable microcontroller balancing performance/cost as required 20-Apr-14 Sistemas de tempo real - Helder Daniel 12

13 Choosing a CPU: FPGAs Additionally some functions can be implemented in programmable hardware like: FPGAs FPGAs (Field-Programmable Gate Arrays) contain programmable logic components: logic blocks logic blocks can be programmed to implement logical gates and wired according to the requirements, thus implementing logic functions This devices are programmed by an Hardware Description Language such as VHDL With FPGAs even soft processors can be implemented like: MicroBlaze is a 32-bit RISC soft processor core designed for Xilinx FPGAs Nios II is a 32-bit RISC soft core architecture implemented entirely in the programmable logic and memory blocks of Altera FPGAs 20-Apr-14 Sistemas de tempo real - Helder Daniel 13

14 PIC Microcontroller I When designing embedded and real time systems, many times the choice of the CPU fall on microcontrollers (Or microcontrollers along with other devices, such as FPGAs) The Microchip Technology Inc., PIC (Peripheral Interface Controller) family have a wide range of microcontrollers, with different features (and different costs): Main differences are: Devices integrated in the chip On chip Data memory length On chip Program memory length Number of I/O lines (digital interface) and Input lines (analogue interface) Interrupt lines and number of interrupt vectors (entries in interrupt vector table)) Depending on the requirements a suitable microcontroller can be chosen from this family 20-Apr-14 Sistemas de tempo real - Helder Daniel 14

15 PIC Microcontroller II PIC microcontrollers are grouped by sub-families: PIC10XX, PIC12XX, PIC16XX, PIC17XX, PIC18XX PIC24 (16 bit) dspic (some DSP capabilities: hardware MAC multiply and accumulate: a = a + (b * c) PIC32 (32 bit) Some general features: Separate code and data buses (Harvard architecture) for devices other than PIC32 A small number of fixed length instructions (RISC like) 1 clock cycle instructions (2 cycles, or 4 cycles in 8-bit models) with exception of one delay cycle on branches and skips Sleep mode (for power saving) Watchdog timer Digital I/O lines or/and analogue input lines 20-Apr-14 Sistemas de tempo real - Helder Daniel 15

16 PIC Microcontroller III I/O Digital Port A I/O Digital Port A Analogue Input Port: AN0 - AN4 I/O Digital Port B I/O Digital Port B Analogue Input Port: AN5 - AN6 20-Apr-14 Sistemas de tempo real - Helder Daniel 16

17 PIC Microcontroller IV 1 Digital I/O ports 6 lines (Port A) 1 Digital I/O ports 3 lines (Port E) 1 Digital Analogue input Port 8 lines (across Port A and E) 3 Digital I/O ports 8 lines (Port B, C, D) Some port lines can be used to connect other signals such as external interrupt source or clocks 20-Apr-14 Sistemas de tempo real - Helder Daniel 17

18 PIC Microcontroller V Through digital or analogue lines the microcontroller can communicate and control devices or peripherals In PIC family this lines are connected to on chip Digital I/O interfaces or Analogue input interfaces This lines are grouped in I/O digital ports and input analogue ports (Not to be confused with I/O ports: a separate address space in CPU families such as x86 where peripheral registers can be mapped) In fact in x86 access to digital or analogue interface registers can be made through I/O ports In PIC access to these ports is made by specific registers Let s see how digital I/O ports can be accessed using as example a PIC16C55 20-Apr-14 Sistemas de tempo real - Helder Daniel 18

19 PIC Microcontroller VI PIC16C55 has 3 digital I/O ports Each port as 2 registers (eg. port C): data register (PORTC) direction register (TRISC) Direction register can be used to set the direction of each line in the port: 1 - input 0 - output For digital I/O port C (8 lines) each register has 8 bits Data register PORTC Direction register TRISC Digital I/O port C 20-Apr-14 Sistemas de tempo real - Helder Daniel 19

20 PIC Microcontroller VII PIC16C55 has 512 bytes on chip memory for programs (PIC16C57 has 2048) has some special registers and 25 all purpose registers (this is data memory) TRISX and PORTX registers can be mapped in on data chip memory: PORTA: 0x05 PORTB: 0x06 PORTC: 0x07 ( ) TRISA: 0x085 TRISB: 0x086 TRISC: 0x087 (NOT mapped on pic16c55) Different PICs can have different registers and different memory mappings Data register PORTC Direction register TRISC Digital I/O port C 20-Apr-14 Sistemas de tempo real - Helder Daniel 20

21 Program memory Two level stack Data memory: PIC16C5X block diagram Digital I/O ports 20-Apr-14 21

22 Special registers PIC16C5X program and data memory (registers) Data memory map General purpose registers (F registers) 20-Apr-14 Sistemas de tempo real - Helder Daniel 22

23 PIC digital I/O ports I Let s see an example of using digital I/O ports, a program that: 1) sets lines (pins) 7-4 of digital I/O port C for input and lines 3-0 to output 2) reads input from PORTC lines 7-4 3) inverts bits (NOT) 4) writes inverted bits to PORTC lines 3-0. A few notes: When the user writes a value to a port, all 8 bits are modified at the same time. However only the bits configured as outputs make it to the outside world. If willing to turn just a single line on or off, writing a value to the port will cause all outputs to change, not just the one the user is interested in (to change individual lines bitwise operations can be used over the previous port value) 20-Apr-14 Sistemas de tempo real - Helder Daniel 23

24 PIC digital I/O ports II Let s first see how this is done near the hardware in assembly to understand the PIC operation, and then we will see how to do it in C First we need to set port C input (7-4) and output line (3-0) This is done by setting the corresponding bit in TRISC register to 1 for input and to 0 for output However TRIS registers can not be accessed directly, even with assembler in PIC16C55 A value must be written in the special register W (an accumulator) and then transferred for the corresponding TRIS register with a tris instruction (2 cycles) SET_C equ b' ' ; port C input and output lines movlw SET_C ; copy TRIS_SET constant to W register tris PORTC ; copy W register to TRISC register 20-Apr-14 Sistemas de tempo real - Helder Daniel 24

25 PIC digital I/O ports III Now we must read port C 4 MSBits, the input lines (actually we have to read all bits) to a working register to manipulate data before sending out and invert the 4 MSBits (actually we have to invert all bits) But remember PIC is a RISK (like) processor so instruction set is reduced Port registers data can only be transferred to W register there is no NOT (or complement) operation for W register (there is for F registers) (We can XOR the contents of W register with 1s. This has the same effect of a NOT) PortC: 1010XXXX W: 1010XXXX 0101XXXX movf PORTC, W ; copy PORTC register to W register xorlw b ; NOT W 20-Apr-14 Sistemas de tempo real - Helder Daniel 25

26 PIC digital I/O ports IV Finally we need to move the inverted 4 MSbits to the 4 LSbits of I/O Port C (the output lines) But not all operations are possible with the W register (like swap nibbles) So we have to copy data to a general purpose (file) register f (Different PICs have a different number of f registers. Let s assume register f0a is available) portcvalue equ d'10 ; register f0a PortC: XXXX0101 W: 0101XXXX XXXX0101 movwf portcvalue ; copy W register to f0a register swapf portcvalue, W ; swap 4 MSbits with 4 Lsbits, leave ; result in W register ; could also be done with 4 RRF ; instructions movwf PORTC ; copy W register to PORTC register ; only output lines are affected f0a: 1010XXXX 20-Apr-14 Sistemas de tempo real - Helder Daniel 26

27 PIC digital I/O ports V Finally we need to move the inverted 4 MSbits to the 4 LSbits of I/O Port C (the output lines) But not all operations are possible with the W register (like rotate bits) So we have to copy data to a general purpose (file) register f (Different PICs have a different number of f registers. Let s assume register f0a is available) portcvalue equ d'10 ; register f0a PortC: XXXX0101 W: 0101XXXX XXXX0101 movwf portcvalue ; copy W register to f0a register RRF portcvalue, F ; rotate bits to the right RRF portcvalue, F ; 4 times RRF portcvalue, F ; RRF portcvalue, W ; leave result in W register movwf PORTC ; copy W register to PORTC register ; only output lines are affected f0a: 1010XXXX X1010XXX XX1010XX XXX1010X 20-Apr-14 Sistemas de tempo real - Helder Daniel 27

28 PIC digital I/O ports IVa The complete assembler program: SET_C equ b' ' ; port C input and output lines portcvalue equ d'10' ; register f0a start movlw SET_C ; Set Port C I/O lines direction tris PORTC movf PORTC, W ; read Port C xorlw b' ' ; Invert bits (NOT) movwf portcvalue swapf portcvalue, W ; swap 4 Msbits with 4 LSbits movwf PORTC ; send inverted bits to Port C 4 LSbits 20-Apr-14 Sistemas de tempo real - Helder Daniel 28

29 PIC digital I/O ports IVb The complete assembler program (alternate version, same Ci): SET_C equ b' ' ; port C input and output lines portcvalue equ d'10' ; register f0a start movlw SET_C ; Set Port C I/O lines direction tris PORTC movf PORTC, W ; read Port C movwf portcvalue comf portcvalue, F ; Invert bits (NOT) swapf portcvalue, W ; swap 4 Msbits with 4 LSbits movwf PORTC ; send inverted bits to Port C 4 LSbits 20-Apr-14 Sistemas de tempo real - Helder Daniel 29

30 PIC digital I/O ports VII In C it is not possible to access directly the PIC registers (It is however possible to embed assembler code in C code to do the trick) However since PORT and TRIS registers are mapped in data memory we can access these registers trough memory Since port C registers are mapped in: PORTC = 0x07 and TRISC = 0x87 We can define some macros to do the trick: volatile unsigned char *PORTCadr = 0x07 #define PORTC (* PORTCadr) volatile unsigned char *TRISCadr = 0x87 #define PORTC (* TRISCadr) 20-Apr-14 Sistemas de tempo real - Helder Daniel 30

31 PIC digital I/O ports VIII Now when found on C code: PORTC = 0x22; C pre-processor expands it to: when found : (* PORTCadr) = 0x22; //write value: 0x22 to data memory location: 0x07 unsigned char c = PORTC; It is expanded to: unsigned char c = (* PORTCadr); //read value at data memory location: //0x07 into c variable 20-Apr-14 Sistemas de tempo real - Helder Daniel 31

32 PIC digital I/O ports IX If Port registers are not mapped in data memory a special C may be used to locate them in the register file (data memory): volatile unsigned char 0x06; volatile control unsigned char 0x06; Note the special keyword control to indicate control register TRIS for PortB (at 0x06) Now when found: TRISB = 0xF0; //set Port B I/O lines direction Compiler (for PIC16C55) generates assembler code: MOVLW 0xF0 TRIS 0x06 Code generated for: PORTB = 0x22 is equal to previous slide 20-Apr-14 Sistemas de tempo real - Helder Daniel 32

33 PIC digital I/O ports X Now using this macros we can access port C: main () { unsigned char portcvalue; } TRISC = 0xF0; portcvalue = PORTC; portcvalue = ~ portcvalue; portcvalue = portcvalue>>4; PORTC = portcvalue ; //Set port C input and output lines //set PORTC bits 7-4 to input //3-0 to output, in binary: //read PORTC only 4 MSBits are //meaningful //invert bits (NOT) //shift to put value in output pins //write PORTC, only 4 LSBits are //outputted 20-Apr-14 Sistemas de tempo real - Helder Daniel 33

34 PIC digital I/O ports XI However register mapping can be different in different PIC versions So it is better to rely on the C compiler: C compilers, like Hi-Tech C, provide global variables to access registers: PORTA, TRISA, PORTB, TRISB, just include: #include <pic.h> //or <htc.h> for Hi-Tech C compiler the header for the PIC version (eg. <pic16c55.h>) is automatically loaded if defined in a MPLAB IDE project MPLAB IDE (or MPLAB IDE X) and simulator can be set to compile and simulate a specific PIC version, let s see a bit of this IDE Id=1406&dDocName=en019469&part=SW Apr-14 Sistemas de tempo real - Helder Daniel 34

35 PIC MPLAB IDE I 20-Apr-14 Sistemas de tempo real - Helder Daniel 35

36 PIC MPLAB IDE II Besides watches for register contents and variables while debugging the simulator as other features such as timing a segment of code to find (Ci): In this example the whole program takes 34 cycles (at 20 MHz clock -> 6.8 micro secs) (slower than the assembler implementation, cause rotate was implemented with a loop, a general solution for code like: variable >> n) 20-Apr-14 Sistemas de tempo real - Helder Daniel 36

37 PIC MPLAB IDE III In order to test the application on the simulator, signals can be applied to pins This stimulus can be edited in a stimulus Dialog (and saved to a file) While Dialog Open the stimulus defined are applied to the simulator In this example Port C Pins 7 and 6 are set to 1 at cycle 0 (others to 0) (so when previous example program ends Port C pin 0 and 1 are also 1 in hexa at the start Port C have value 0xC0 and at the end: 0xC3) Note: Stimulus can be applied to individual pins or to a whole port in hexadecimal (in the example all PortA pins are set to 1) 20-Apr-14 Sistemas de tempo real - Helder Daniel 37

38 PIC MPLAB IDE IV Stimulus can also be set periodically In this example PortB pin 0 will start high during 10 cycles, then low during the next 10 cycles This behaviour will be repeated in each 20 cycle period 20-Apr-14 Sistemas de tempo real - Helder Daniel 38

39 Practical cases We have seen just a brief overview of PIC microcontroller family yet only with this info we can implement some real life projects We will address briefly two examples: Vending machine logic 7 segment BCD display 20-Apr-14 Sistemas de tempo real - Helder Daniel 39

40 Vending machine I A vending machine logic can be implemented with a microcontroller In this very simple example the vending machine just releases one product when 1,50 were inserted uc digital I/O ports are connected to the coin identifying mechanism (inputs: fifty and hundred) uc digital I/O ports are connected to product release mechanism (or drawer) and the change release mechanism (outputs: open and change) Coin id mechanism fifty (RA0) hundred (RA1) reset clock FSM (Pic) open (RB0) change (RB1) Product release mechanism change release mechanism 20-Apr-14 Sistemas de tempo real - Helder Daniel 40

41 Vending machine II Allowed coins are only 50 cents and 1 Euro There are several ways to insert 1,50 (150 cents) with these two coins: (50 cents change) (50 cents change) The Finite State Machine (FSM) is at the right A simplified C implementation of the FSM is in the next slide (no timing issues) 20-Apr-14 Sistemas de tempo real - Helder Daniel 41

42 Vending machine III #include <pic.h> //FSM states enum FSMstate { s00, s50, s100, s150, s200 } state; //Input and output lines #define fifty (PORTA & 0x01) //RA0 #define hundred (PORTA & 0x02) //RA1 #define open (PORTB = 0x01) //RB0 #define openchange (PORTB = 0x03) //RB0 & RB1 int main(int argc, char** argv) { TRISA = 0xFF; //Set all port A lines for input TRISB = 0x00; //Set all port B lines for output state = s00; //reset 20-Apr-14 Sistemas de tempo real - Helder Daniel 42

43 Vending machine IV //FSM implementation while(1) { //wait next period //(can be done using a timer) switch (state) { case s00 : if (fifty) state=s50; else if (hundred) state=s100; break; case s50 : if (fifty) state=s100; else if (hundred) state=s150; break; case s100 : if (fifty) state=s150; else if (hundred) state=s200; break; case s150 : open; state=s00; break; case s200 : openchange; state=s00; break; } } return (EXIT_SUCCESS); } 20-Apr-14 Sistemas de tempo real - Helder Daniel 43

44 7 segment display I BCD inputs (PortA) segment outputs (Port C) RA3 RA2 RA1 RA0 RC6 RC5 RC4 RC3 RC2 RC1 RC0 Hex Fh h Bh Fh h Dh Ch h Fh h display 20-Apr-14 Sistemas de tempo real - Helder Daniel 44

45 7 segment display II #include <pic.h> //7 segment BCD display lookup table //C compiler stores it in a set of f registers unsigned char bcd7[] = { 0x3F, 0x05, 0x5B, 0x4F, 0x66, 0x6D, 0x7C, 0x07, 0x8F, 0x67 }; int main(int argc, char** argv) { unsigned char Alsb; TRISA = 0xFF; TRISC = 0x00; //Set all port A lines for input //Set all port C lines for output Alsb = PORTA & 0x0F; //read port A 4 LSBits (BCD digit) PORTC = bcd7[alsb]; //set display (indirect addressing) } return (EXIT_SUCCESS); 20-Apr-14 Sistemas de tempo real - Helder Daniel 45

46 7 segment display III What if lookup table can not fit in the available registers? (pic16c55 data memory is only 25 general purpose F registers to store all variables) //7 segment BCD display lookup table unsigned char bcd7[] = { 0x3F, 0x05, 0x5B, 0x4F, 0x66, 0x6D, 0x7C, 0x07, 0x8F, 0x67 }; The lookup table can be implemented in program memory as a function returning a value depending on the argument: //PRE: idx >= 0 && idx <= 9 unsigned char lookup (unsigned char idx) { switch (idx) { case 0: return 0x3F; case 1: return 0x05; // default : return 00; //Not really needed since Pre-condition } //specifies argument range, but... } 20-Apr-14 Sistemas de tempo real - Helder Daniel 46

47 unsigned char bcd7(unsigned char idx) { 005 BB0 GOTO 0x1b0 1B0 029 MOVWF 0x9 switch (idx) { 1B1 BDE GOTO 0x1de 1DE 209 MOVF 0x9, W 1DF F00 XORLW 0 1E0 643 BTFSC 0x3, 0x2 1E1 BB2 GOTO 0x1b2 1E2 F01 XORLW 0x1 1E3 643 BTFSC 0x3, 0x2 1E4 BB6 GOTO 0x1b6 1E5 F03 XORLW 0x3 1E6 643 BTFSC 0x3, 0x2 1E7 BBA GOTO 0x1ba 1E8 F01 XORLW 0x1 1E9 643 BTFSC 0x3, 0x2 1EA BBE GOTO 0x1be 1EB F07 XORLW 0x7 1EC 643 BTFSC 0x3, 0x2 1ED BC2 GOTO 0x1c2 1EE F01 XORLW 0x1 1EF 643 BTFSC 0x3, 0x2 1F0 BC6 GOTO 0x1c6 1F1 F03 XORLW 0x3 1F2 643 BTFSC 0x3, 0x2 1F3 BCA GOTO 0x1ca 1F4 F01 XORLW 0x1 1F5 643 BTFSC 0x3, 0x2 1F6 BCE GOTO 0x1ce 1F7 F0F XORLW 0xf 1F8 643 BTFSC 0x3, 0x2 7 segment display IV 1F9 BD2 GOTO 0x1d2 1FA F01 XORLW 0x1 1FB 643 BTFSC 0x3, 0x2 1FC BD6 GOTO 0x1d6 1FD BDA GOTO 0x1da 34: case 0: return 0x3F; 1B2 C3F MOVLW 0x3f 1B3 028 MOVWF 0x8 1B4 BFE GOTO 0x1fe 1B5 BFE GOTO 0x1fe ; cases 1 to 9 44: default : return 0; 1DA 068 CLRF 0x8 1DB BFE GOTO 0x1fe 1DC BFE GOTO 0x1fe ; end function 45: } 1DD BFE GOTO 0x1fe 46: } 1FE 800 RETLW 0 This the assembly code compiled by free Hi-Tech C lite compiler Functions introduces some overhead 2 instructions to get function argument Since jumps take 2 cycles this 2 instructions take 3 cycles 20-Apr-14 Sistemas de tempo real - Helder Daniel 47

48 unsigned char bcd7(unsigned char idx) { 005 BB0 GOTO 0x1b0 1B0 029 MOVWF 0x9 switch (idx) { 1B1 BDE GOTO 0x1de 1DE 209 MOVF 0x9, W 1DF F00 XORLW 0 1E0 643 BTFSC 0x3, 0x2 1E1 BB2 GOTO 0x1b2 1E2 F01 XORLW 0x1 1E3 643 BTFSC 0x3, 0x2 1E4 BB6 GOTO 0x1b6 1E5 F03 XORLW 0x3 1E6 643 BTFSC 0x3, 0x2 1E7 BBA GOTO 0x1ba 1E8 F01 XORLW 0x1 1E9 643 BTFSC 0x3, 0x2 1EA BBE GOTO 0x1be 1EB F07 XORLW 0x7 1EC 643 BTFSC 0x3, 0x2 1ED BC2 GOTO 0x1c2 1EE F01 XORLW 0x1 1EF 643 BTFSC 0x3, 0x2 1F0 BC6 GOTO 0x1c6 1F1 F03 XORLW 0x3 1F2 643 BTFSC 0x3, 0x2 1F3 BCA GOTO 0x1ca 1F4 F01 XORLW 0x1 1F5 643 BTFSC 0x3, 0x2 1F6 BCE GOTO 0x1ce 1F7 F0F XORLW 0xf 1F8 643 BTFSC 0x3, 0x2 7 segment display IV 1F9 BD2 GOTO 0x1d2 1FA F01 XORLW 0x1 1FB 643 BTFSC 0x3, 0x2 1FC BD6 GOTO 0x1d6 1FD BDA GOTO 0x1da 34: case 0: return 0x3F; 1B2 C3F MOVLW 0x3f 1B3 028 MOVWF 0x8 1B4 BFE GOTO 0x1fe 1B5 BFE GOTO 0x1fe ; cases 1 to 9 44: default : return 0; 1DA 068 CLRF 0x8 1DB BFE GOTO 0x1fe 1DC BFE GOTO 0x1fe ; end function 45: } 1DD BFE GOTO 0x1fe 46: } 1FE 800 RETLW 0 Also there is an extra goto to the next instruction Free compilers do not optimize much the code Hi-tech C Pro generates code 40% smaller (which may be faster) than Hi- Tech C lite (the free version) 20-Apr-14 Sistemas de tempo real - Helder Daniel 48

49 unsigned char bcd7(unsigned char idx) { 005 BB0 GOTO 0x1b0 1B0 029 MOVWF 0x9 switch (idx) { 1B1 BDE GOTO 0x1de 1DE 209 MOVF 0x9, W 1DF F00 XORLW 0 1E0 643 BTFSC 0x3, 0x2 1E1 BB2 GOTO 0x1b2 1E2 F01 XORLW 0x1 1E3 643 BTFSC 0x3, 0x2 1E4 BB6 GOTO 0x1b6 1E5 F03 XORLW 0x3 1E6 643 BTFSC 0x3, 0x2 1E7 BBA GOTO 0x1ba 1E8 F01 XORLW 0x1 1E9 643 BTFSC 0x3, 0x2 1EA BBE GOTO 0x1be 1EB F07 XORLW 0x7 1EC 643 BTFSC 0x3, 0x2 1ED BC2 GOTO 0x1c2 1EE F01 XORLW 0x1 1EF 643 BTFSC 0x3, 0x2 1F0 BC6 GOTO 0x1c6 1F1 F03 XORLW 0x3 1F2 643 BTFSC 0x3, 0x2 1F3 BCA GOTO 0x1ca 1F4 F01 XORLW 0x1 1F5 643 BTFSC 0x3, 0x2 1F6 BCE GOTO 0x1ce 1F7 F0F XORLW 0xf 1F8 643 BTFSC 0x3, 0x2 7 segment display IV 1F9 BD2 GOTO 0x1d2 1FA F01 XORLW 0x1 1FB 643 BTFSC 0x3, 0x2 1FC BD6 GOTO 0x1d6 1FD BDA GOTO 0x1da 34: case 0: return 0x3F; 1B2 C3F MOVLW 0x3f 1B3 028 MOVWF 0x8 1B4 BFE GOTO 0x1fe 1B5 BFE GOTO 0x1fe ; cases 1 to 9 44: default : return 0; 1DA 068 CLRF 0x8 1DB BFE GOTO 0x1fe 1DC BFE GOTO 0x1fe ; end function 45: } 1DD BFE GOTO 0x1fe 46: } 1FE 800 RETLW 0 The switch also introduces an overhead 33 instructions just to find the correct case The worst case of execution time (Ci) happens when finding the last value in the table (idx==9) This takes 34 cycles The whole function takes 78 instructions And its worst execution time is 43 cycles 20-Apr-14 Sistemas de tempo real - Helder Daniel 49

50 unsigned char bcd7(unsigned char idx) { 005 BB0 GOTO 0x1b0 1B0 029 MOVWF 0x9 switch (idx) { 1B1 BDE GOTO 0x1de 1DE 209 MOVF 0x9, W 1DF F00 XORLW 0 1E0 643 BTFSC 0x3, 0x2 1E1 BB2 GOTO 0x1b2 1E2 F01 XORLW 0x1 1E3 643 BTFSC 0x3, 0x2 1E4 BB6 GOTO 0x1b6 1E5 F03 XORLW 0x3 1E6 643 BTFSC 0x3, 0x2 1E7 BBA GOTO 0x1ba 1E8 F01 XORLW 0x1 1E9 643 BTFSC 0x3, 0x2 1EA BBE GOTO 0x1be 1EB F07 XORLW 0x7 1EC 643 BTFSC 0x3, 0x2 1ED BC2 GOTO 0x1c2 1EE F01 XORLW 0x1 1EF 643 BTFSC 0x3, 0x2 1F0 BC6 GOTO 0x1c6 1F1 F03 XORLW 0x3 1F2 643 BTFSC 0x3, 0x2 1F3 BCA GOTO 0x1ca 1F4 F01 XORLW 0x1 1F5 643 BTFSC 0x3, 0x2 1F6 BCE GOTO 0x1ce 1F7 F0F XORLW 0xf 1F8 643 BTFSC 0x3, 0x2 7 segment display IV 1F9 BD2 GOTO 0x1d2 1FA F01 XORLW 0x1 1FB 643 BTFSC 0x3, 0x2 1FC BD6 GOTO 0x1d6 1FD BDA GOTO 0x1da 34: case 0: return 0x3F; 1B2 C3F MOVLW 0x3f 1B3 028 MOVWF 0x8 1B4 BFE GOTO 0x1fe 1B5 BFE GOTO 0x1fe ; cases 1 to 9 44: default : return 0; 1DA 068 CLRF 0x8 1DB BFE GOTO 0x1fe 1DC BFE GOTO 0x1fe ; end function 45: } 1DD BFE GOTO 0x1fe 46: } 1FE 800 RETLW 0 Each case has 4 instructions (default case has 3) There is an extra goto never executed (even a free compiler could avoid this) Each case takes 4 cycles: 1 for each mov and 2 for the goto (default takes 3) 20-Apr-14 Sistemas de tempo real - Helder Daniel 50

51 unsigned char bcd7(unsigned char idx) { 005 BB0 GOTO 0x1b0 1B0 029 MOVWF 0x9 switch (idx) { 1B1 BDE GOTO 0x1de 1DE 209 MOVF 0x9, W 1DF F00 XORLW 0 1E0 643 BTFSC 0x3, 0x2 1E1 BB2 GOTO 0x1b2 1E2 F01 XORLW 0x1 1E3 643 BTFSC 0x3, 0x2 1E4 BB6 GOTO 0x1b6 1E5 F03 XORLW 0x3 1E6 643 BTFSC 0x3, 0x2 1E7 BBA GOTO 0x1ba 1E8 F01 XORLW 0x1 1E9 643 BTFSC 0x3, 0x2 1EA BBE GOTO 0x1be 1EB F07 XORLW 0x7 1EC 643 BTFSC 0x3, 0x2 1ED BC2 GOTO 0x1c2 1EE F01 XORLW 0x1 1EF 643 BTFSC 0x3, 0x2 1F0 BC6 GOTO 0x1c6 1F1 F03 XORLW 0x3 1F2 643 BTFSC 0x3, 0x2 1F3 BCA GOTO 0x1ca 1F4 F01 XORLW 0x1 1F5 643 BTFSC 0x3, 0x2 1F6 BCE GOTO 0x1ce 1F7 F0F XORLW 0xf 1F8 643 BTFSC 0x3, 0x2 7 segment display IV 1F9 BD2 GOTO 0x1d2 1FA F01 XORLW 0x1 1FB 643 BTFSC 0x3, 0x2 1FC BD6 GOTO 0x1d6 1FD BDA GOTO 0x1da 34: case 0: return 0x3F; 1B2 C3F MOVLW 0x3f 1B3 028 MOVWF 0x8 1B4 BFE GOTO 0x1fe 1B5 BFE GOTO 0x1fe ; cases 1 to 9 44: default : return 0; 1DA 068 CLRF 0x8 1DB BFE GOTO 0x1fe 1DC BFE GOTO 0x1fe ; end function 45: } 1DD BFE GOTO 0x1fe 46: } 1FE 800 RETLW 0 The goto 0x1FE could also be avoided (it is a goto a return) And substituted by a return with a value, eg.: RETLW 0x3F This will reduce each case and return from 6 cycles to just 2 20-Apr-14 Sistemas de tempo real - Helder Daniel 51

52 7 segment display V An efficient implementation of a lookup table, in program memory, as a function, can be as shown below, using the return value instruction (RETLW) (fnc bcd7 takes only 3 cycles whatever the element to access + 2 for the call = 5 cycles) bcd7 ; W register is argument idx of fnc addwf _PCL, F ; _PCL is program counter retlw 0x3F ; leave return value in W register retlw 0x05 retlw 0x5B retlw 0x4F retlw 0x66 retlw 0x6D retlw 0x7C retlw 0x07 retlw 0x8F retlw 0x67 start (main) movwf PORTA, W ; read port A andlw 0x0F ; make sure 4 MSBits are 0 call bcd7 ; get 7 segment display value movwf PORTC ; write to port C (7 segment display) 20-Apr-14 Sistemas de tempo real - Helder Daniel 52

53 7 segment display V unsigned char bcd7[] = { 0x3F, 0x05, 0x5B, 0x4F, 0x66 Using a look up table in data memory each access takes also 5 cycles but is it necessary code to initialize the look up table (20 instructions since there is no way to store a literal in F registers) So init lookup takes more program memory than the function in previous slide (and adds 20 cycles overhead at the beginning of the program) idx equ d'09 ; prot A bcd value (idx) bcd7 equ d'10 ; bcd7 table from register 10 to 19 initlookup ; possible look up table init routine movlw 0x3f movwf bcd7 movlw 0x05 movwf bcd7+1 ;... More 8 elements initialization start (main) movwf PORTA, W ; read port A andlw 0x0F ; make sure 4 MSBits are 0 movwf idx ; store index in F register movwl bcd7 ; get bcd7 table base address addwf idx ; add index movwf FSR ; set index register movf INDF, W ; get indexed value movwf PORTC ; write to port C (7 segment display) 20-Apr-14 53

54 Single Board Computer (SBC) I PicKits includes, in a board, some devices along a pic microcontroller However current technology allows the deployment of a full computer in a small board Along the CPU and main memory these board can have: SSD drive (secondary memory) SD memory card Ethernet adapter Wireless Network adapter Bluetooth adapter HDMI and/or CVBS Video adapter Audio adapter (IN/OUT) Serial Port USB ports Some expansion Connectors 20-Apr-14 Real Time Systems - Helder Daniel 54

55 SBC Snowball I CPU: ARM Dual Cortex 1GHz Main Mem: 1 GByte LP-DDR2 Secondary Mem: 4/8 GByte e-mmc Operating system: Linux 2.6; MeeGo; Ubuntu; Android GPS 3 Axis Accelerometer 3 Axis Magnetometer 3 Axis Gyrometer Pressure sensor 85 mm + all features listed in previous slide SBC example: SKY-S9500-ULP-CXX (SNOWBALL) 20-Apr-14 Real Time Systems - Helder Daniel 55

56 SBC Snowball II Snowball has built in flash memory (emmc) with 4 or 8 Gbytes Also an SD memory card slot A full operating system can be installed in the emmc or SD-Card: Linux Android The snowball have an ARM processor. Adeos-ipipe patches are available for Linux ARM version Xenomai can be compiled for ARM based systems 20-Apr-14 Sistemas de tempo real - Helder Daniel 56

57 SBC Snowball III The snowball is a general purpose computer We can also connect an USB keyboard and a Monitor (hdmi or cvbs interface) However if used for a sole purpose only (like vehicle control) it can be seen as an embedded system A MIEET project to develop a controller for an aircraft model, using a snowball board was concluded last year. 20-Apr-14 Sistemas de tempo real - Helder Daniel 57

58 Android I Android is based on Linux OS It is not a real time system But have a framework to handle many devices like: GPS Accelerometer Magnetometer Gyrometer Pressure sensor Android can be installed in an SBC like snowball or in a smartphone, a tablet PC 20-Apr-14 Sistemas de tempo real - Helder Daniel 58

59 Android II 20-Apr-14 Sistemas de tempo real - Helder Daniel 59

60 Android III Dalvik is the process virtual machine (VM) for Android operating system, that runs apps on Android devices Programs are commonly written in a dialect of Java and compiled to bytecode java Then they are converted from Java Virtual Machine-compatible *.class files to Dalvik-compatible *.dex (Dalvik Executable) files before installation on an Android device. Java VMs are stack machines the Dalvik VM is a register-based architecture. The compact Dalvik executable format (.dex) is designed to be suitable for systems that are constrained in terms of memory and processor speed. 20-Apr-14 Sistemas de tempo real - Helder Daniel 60

61 Android IV In Android access to devices like GPS is made through the framework: class LocationManager Below is a simplified example of a Java method that returns in a string the Longitude and Latitude coordinates from current location, using GPS. public String getlocationcoord() { protected LocationManager lm; lm = (LocationManager) getsystemservice(context.location_service); Location l = lm.getlastknownlocation(locationmanager.gps_provider); } return "Long:" + l.getlongitude() + Lat: + l.getlatitude()); 20-Apr-14 Sistemas de tempo real - Helder Daniel 61

62 Android V Eclipse IDE have a plugin for android apps development: Android Development Tools (ADT) It includes a cross compiler and a simulator Programs developed on a PC with Eclipse and ADT can then be uploaded for an Android device Let s take a brief look at these IDE and tools 20-Apr-14 Sistemas de tempo real - Helder Daniel 62

63 Android VI 20-Apr-14 Sistemas de tempo real - Helder Daniel 63

64 Android VII 20-Apr-14 Sistemas de tempo real - Helder Daniel 64

65 Android VII 20-Apr-14 Sistemas de tempo real - Helder Daniel 65

66 Embedded system modelling I Some tools and frameworks can generate an application from a specification and a model: specification code generation Model In this chapter a modelling technology for real time or embedded systems will be presented: State charts (or state flow) (in portuguese: Cartas de estado (ou fluxo de estados)) There are other techniques for modelling and code generation, such as: Grafcets UML (with or without real time extensions) 20-Apr-14 Sistemas de tempo real - Helder Daniel 66

67 State flow modelling I This methodology was introduced by D. Harel A state chart consists of: states events Finite state machines (FSM) or just state machines Statechart = FSM + depth + orthogonality + communication 20-Apr-14 Sistemas de tempo real - Helder Daniel 67

68 State flow modelling II Statechart = FSM + depth + orthogonallty + communication 1) FSM is represented by state transition diagrams 2) depth allows decomposition of states in sub-states 3) Orthogonality allows to represent independent (concurrent) systems (or tasks), ie. AND states 4) Communication allows orthogonal states (or tasks) to respond to shared events 20-Apr-14 Sistemas de tempo real - Helder Daniel 68

69 State charts I State charts combine: Data Flow Diagrams (diagramas de fluxo de dados) State transition diagrams These charts are considered excellent to represent real time systems since: Time can be expressed Concurrency can be expressed modularity is preserved 20-Apr-14 Sistemas de tempo real - Helder Daniel 69

70 State charts II primeiro A state chart may include: States (XOR): boxes with rounded corners Concurrent states or orthogonal states (AND): dashed boxes or boxes separated by dashed lines A C y[p] b d b B a State transitions (arrows) depth is expressed decomposing high-level states Printed 20-May :54:54 20-Apr-14 Sistemas de tempo real - Helder Daniel 70

71 State charts III Actions can be associated to states or transitions primeiro Transitions can occur upon an event or a condition A transition may also occurs depending on an event and a condition In the example: 1) Upon event b if system is in state A or C it flow to state B A C y[p] b d b B a 2) if system in state B upon event a it flows to state A and upon event d it flows to state C 3) if system is in state A upon event y and only if condition P is TRUE it flows to state C Sistemas de tempo real - Helder Daniel 71 Printed 20-May :54:54

72 State decomposition Ia In previous chart, event b makes system change from states A or C to state B This behaviour can be grouped in a super state D primeiro A b a y[p] b B C d 20-Apr-14 72

73 State decomposition Ib In previous chart, event b makes system change from states A or C to state B This behaviour can be grouped in a super state D State D semantics is XOR (exclusive OR) which means that if system is in superstate D it is only in one of its sub states A or C (never in both) primeiro D A A b a a B y[p] b B y[p] b C d C d 20-Apr-14 73

74 State decomposition Ic In previous chart, event b makes system change from states A or C to state B This behaviour can be grouped in a super state D State D semantics is XOR (exclusive OR) which means that if system is in superstate D it is only in one of its sub states A or C (never in both) Inside a superstate a default transition is used to set initial state primeiro D A A b a a B y[p] b B y[p] b C d C d 20-Apr-14 74

75 State decomposition II In this example superstate J is decomposed in 3 orthogonal (AND) states A, B and C Each of these 3 states are decomposed in two XOR states When system enters in state J, enters simultaneously in states A, B and C Inside these states it enters the XOR state with the default transition: H, G, D 20-Apr-14 Sistemas de tempo real - Helder Daniel 75

76 State decomposition III If event h occurs there are 3 simultaneous state transitions: H -> I G -> F D -> E 20-Apr-14 Sistemas de tempo real - Helder Daniel 76

77 State decomposition IV In a transition an event can be generated (so an event can generate another event) The chart below models a chain reaction: event e triggers event f and event f triggers event g 20-Apr-14 Sistemas de tempo real - Helder Daniel 77

78 Matlab stateflow toolbox I Matlab includes a toolbox to model and simulate with state charts State charts can interact with simulink diagrams and matlab workspace Events and data can be generated by simulink blocks data to a state chart can be imported form workspace variables This toolbox allows the simulation and debugging of a state chart: step by step with some delay Also it is possible to generate C (or ADA) code from a state chart to some target like s-functions or even for the Real Time Workshop 20-Apr-14 Sistemas de tempo real - Helder Daniel 78

79 Matlab stateflow toolbox II This diagram shows how stateflow toolbox is integrated with other Matlab components: Stateflow diagrams can exchange data with Matlab and Simulink Stateflow coder can generate source code (C or ADA) from the stateflow diagram Code can be executed with the Real Time Workshop (RTW) 20-Apr-14 Sistemas de tempo real - Helder Daniel 79

80 Matlab stateflow toolbox III To use a state chart in a simulink model a state flow block must be inserted A state flow diagram is the direct representation of a chart with: states junctions transitions data events The state machine has also an associated target to generate code 20-Apr-14 Sistemas de tempo real - Helder Daniel 80

81 Matlab stateflow toolbox IV State flow diagram example: 20-Apr-14 Sistemas de tempo real - Helder Daniel 81

82 Matlab stateflow: states I Every state has a father (or superstate), except the root state (in the previous diagram state A is the root state) States can have a tag to specify actions and when to execute them: eg: when entering the state when leaving the state States can have an history junction (With this junction future activity can take in account past activity) The state properties editor: 20-Apr-14 Sistemas de tempo real - Helder Daniel 82

83 Matlab stateflow: states II Set breakpoints for debugger Display 0 Discrete Pulse Generator A1 Scope 20-Apr-14 Chart Sistemas de tempo real - Helder Daniel 83

84 Label Matlab stateflow: states III Description URL Display 0 Discrete Pulse Generator A1 Scope 20-Apr-14 Chart Sistemas de tempo real - Helder Daniel 84

85 Matlab stateflow: states IV Output state activity to simulink: 0 if non active (off) 1 if active (on) One output port appear in the chart block It can be connected to a scope 0 Display Discrete Pulse Generator A1 Scope 20-Apr-14 Chart Sistemas de tempo real - Helder Daniel 85

86 Matlab stateflow: state transition An arrow that connects two states The label (y) indicates the event that triggers the condition An additional condition for the transition to occur can be expressed between [] 20-Apr-14 Sistemas de tempo real - Helder Daniel 86

87 Matlab stateflow: conditions If event occurs and condition is TRUE the system transits A transition may only depended of: an event or a condition 20-Apr-14 Sistemas de tempo real - Helder Daniel 87

88 Matlab stateflow: default transition Solve ambiguities in XOR state decomposition An arrow from nowhere points the initial state Default transitions can also point a junction, ie. a decision point (each branch depending on a condition) 20-Apr-14 Sistemas de tempo real - Helder Daniel 88

89 Matlab stateflow: events I Events are NOT graphical objects Events can trigger transitions Events can be triggered by signal rising edge or falling edge Events are applied from top level diagrams down to lower levels Events can be defined from stateflow explorer menu: add Events can be: Local to stateflow diagram External (from / to simulink) (may be provided by a pulse generated) 20-Apr-14 Sistemas de tempo real - Helder Daniel 89

90 Matlab stateflow: events II 20-Apr-14 Sistemas de tempo real - Helder Daniel 90

91 Matlab stateflow: data I Data are also NOT graphical objects Matlab data types can be used Places to store data can also be defined from stateflow explorer menu: add Variable scope can be: Local to stateflow diagram External (from / to simulink) Defined in Matlab workspace Temporary Constant 20-Apr-14 Sistemas de tempo real - Helder Daniel 91

92 Matlab stateflow: data II 20-Apr-14 Sistemas de tempo real - Helder Daniel 92

93 Matlab stateflow: events and data Input event (step 0/1) Output data (to scopes) Output event Input data (sine waves) 20-Apr-14 Sistemas de tempo real - Helder Daniel 93

94 Matlab stateflow: History junction I History junctions are represented by an H inside a circle: If a super state with XOR decomposition have one of this junctions when revisited transition for XOR sub-state is made for the most recently visited History junction have priority over the default transition Suppose an automatic gearbox with two top level states Neutral and engaged: 20-Apr-14 Sistemas de tempo real - Helder Daniel 94

95 Matlab stateflow: History junction II When state changes from Neutral to Engaged If a default transition exists The XOR substate system enters is the one pointed by the default transition: first 20-Apr-14 Sistemas de tempo real - Helder Daniel 95

96 Matlab stateflow: History junction III When state changes from Neutral to Engaged If an history junction exists (even with a default transition present) enters the most recent visited substate: first or second 20-Apr-14 Sistemas de tempo real - Helder Daniel 96

97 Matlab stateflow: event sending send keyword can be used to generate an event and sent it to some state If data1 == 1 event E_one is generated and sent to state B Alternative syntax: [data == 1] / B.E_one 20-Apr-14 Sistemas de tempo real - Helder Daniel 97

98 Matlab stateflow: actions I Actions can be performed in a transition or in a state In a transition follows the general syntax: event [condition] {conditional action} / {transition action} If an event occurs and condition is TRUE the system transits - Conditional action is executed if condition is TRUE - Transition action light_off is executed only if transition is made: 20-Apr-14 Sistemas de tempo real - Helder Daniel 98

99 Matlab stateflow: actions II States can have a tag to specify an action and when to execute it: entry: execute action when entering the state (last slide transition action could be in the entry of state Power_off) Power_off entry: light_off of the state during: execute action in each simulation step when system remains in this same state again exit: execute action when leaving the state on <event>: execute action when in this state and event (switch_off) occurs 20-Apr-14 Sistemas de tempo real - Helder Daniel 99

100 Matlab stateflow: Connective junctions I These junctions can represent decision points Example below uses these junction to implement an if else structure: 20-Apr-14 Sistemas de tempo real - Helder Daniel 100

101 Matlab stateflow: Connective junctions II Connective junctions can be used to create self loops: One way to execute an action without state change Both figures below are equivalent: When event e occurs and condition c1 is FALSE a2 action is executed 20-Apr-14 Sistemas de tempo real - Helder Daniel 101

102 Matlab stateflow: Connective junctions III Connective junctions can be used to implement loops Below an example of a FOR loop: - When event E occurs loop counter variable is initialized with i=0 - While i < 0 func1() is executed (10 times) - When i == 10 system changes to state B 20-Apr-14 Sistemas de tempo real - Helder Daniel 102

103 Matlab stateflow: Graphical functions I Allows code reutilization Let s considere this twin system For both entries the sign of the variable is measured If < 0 then a 0 is presented in the corresponding display If >=0 then a 1 is presented 20-Apr-14 Sistemas de tempo real - Helder Daniel 103

104 Matlab stateflow: Graphical functions II The chart requires only one state When entering the state (which happens at system start since is the only one) function sign() is called to compute variables OUT0 and OUT1 form the inputs IN0 and IN1 Function sign is a graphical function It has a decision point if its argument x < 0 returns 0 else (x>=0) returns 1 20-Apr-14 Sistemas de tempo real - Helder Daniel 104

105 Stateflow example: Integer adder I The following example shows how to express through a statechart the sum of two positive integers X and Y: X and Y are variables from simulink Result is sent to simulink in variables Xo and Yo All variables are int32 Only operations available are increment(++) and decrement (--) No events are required 9 0 X X Xo X Y Yo 9 Chart 18 Y The system can end in two final states: Operation successful: Xo = 0 and Yo = Y + X Error if X<0 or Y<0 Xo=Yo=-1 20-Apr-14 Sistemas de tempo real - Helder Daniel 105 Y

106 Stateflow example: Integer adder II The state chart: Xo = X and Yo = Y if and only if X and Y >=0 else system enters state Erro The operation is performed incrementing Yo as many times as the value of Xo in a connective junction When operation finished (X0==0) system enters state OK 20-Apr-14 Sistemas de tempo real - Helder Daniel 106

107 Stateflow example: Integer adder III An alternate statechart: Xo = X and Yo = Y if and only if X and Y >=0 else system enters state Erro The operation is performed incrementing Yo as many times as the value of Xo in a self loop around state OK The self loop executes while Xo > 0 (condition is TRUE) We could also increment Yo and decrement Xo at the entry of state OK Sistemas de tempo real - Helder Daniel 107

108 Stateflow example: Integer adder IV It is also possible to model in a state chart the increment and decrement operation to run concurrently (as modelled by the Petri Net at the right) 20-Apr-14 Sistemas de tempo real - Helder Daniel 108

109 Stateflow example: Vending Machine FSM I The vending machine implemented with a PIC uc can be modelled with state flow. The connection with a PIC uc were: reset Product fifty (RA0) open (RB0) release mechanism Coin id mechanism hundred (RA1) clock FSM (Pic) change (RB1) change release mechanism The connection with a Simulink model are: fifty, hundred and reset are events triggered when input is high. Open and change are output variables, when high product or change drawer opens. 20-Apr-14 Sistemas de tempo real - Helder Daniel 109

110 Stateflow example: Vending Machine FSM II The FSM is modelled by a state chart (very similar to the FSM diagram). 20-Apr-14 Sistemas de tempo real - Helder Daniel 110