# An Effective Teaching Method for Problem Solving in Engineering

Save this PDF as:

Size: px
Start display at page:

Download "An Effective Teaching Method for Problem Solving in Engineering"

## Transcription

1 An Effective Teaching Method for Problem Solving in Engineering Hamid Shokrollah Timorabadi Department of Electrical and Computer Engineering, University of Toronto 10 King s College Road, Toronto, ON M5S 3G4, Canada Abstract This paper presents a tandem method for teaching procedural problem solving concepts to students. This method improves the quality of students learning by allowing instructors to apply and relate course concepts to solving problems. An example of a procedural approach in problem solving is the design of sequential circuits in the Digital Systems course taught to engineering students where a procedural algorithm consisting of many steps is introduced. Typically the teaching process includes solving a numerical example. Traditionally, the example is taught after the procedural algorithm is described. By this time, students have already become distant from the steps explained for the procedure and their rational. Thus, it is difficult to show the importance of each step in the procedure while describing it. It is also hard to relate the example to the procedure when the example is being solved. As a result, students become bored and inattentive during the lecture and cannot follow the relation between the procedure and the example. An alternative is to introduce the example side by side, in tandem, with the procedure. Along with the start of the procedure, an example is also introduced. Then, as each step of the procedure is being discussed, the corresponding step is applied to the example. The tandem method is more effective since it facilitates (a) the explanation of the procedure and (b) the students realization of the conceptual topics and therefore saves time. Two procedural algorithms are considered. The first one is from a Linear Algebra course explaining a procedure for solving first order differential equations and the second is from a Digital Systems course that provides steps in designing Sequential circuits. I. Introduction In teaching students, a variety of ways can be explored to draw the students attention. Typically students learn by means of visualization, hearing, intuition, rationalization, memorization, and drawing analogies in understanding abstract mathematical subjects [1]. There are many different teaching methods such as using the old school blackboard and chalk or using PowerPoint. In addition, some instructors attempt to demonstrate and discuss some of the concepts in the course, while others place an emphasis on rote learning [2]. In all of these cases, the amount that the students learn depends upon factors such as the students prior preparation and/or learning style abilities [3]. More importantly, it relies on how effectively the instructor can present the material

2 such that students learn most of the new concepts during the lecture. Therefore, the way instructor organizes the material and presents them to the class becomes paramount. A wellorganized and well-presented lecture can effectively improve a deep realization of the concepts for students. Instructors often have to teach a procedure for solving problems. In particular, engineering instructors have to teach and provide students with steps on how to solve engineering problems. These kinds of problems are structured in a manner that students can easily follow a few steps and apply their own creativity to solve the problems. Frequently, instructors teach these procedural problems in such a way that first they introduce the steps by explaining them one after the other and then follow thereafter with an example. As a result the connection between the procedure and the example can be easily lost in the process. Furthermore, the procedure itself appears to be very abstract to the students at the time the procedure is introduced. Therefore, students become more distant from the material, bored, and inattentive during the lecture. In turn, this can create a chain reaction and as a result students may perform poorly on exams and, more importantly, lose their enthusiasm for the subject. In addition, the nature of these problems is often based on mathematical concepts and thus increasing realization of concepts which may develop I hate math attitude. In some cases, students may start talking among themselves and this in turn can have an additional negative impact on the learning process. Over the past few years of teaching at the Electrical and Computer Engineering, and Computer Science Departments of the University of Toronto, I have come across topics involving procedural problem solving and have noticed that the aforementioned problem can be alleviated, for the most part, by introducing the procedure along with an example. This is a tandem process that introduces the example and associates some numerical values to the abstract concepts along with the procedure. This paper explains this method of teaching. Moreover, it is demonstrated that this method improves the learning process for students. Sections II and III describe two procedural methods where an example is introduced in tandem with each method. Section IV presents cases where the proposed tandem method does not prove to be beneficial. Other courses that can benefit from the tandem method are listed in Section V. Finally, Section VI presents the concluding remarks. II. Procedural Example One: Sequential Circuits This example considers the design of sequential circuits that involves a set of steps. These steps, when followed, results in a digital logic circuit known as a sequential circuit. Sequential circuits are an integral element in most courses dealing with digital logic concepts. At the University of Toronto, sequential circuits are taught in courses such as: - Digital Systems (ECE241) in the Electrical and Computer Engineering Department, and - Computer Organization (CSC258) in the Computer Science Department. This section begins with a description of the terminology used followed by a design of sequential circuits in parallel with a design example. The design example introduces a procedure that points out the steps involved in the design.

3 A. Terminology The definitions of some of the technical terms referred to in the following parallel example are provided in this section. Gate: Block of electronics hardware that takes one or more logic inputs and produces one logic output. Flip-Flop: is a logic cell that can store one bit of logic information. K-Map or Karnaugh-Map: provides a map or table that facilitates the minimization of the number of terms needed to express a function algebraically. Combinational Circuit: is a circuit where the binary value of an output is a function of the binary value(s) at the inputs. Typically, the combinational circuit is built from a combination of different logic gates. For instance, in Figure 1, AND and OR gates are combined to make the outputs S and C that depend on the input binary values of a and b [4]. B. Sequential Circuits Inputs a b Figure 1: An example of a combinational circuit known as a half-adder. The sequential circuits are logic circuits where the output binary values are determined by the previous state(s) of the system that is the binary values at the output of the flip-flop(s) in addition to any binary values at the input(s). In fact, output states are fed back into the circuits in addition to the circuit inputs. Figure 2 illustrates a block diagram representation of a sequential circuit [4]. S C Outputs Input Combinational Circuit (Gates) Clock Reset Output Memory Element (Flip-Flops) C. Procedural Design Steps Figure 2: A block diagram representation of a sequential circuit. This section details the steps involved in designing a sequential circuit. An example is also worked out along side the procedure. This is best performed if two blackboards placed side by side are employed. After introducing one step from the procedure on one blackboard, the instructor can move to the other blackboard and illustrate that step with an example. The following two column table in Table 1 represents two blackboards side by side where after reading the left hand side column on blackboard one, the reader should follow through on the right hand side blackboard with the example.

4 Blackboard 1: Procedure Step 1 Provide a formulation of the design criteria. Step 2 Illustrate the design criteria from the previous step in a diagram referred to as a state diagram. Then the number of the flip-flops required for this design is equal to the number of circles in the state diagram. Identify each circle with a binary number and write it inside the circle. Flip-flops are required since they keep track of this number. Remark: It is much easier and makes more sense to explain this step while solving the problem and pointing to the circles while writing down the binary values in the diagram. Otherwise, how can this step make sense and not be lost among all other steps. Step 3 Assign variable names, i.e. letters and develop a table that records all the possible binary values that the variables can take. Then identify what the desired next state (NS) is going to be. This is performed by following the directions of the arrows in the state diagram. The previous state (PS) is the binary number shown inside a circle while the next state is the circle pointed to by an arrow from the existing state. Remark: Similar to the previous step, Step 3 could also be easily demonstrated if presented side by side with the example by jumping back and forth to the example while introducing each sub-step. Step 4 Select a certain type of flip-flop (the different types are: RS, JK, D) Then build and populate a table denoted as an excitation table based on the values from the previous states and next states. The excitation table is typically organized as part of a state table. Remark: This step is part of a state diagram. This step becomes confusing to explain if combined with step 3 since it makes step 3 very Blackboard 2: Example This example considers the design of an upcounter that continuously loops through the sequence of numbers 0 to 3, i.e. 0, 1, 2, 3, 0 PS NS Excitation Table A B A B S A R A S B R B X X This part is filled during Step Choosing SR flip-flop and accordingly filling up the Excitation Table in here.

5 lengthy. In contrast, if it is presented as a separate step then it is difficult to connect it to the state table. On the other hand, if it is described as two separate steps and in parallel with an example then it is easy to convey the idea behind the steps. Step 5 Develop algebraic equations and if necessary draw k-map to simplify the equations. Step 6 Draw the gate level circuit. S A = A B R A = A B S B = B R B = B Clk R A Q A S Q Clk R B Q B S Q Table 1: Illustration of a procedure for designing a sequential circuit in tandem with an example placed side by side on two separate blackboards. III. Procedural Example Two: Solving Differential Equations In this section, a parallel process for solving first order linear differential equations that is taught in Linear Algebra course is considered. Initially, differential equations are defined and then a procedural solution method based on the proposed tandem method is presented. A. Differential Equation Many laws of science involve energy storage components and can be formulated in terms of differential equations [5]. A differential equation has a solution whenever a deterministic relationship between some quantities and their rates of change is known. Therefore, a differential equation is a relationship between an independent variable (e.g. time) and a dependent variable (e.g. temperature) and another term that shows the rate of change of a dependent variable with respect to an independent variable (e.g. change of temperature with respect to time) are present. An example of a differential equation is shown below: dy + y t 2. (1)

6 B. First Order Linear Differential Equations This is an important form of differential equation since it is present in nature and physics and can be solved using a conventional approach [5]. This differential equation is in the form of: dy + Pt ()y Qt (). (2) A step by step procedure is presented in this section in parallel with an example. During the actual presentation of this procedure to the class, the procedure will be on one blackboard, i.e. on the left hand side while the example is described on another blackboard, i.e. on the right hand side. Consider solving the initial value problem where y(1) = -1 and the differential equation is given as: dy 1 + t t. (3) Blackboard 1: Procedure Step 1 Calculate an integrating factor that is in the form of: e (4) and then drop the constant of the integration. Step 2 Multiply the given differential equation which is in the form of (2) by the integrating factor obtained in (4). This results in the following equation. dy e + Pt () y e Qt ()e Step 3 Recognize that the left hand side in (6) is the derivative of the product of an integrating factor and y (this is the chain rule), and hence, d t e d y Qt ()e. (8) (6) Blackboard 2: Example Solution: Step 1: Find integrating factor: e e 1 t e ln() t + c t (5) where the constant of integration, c, has been dropped resulting in only t. Step 2: Multiply (3) by t. This results in: t dy t + y t 2 t. (7) Step 3: Recognize that left hand side is the derivative of t.y as follows: d ty t 2. (9)

7 Step 4 Integrate both sides in (8) with respect to t. This results in: ye t Qt ()e. (10) Step 5 Solve the result of (10) for the final value of y(t) with any initial value specified. Integrate (9) with respect to t, hence, and ty d ty 1 3 t3 + C Solving (12) for y(t) gives: 1 C 3 t2 t 2, (11). (12) yt () + t (13) and considering the initial value given by y(1) = -1 results in particular solution of: yt () 1 3 t2 4 t. (14) Table 2: Depicts a procedural solution to linear first order differential equation along with an example placed side by side on two separate blackboards. IV. Remarks The tandem method can be very effective in teaching procedural problem solving. Nevertheless, in some cases where there are few steps in the procedure and where the example has many steps due to its mechanics then the tandem method might not be very useful. This occurs since the lengthy nature of some examples causes a loss of connection with the procedure. Therefore, the tandem method loses its effectiveness. In cases where the procedure tends to be short and consists of only few steps, it is better to introduce the procedure first and then follow this with and example. In general, if the procedure is about 3 steps then provide the procedure first and then the example or vise versa. V. Application to Other Subjects There are many subjects taught at universities where the proposed method may be useful. This section provides the names of courses followed by the potential topics covered in these courses where the tandem method can be applied. These examples are as follows: - In the subject of Linear Algebra: o Gaussian Elimination. o Guass-Jordan Elimination. o Solving First Order Linear Equations. - In the subject of Electric and Magnetic Fields: o Magnetic Circuits. - Circuit Theory

8 VI. Conclusions o Thevenin and Norton Equivalent Circuits. o Superposition Concept. A tandem method for presenting the course material to engineering students is demonstrated. This tandem method facilitates the explanation of procedural problem solving topics. The details of two examples are described; one for a procedure in solving sequential circuits and the other for solving linear first order differential equations. Both cases demonstrate that the introduction of an example in parallel with the procedure can be used as an effective teaching tool. References [1] Lawrence, G., People Types and Tiger Stripes: A Practical Guide to Learning Styles, Second Edition, Center for Applications of Psychological Type, Gainesville, Fla., [2] Felder, R.M., and Silverman, L.K., Learning and Teaching Styles In Engineering Education, Proceedings of the 2004 ASEE Annual Conference, [3] Dunn, R., DeBello, T., Brennan, P., Krimsky, J., and Murrain, P., Learning Style Researchers Define Differences Differently, Educational Leadership, Feb [4] Brown, S., and Vranesic, Z., Fundamental of Digital Logic with VHDL Design, McGraw Hill, New York, [5] Edwards, C.H., and Penney, D.E., Differential Equations & Linear Algebra, 2 nd Edition, Upper Saddle River, NJ: Prentice Hall, Biographical Information HAMID SHOKROLLAH TIMORABADI, P. Eng. Hamid received his B.Sc, M.A.Sc, and Ph.D. degrees in Electrical Engineering from the University of Toronto in 1996, 1998, and 2005 respectively. He worked as a project, design, and test engineer as well as a consultant to industry. His research interests include the application of digital signal processing in power systems.

### Latches, the D Flip-Flop & Counter Design. ECE 152A Winter 2012

Latches, the D Flip-Flop & Counter Design ECE 52A Winter 22 Reading Assignment Brown and Vranesic 7 Flip-Flops, Registers, Counters and a Simple Processor 7. Basic Latch 7.2 Gated SR Latch 7.2. Gated SR

### DESIGN AND ANALYSIS USING JK AND T FLIP-FLOPS

Supplement to Logic and Computer Design Fundamentals 4th Edition DESIGN ND NLYSIS USING JK ND T FLIP-FLOPS Selected topics not covered in the fourth edition of Logic and Computer Design Fundamentals are

### Synchronous Sequential Circuit Review

Synchronous Sequential Circuit Review Steps 2 4/3/29 Page 3 Derivation of JK Excitation Table JK Characteristic Table JK Excitation Table J K Q Q+ Q+ Q J K 4/3/29 Page 4 Flip-Flop Excitation Tables Q+

### V. Sequential network design State-machine structure (Mealy) output depends on state and input. typically edge-triggered D flip-flops

V. Sequential network design State-machine structure (Mealy) output depends on state and input typically edge-triggered D flip-flops V. Sequential network design State-machine structure (Moore) output

### EE 110 Practice Problems for Final Exam: Solutions

EE 1 Practice Problems for Final Exam: Solutions 1. Finite State Machines: Sequence Recognizer You want to build a finite state machine that will recognize the sequence x = and output the sequence z =

### Mealy and Moore Type Finite State Machines

Mealy and Moore Type Finite State Machines Objectives There are two basic ways to design clocked sequential circuits. These are using: 1. Mealy Machine, which we have seen so far. 2. Moore Machine. The

### Sequential Logic Design Principles.Clocked Synchronous State-Machine Analysis and Synthesis

Sequential Logic Design Principles.Clocked Synchronous State-Machine Analysis and Synthesis Doru Todinca Department of Computers Politehnica University of Timisoara Outline Clocked Synchronous State-Machine

### Counters In this lesson, the operation and design of Synchronous Binary Counters will be studied.

Counters In this lesson, the operation and design of Synchronous Binary Counters will be studied. Synchronous Binary Counters (SBC) Description and Operation In its simplest form, a synchronous binary

### Flip-Flops and Sequential Circuit Design. ECE 152A Winter 2012

Flip-Flops and Sequential Circuit Design ECE 52 Winter 22 Reading ssignment Brown and Vranesic 7 Flip-Flops, Registers, Counters and a Simple Processor 7.5 T Flip-Flop 7.5. Configurable Flip-Flops 7.6

### Flip-Flops and Sequential Circuit Design

Flip-Flops and Sequential Circuit Design ECE 52 Winter 22 Reading ssignment Brown and Vranesic 7 Flip-Flops, Registers, Counters and a Simple Processor 7.5 T Flip-Flop 7.5. Configurable Flip-Flops 7.6

### Combinational and Sequential Circuits.

Combinational and Sequential Circuits. Basically, sequential circuits have memory and combinational circuits do not. Here is a basic depiction of a sequential circuit. All sequential circuits contain combinational

### Lecture 8: Flip-flops

Points Addressed in this Lecture Properties of synchronous and asynchronous sequential circuits Overview of flip-flops and latches Lecture 8: Flip-flops Professor Peter Cheung Department of EEE, Imperial

### Lecture 8: Synchronous Digital Systems

Lecture 8: Synchronous Digital Systems The distinguishing feature of a synchronous digital system is that the circuit only changes in response to a system clock. For example, consider the edge triggered

### CS 226: Digital Logic Design

CS 226: Digital Logic Design 0 1 1 I S 0 1 0 S Department of Computer Science and Engineering, Indian Institute of Technology Bombay. 1 of 44 Objectives In this lecture we will introduce: 1. Synchronous

### Module-3 SEQUENTIAL LOGIC CIRCUITS

Module-3 SEQUENTIAL LOGIC CIRCUITS Till now we studied the logic circuits whose outputs at any instant of time depend only on the input signals present at that time are known as combinational circuits.

### Digital Logic Design Sequential circuits

Digital Logic Design Sequential circuits Dr. Eng. Ahmed H. Madian E-mail: ahmed.madian@guc.edu.eg Dr. Eng. Rania.Swief E-mail: rania.swief@guc.edu.eg Dr. Eng. Ahmed H. Madian Registers An n-bit register

### Analysis of Clocked (Synchronous) Sequential Circuits

Analysis of Clocked (Synchronous) Sequential Circuits Now that we have flip-flops and the concept of memory in our circuit, we might want to determine what a circuit is doing. The behavior of a clocked

### Overview. Ripple Counter Synchronous Binary Counters

Counters Overview Ripple Counter Synchronous Binary Counters Design with D Flip-Flops Design with J-K Flip-Flops Serial Vs. Parallel Counters Up-down Binary Counter Binary Counter with Parallel Load BCD

### Lecture 9: Flip-flops

Points Addressed in this Lecture Properties of synchronous and asynchronous sequential circuits Overview of flip-flops and latches Lecture 9: Flip-flops Professor Peter Cheung Department of EEE, Imperial

### ECE 331 Digital System Design

ECE 331 Digital System Design State Reduction and Derivation Flip-Flop Input Equations (Lecture #23) The slides included herein were taken from the materials accompanying Fundamentals of Logic Design,

### Final Exam review: chapter 4 and 5. Supplement 3 and 4

Final Exam review: chapter 4 and 5. Supplement 3 and 4 1. A new type of synchronous flip-flop has the following characteristic table. Find the corresponding excitation table with don t cares used as much

### MODULE 11- DESIGN OF SYNCHRONOUS SEQUENTIAL COUNTERS AND STATE MACHINES

Introduction to Digital Electronics Module 11: Design of Sequential Counters and State Machines 1 MODULE 11- DESIGN OF SYNCHRONOUS SEQUENTIAL COUNTERS AND STATE MACHINES OVERVIEW: A synchronous sequential

### Lecture 11. Registers and Counters

Logic Design Lecture 11. Registers and Counters Prof. Hyung Chul Park & Seung Eun Lee 12.1 Registers and Register Transfers Register- a collection of binary storage elements In theory, a register is sequential

### ECE 223 Digital Circuits and Systems. Synchronous Logic. M. Sachdev. Dept. of Electrical & Computer Engineering University of Waterloo

ECE 223 Digital Circuits and Systems Synchronous Logic M. Sachdev Dept. of Electrical & Computer Engineering University of Waterloo Sequential Circuits Combinational circuits Output = f (present inputs)

### Experiment # 8 Latches And Flip Flops Characteristics

Digital Design LAB Islamic University Gaza Engineering Faculty Department of Computer Engineering Fall 2012 ECOM 2112: Digital Design LAB Eng: Ahmed M. Ayash Experiment # 8 Latches And Flip Flops Characteristics

### Sequential Circuits Sequential circuits combinational circuits clocked sequential circuits gate delay

Sequential Circuits Sequential circuits are those with memory, also called feedback. In this, they differ from combinational circuits, which have no memory. The stable output of a combinational circuit

### Combinational circuit Memory elements. Fig. 5-1 Block Diagram of Sequential Circuit Prentice Hall, Inc. M. Morris Mano DIGITAL DESIGN, 3e.

Inputs ombinational circuit Memory elements Outputs Fig. 5- Block Diagram of Sequential ircuit 22 Prentice Hall, Inc. Inputs ombinational circuit Outputs Flip-flops lock pulses (a) Block diagram (b) Timing

### Outline. Sequential Logic Design. Models of Sequential Circuits. Why sequential circuits?

Outline Sequential Logic esign ES-- Lecture 3 C Why sequential circuits? Models of sequential circuits Sequential circuit analysis Sequential circuit design 2 Why sequential circuits? Sequential circuits

### Chapter 12. Algorithmic State Machine

Chapter 12 Algorithmic State Machine 12.0 Introduction In Chapter 10, we introduced two models of synchronous sequential network, which are Mealy and Moore machines. In this chapter, we would like to introduce

### Section CS or IT (circle one)

Sirindhorn International Institute of Technology Thammasat University at Rangsit School of Information, Computer and Communication Technology ECS37: Practice Problems for the Final Examination COURSE :

### 1. Realization of gates using Universal gates

1. Realization of gates using Universal gates Aim: To realize all logic gates using NAND and NOR gates. Apparatus: S. No Description of Item Quantity 1. IC 7400 01 2. IC 7402 01 3. Digital Trainer Kit

### LECTURE #16: Moore & Mealy Machines EEL 3701: Digital Logic and Computer Systems Based on lecture notes by Dr. Eric M. Schwartz

LECTURE #16: Moore & Mealy Machines EEL 3701: igital Logic and Computer Systems Based on lecture notes by r. Eric M. Schwartz Sequential esign Review: - A binary number can represent 2 n states, where

### Engr354: Digital Logic Circuits

Engr354: igital Circuits Chapter 7 Sequential Elements r. Curtis Nelson Sequential Elements In this chapter you will learn about: circuits that can store information; Basic cells, latches, and flip-flops;

### ECE 331 Digital System Design

ECE 331 Digital System Design Introduction to and Analysis of Sequential Logic Circuits (Lecture #21) The slides included herein were taken from the materials accompanying Fundamentals of Logic Design,

### Basic Bit Memory: Latches and Flip Flops

Basic Bit Memory: Latches and Flip Flops Topics: 1. General description of bit memory, also called a memory cell. 2. Definition of sequential and combinational circuits. Memory devices are sequential devices.

### Sequential Circuits. Chapter 4 S. Dandamudi

Sequential Circuits Chapter 4 S. Dandamudi Outline Introduction Clock signal Propagation delay Latches SR latch Clocked SR latch D latch JK latch Flip flops D flip flop JK flip flop Example chips Example

### CHAPTER 13 ANALYSIS OF CLOCKED SEQUENTIAL CIRCUITS

CHAPTER 13 ANALYSIS OF CLOCKED SEQUENTIAL CIRCUITS This chapter in the book includes: Objectives Study Guide 13.1 A Sequential Parity Checker 13.2 Analysis by Signal Tracing and Timing Charts 13.3 State

### The University of Michigan Department of Electrical Engineering and Computer Science. EECS 270 Fall Exam #2 Solutions.

The University of Michigan Department of Electrical Engineering and Computer Science EECS 270 Fall 2003 Exam #2 Solutions Name: UM ID: For all questions, show all work that lead to your answer. Problem

### D Flip-Flop Example (continued)

D Flip-Flop Example Design a sequential circuit with one D flip-flop, two inputs and, and external gates. The circuit operation is specified by the following table: 0 0 1 1 0 1 0 1 Operation Q (next clock

### 4.0 Design of Synchronous Counters

4.0 Design of Synchronous Counters This section begins our study of designing an important class of clocked sequential logic circuits-synchronous finite-state machines. Like all sequential circuits, a

### Basic bistable element. Chapter 6. Latches vs. flip-flops. Flip-flops

Basic bistable element hapter 6 It is a circuit having two stable conditions (states). It can be used to store binary symbols. Flip-Flops and Simple Flip-Flop Applications.. Huang, 24 igital Logic esign

### (Refer Slide Time: 2:14)

(Refer Slide Time: 2:14) Digital Circuits and Systems Prof. S. Srinivasan Professor Department of Electrical Engineering Indian Institute of Technology, Madras Lecture # 24 Design of Synchronous Sequential

### Digital Design, Kyung Hee Univ. Spring, Chapter 5. Synchronous Sequential Logic

Chapter 5. Synchronous Sequential Logic 1 5.1 Introduction Electronic products: ability to send, receive, store, retrieve, and process information in binary format Dependence on past values of inputs Sequential

### 1. A Sequential Parity Checker

Chapter 13: Analysis of Clocked Sequential Circuits 1. A Sequential Parity Checker When binary data is transmitted or stored, an extra bit (called a parity bit) is frequently added for purposes of error

### Sequential Circuits: Latches & Flip-Flops

ESD I Lecture 3.b Sequential Circuits: Latches & Flip-Flops 1 Outline Memory elements Latch SR latch D latch Flip-Flop SR flip-flop D flip-flop JK flip-flop T flip-flop 2 Introduction A sequential circuit

### Sequential Logic. (Materials taken from: Principles of Computer Hardware by Alan Clements )

Sequential Logic (Materials taken from: Principles of Computer Hardware by Alan Clements ) Sequential vs. Combinational Circuits Combinatorial circuits: their outputs are computed entirely from their present

### Digital Logic Design CSE-241

Digital Logic Design CSE-241 Unit 20 3-Bit Synchronous Binary Counter: 2 1 4-Bit Synchronous Binary Counter: 3 DOWN COUNTERS: A synchronous counter that counts in the reverse or downward sequence can be

### ET398 LAB 6. Flip-Flops in VHDL

ET398 LAB 6 Flip-Flops in VHDL Flip-Flops March 3, 2013 Tiffany Turner OBJECTIVE The objectives of this lab are for you to begin the sequential and memory programming using flip flops in VHDL program.

### Lecture 10. Latches and Flip-Flops

Logic Design Lecture. Latches and Flip-Flops Prof. Hyung Chul Park & Seung Eun Lee Sequential Logic Outputs of sequential logic depend on current inputs and prior input values Sequential logic might explicitly

### Lesson 12 Sequential Circuits: Flip-Flops

Lesson 12 Sequential Circuits: Flip-Flops 1. Overview of a Synchronous Sequential Circuit We saw from last lesson that the level sensitive latches could cause instability in a sequential system. This instability

### Design of the Sequence Detector

Design of the 11011 Sequence Detector A sequence detector accepts as input a string of bits: either 0 or 1. Its output goes to 1 when a target sequence has been detected. There are two basic types: overlap

### A Study in Learning Styles of Construction Management Students. Amit Bandyopadhyay, Ph.D., PE, F.ASCE State University of New York -FSC

A Study in Learning Styles of Construction Management Students Amit Bandyopadhyay, Ph.D., PE, F.ASCE State University of New York -FSC Abstract Students take in and process information in different ways.

### Synchronous Sequential Logic

Chapter 5 Synchronous Sequential Logic 5- Outline! Sequential Circuits! Latches! Flip-Flops! Analysis of Clocked Sequential Circuits! State Reduction and Assignment! Design Procedure 5-2 Sequential Circuits!

### Output depends on sequence of previous inputs Sequence of previous this is history History is a state that captures how you got here

Sequential Logic Output depends on sequence of previous inputs Sequence of previous this is history History is a state that captures how you got here " E.g., 35 cents vending = cents + cents + cents +

### ECE 301 Digital Electronics

ECE 301 Digital Electronics Latches and Flip-Flops (Lecture #18) The slides included herein were taken from the materials accompanying Fundamentals of Logic Design, 6 th Edition, by Roth and Kinney, and

### REGISTERS. Consists of a set of flip-flops (each flip-flop stores one bit of information)

REGISTERS Sequential circuit used to store binary word Consists of a set of flip-flops (each flip-flop stores one bit of information) External gates may be used to control the inputs of the flip-flops:

### EGR 278 Digital Logic Lab File: N278L11A Lab # 11 Sequential Circuit Design using PLDs

EGR 278 igital Logic Lab File: N278L Lab # Sequential ircuit esign using PLs. Objective The objective of this laboratory is to introduce the student to the use of sequential circuit design using Programmable

### Today. Sequential logic Latches Flip-flops Counters. Andrew H. Fagg: Embedded Real-Time Systems: Sequential Logic

Today Sequential logic Latches Flip-flops Counters Time Until now: we have essentially ignored the issue of time We have assumed that our digital logic circuits perform their computations instantaneously

### CMSC 2833 Lecture 25

.6. Basic Concepts A sequential circuit has memory whereas a combinational circuit has no memory. The output of a combinational circuit is the direct result of inputs to the circuit. A combinational circuit

### Counters. Present State Next State A B A B Henry Hexmoor 1

Counters are a specific type of sequential circuit. Like registers, the state, or the flipflop values themselves, serves as the output. The output value increases by one on each clock cycle. After the

### Steps of sequential circuit design (cont'd)

Design of Clocked Synchronous Sequential Circuits Design of a sequential circuit starts with the verbal description of the problem (scenario). Design process is similar to computer programming. First,

### Design and Development of Virtual Instrument (VI) Modules for an Introductory Digital Logic Course

Session ENG 206-6 Design and Development of Virtual Instrument (VI) Modules for an Introductory Digital Logic Course Nikunja Swain, Ph.D., PE South Carolina State University swain@scsu.edu Raghu Korrapati,

### CHAPTER 3 Boolean Algebra and Digital Logic

CHAPTER 3 Boolean Algebra and Digital Logic 3.1 Introduction 121 3.2 Boolean Algebra 122 3.2.1 Boolean Expressions 123 3.2.2 Boolean Identities 124 3.2.3 Simplification of Boolean Expressions 126 3.2.4

### Logic Design. Flip Flops, Registers and Counters

Logic Design Flip Flops, Registers and Counters Introduction Combinational circuits: value of each output depends only on the values of inputs Sequential Circuits: values of outputs depend on inputs and

### Lesson 14 Design of Sequential Circuits Using D Flip-Flops

Lesson 4 esign of Sequential Circuits Using Flip-Flops. esign Procedure This lesson is another example of it all coming together. In this lesson, you will learn how to design state machines out of flip-flops

### Chapter 18. Sequential Circuits: Flip-flops and Counters

Chapter 18 Sequential Circuits: Flip-flops and Counters 1. Design a counter that has the following repeated binary sequence:, 1, 2, 3, 4, 5, 6, 7. Use RS flip-flops. Fig. 1.1 State diagram of a 3-bit binary

### CHAPTER 6 DESIGN OF SEQUENTIAL LOGIC CIRCUITS IN QCA

6 CHAPTER 6 DESIGN OF SEQUENTIAL LOGIC CIRCUITS IN QCA 6. INTRODUCTION The logic circuits whose outputs at any instant of time depend not only on the present inputs but also on the past outputs are known

### Chapter 5 Bistable memory devices. Copyright The McGraw-Hill Companies, Inc. Permission required for reproduction or display.

Chapter 5 Bistable memory devices Copyright The McGraw-Hill Companies, Inc. Permission required for reproduction or display. Digital circuits Combinational Sequential Logic gates Decoders, MUXes, Adders,

### ENEE 244 (01**). Spring 2006. Homework 5. Due back in class on Friday, April 28.

ENEE 244 (01**). Spring 2006 Homework 5 Due back in class on Friday, April 28. 1. Fill up the function table (truth table) for the following latch. How is this latch related to those described in the lectures

### Lecture 10: A Design Example - Traffic Lights

Lecture 10: A Design Example - Traffic Lights In this lecture we will work through a design example from problem statement to digital circuits. The Problem The traffic department is trying out a new system

### IE1204 Digital Design L8: Memory Elements: Latches and Flip-Flops. Counter

IE1204 igital esign L8: Memory Elements: Latches and Flip-Flops. Counter Elena ubrova KTH / ICT / ES dubrova@kth.se This lecture BV pp. 383-418, 469-471 IE1204 igital esign, HT14 2 Sequential System a(t)

### In Module 9, 10, 11, you have been introduced to examples of combinational logic circuits whereby the outputs are entirely dependent on the current

Module 12 In Module 9, 10, 11, you have been introduced to examples of combinational logic circuits whereby the outputs are entirely dependent on the current inputs. The following topics will be on sequential

### Lecture 9: Flip-Flops, Registers, and Counters

Lecture 9: Flip-Flops, Registers, and Counters 1. T Flip-Flops toggles its output on a rising edge, and otherwise keeps its present state. 1.1. Since the toggle from high to low to high takes two clock

### ECE380 Digital Logic

ECE38 igital Logic Flip-Flops, Registers and Counters: Flip-Flops r.. J. Jackson Lecture 25- Flip-flops The gated latch circuits presented are level sensitive and can change states more than once during

### Introduction Number Systems and Conversion

UNIT 1 Introduction Number Systems and Conversion Objectives 1. Introduction The first part of this unit introduces the material to be studied later. In addition to getting an overview of the material

### Classification of Digital Circuits

lassification of igital ircuits ombinational. Output depends only on current input values. Sequential. Output depends on current input values and present state of the circuit, where the present state of

### Synchronous Sequential Logic. Logic and Digital System Design - CS 303 Erkay Savaş Sabanci University

Synchronous Sequential Logic Logic and Digital System Design - S 33 Erkay Savaş Sabanci University Sequential Logic Digital circuits we have learned, so far, have been combinational no memory, outputs

### EE 110 Practice Problems for Exam 2: Solutions, Fall 2008

EE 110 Practice Problems for Exam 2: Solutions, Fall 2008 1. Circle T (true) or F (false) for each of these Boolean equations. (a). T FO An 8-to-1 multiplexer requires 2 select lines. (An 8-to-1 multiplexer

### UNIVERSITI MALAYSIA PERLIS DKT DIGITAL SYSTEMS II. Lab 2 : Counter Design

UNIVERSITI MALAYSIA PERLIS DKT 212/3 : DIGITAL SYSTEM II Lab 2 : Counter Design Name : Matrix No. : Program : Date : OBJECTIVE 1. To understand state diagram in sequential circuit. 2. To build Karnaugh

### Chapter - 5 FLIP-FLOPS AND SIMPLE FLIP-FLOP APPLICATIONS

Chapter - 5 FLIP-FLOPS AND SIMPLE FLIP-FLOP APPLICATIONS Introduction : Logic circuit is divided into two types. 1. Combinational Logic Circuit 2. Sequential Logic Circuit Definition : 1. Combinational

### TUTORIAL 1: Overview of a Digital Logic

Questions 3 TUTORIAL : Overview of a Digital Logic. Fill in the terms for the definition. Term Definition i) Being continuous or having continuous values. ii) iii) iv) v) vi) A basic logic operation in

### INTRODUCTION TO HARDWARE DESIGNING SEQUENTIAL CIRCUITS.

Exercises, set 6. INTODUCTION TO HADWAE DEIGNING EUENTIAL CICUIT.. Lathes and flip-flops. In the same way that gates are basic building blocks of combinational (combinatorial) circuits, latches and flip-flops

### Figure 2.1(a) Bistable element circuit.

3.1 Bistable Element Let us look at the inverter. If you provide the inverter input with a 1, the inverter will output a 0. If you do not provide the inverter with an input (that is neither a 0 nor a 1),

### Slides for Lecture 23

Slides for Lecture 23 ENEL 353: Digital Circuits Fall 213 Term Steve Norman, PhD, PEng Electrical & Computer Engineering Schulich School of Engineering University of Calgary 1 November, 213 ENEL 353 F13

### (Refer Slide Time 6:09)

Digital Circuits and Systems Prof. S. Srinivasan Department of Electrical Engineering Indian Institute of Technology, Madras Lecture 3 Combinational Logic Basics We defined digital signal as a signal which

### ECE380 Digital Logic

ECE38 Digital Logic Flip-Flops, egisters and Counters: Latches Dr. D. J. Jackson Lecture 24- torage elements Previously, we have considered combinational circuits where the output values depend only on

### Combinational circuits: ALU

Combinational circuits: ALU ALU is a combinational circuit outputs depend only on inputs operations performed AND OR ADD SUB SLT Zero (a == b) This is an ARITHMETIC/logic unit (Fig. 4.21) What about multiplication?

### Mealy and Moore Machines. ECE 152A Winter 2012

Mealy and Moore Machines ECE 52A Winter 202 Reading Assignment Brown and Vranesic 8 Synchronous Sequential Circuits 8.3 Mealy State Model February 22, 202 ECE 52A - Digital Design Principles 2 Reading

### Edge-Triggered D-type Flip-flop

Edge-Triggered D-type Flip-flop The transparent D-type flip-flop is written during the period of time that the write control is active. However there is a demand in many circuits for a storage device (flip-flop

### Counters. Non-synchronous (asynchronous) counters A 2-bit asynchronous binary counter High

Counters Learning objectives Understanding the operation and characteristics of asynchronous and synchronous counters Analyze counter circuits and counter timing diagrams Determine the sequence of a counter

### Karnaugh Maps. Example A B C X 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 1 1 0 0 1 1 0 1 0 1 1 0 1 1 1 1 1. each 1 here gives a minterm e.g.

Karnaugh Maps Yet another way of deriving the simplest Boolean expressions from behaviour. Easier than using algebra (which can be hard if you don't know where you're going). Example A B C X 0 0 0 0 0

### Digital Logic: Boolean Algebra and Gates

Digital Logic: Boolean Algebra and Gates Textbook Chapter 3 CMPE2 Summer 28 Basic Logic Gates CMPE2 Summer 28 Slides by ADB 2 Truth Table The most basic representation of a logic function Lists the output

### SYNCHRONOUS COUNTERS

SYNCHRONOUS COUNTERS Synchronous digital counters have a common clock signal that controls all flip-flop stages. Since a common clock controls all flip-flops simultaneously, there are no cumulative delays

### Digital Logic Design. Basics Combinational Circuits Sequential Circuits. Pu-Jen Cheng

Digital Logic Design Basics Combinational Circuits Sequential Circuits Pu-Jen Cheng Adapted from the slides prepared by S. Dandamudi for the book, Fundamentals of Computer Organization and Design. Introduction

### DIGITAL ELECTRONICS. Counters. By: Electrical Engineering Department

Counters By: Electrical Engineering Department 1 Counters Upon completion of the chapter, students should be able to:.1 Understand the basic concepts of asynchronous counter and synchronous counters, and

### The Storage or Data Register

The Storage or Data Register All sequential logic circuits in the computer CPU are based on the latch or flip-flop. A significant part of the ALU is the register complement. In the MIPS R-2000 computer

### COMBINATIONAL and SEQUENTIAL LOGIC CIRCUITS Hardware implementation and software design

PH-315 COMINATIONAL and SEUENTIAL LOGIC CIRCUITS Hardware implementation and software design A La Rosa I PURPOSE: To familiarize with combinational and sequential logic circuits Combinational circuits

### Asynchronous Counters. Asynchronous Counters

Counters and State Machine Design November 25 Asynchronous Counters ENGI 25 ELEC 24 Asynchronous Counters The term Asynchronous refers to events that do not occur at the same time With respect to counter