Fractional Numbers. Fractional Number Notations. Fixedpoint Notation. Fixedpoint Notation


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1 2 Fractional Numbers Fractional Number Notations Claudio Fornaro Ver. 1.4 Fractional numbers have the form: xxxxxxxxx.yyyyyyyyy where the x es constitute the integer part of the value and the y s the fractional part There are two main methods to encode fractional numbers: fixedpoint notation floatingpoint notation 3 4 Fixedpoint Notation Fixedpoint notation splits the available n bits in 2 portions: one for the integer part one for the fractional part integer fractional The radix point is not stored (does not uses up bits): its position is just known The number of bits for the integer and the fractional part are chosen before making any calculation Fixedpoint Notation If needed: the integer part must be padded with 0es on the left the fractional part must be padded with 0es on the right Examples 5.25 in FX on 4+4 bits: in FX on 6+2 bits: Radix points are supposed here
2 5 6 Fixedpoint Notation For relative fractional values, both SM and 2C notations can be used The n bits are then divided into 3 parts: sign (1 bit) integer part (m bits) fractional part (nm1 bits) E.g means 1 bit for sign, 7 for the integer part and 8 for the fractional part Operations are the same seen as for integer values, provided that the values have the same format Fixedpoint Notation Examples Convert value in FX 2C Convert value in FX 2C Note: when using the 1 st 2Coperation method, 1 must be added to the LSB, not to unity place: COperation = Exercises Convert the values as requested FX 2C on 16 bits (1+8+7) FX 2C on 16 bits (1+8+7) from FX 2C (1+7+4) () from FX 2C (1+6+5) () 10 Calculate on FX 2C 16 bits (1+7+8) and identify any overflow ( ) / 2 ( ) * 64 Exercises Solutions Note that the integer part is not the same
3 9 10 Exercises Solutions ( ) / C C C = Radix points are supposed here Exercises Solutions ( ) * C C C = OVERFLOW Radix points are supposed here Fixedpoint Uses Fixedpoint notation is sometimes used by simulating it with the integer notation that microprocessors use (i.e. 2C) This allows faster computations than operations using floatingpoint notation (intrinsically slower) Fixedpoint Problems Suppose the following (unsigned) values have to be coded using Fixedpoint on a total of 8 bits: All of them can be coded in 8 bits, but there is not a unique position for the radix point suitable for all
4 13 14 Fixedpoint Problems Suppose you have to represent some fractional values 0 x < 8 using a Fixedpoint coding 4+4 bits: The first bit is always 0, and the fractional part is rounded to 4 bits If we could move the fractional point 1 positions to the left, we could have 1 more bit for precision Fixedpoint Problems Suppose you have to represent some values with fractional part x.0, x.5 or x.25 only, using a Fixedpoint coding 4+4 bits The last two bits are always 00, and the integer part is limited to 15 If we could move the fractional point 2 positions to the right, we could have 2 more bits for the integer part (values up to 63) Fixedpoint Problems The problem with Fixedpoint notation is the fixed position of the radix point To solve this problem, the radix point must be made movable (floating), this requires that its position be stored along with each number Exponential Notation Exponential notation represents a number as a value (mantissa or significand ) that multiplies a whole power of the base (exponent ) Examples (in decimal): Mantissa = = Exponent =
5 17 18 Exponential Notation Very big and very small values are obtained by just varying the exponent The same value can be expressed in many forms: = = Among these forms, form 0.x (x 0) is chosen to have a unique representation for values, this is called the normalized form Exponential Notation When the number of digits is not enough to store the whole number only the most important (leftmost) digits are stored The most significant digits are thus preserved, but approximation errors are introduced because of truncation Example (only 4 decimal digits): = = Exponential Notation The maximum representation error with n digits is 10 n relative to the power of the whole part If the whole part power is m : = 10 n 10 m = 10 mn which is the power of the rightmost digit (LSD) Exponential Notation Example Suppose the value has only 4 decimal digits (normalized) The whole part is m =6 = = 10 2 (maximum error) This can also be seen by writing the value as a sum of powers: for this value, the error is: = 43 (< 10 2 )
6 21 22 Exponential Notation Example Suppose the value has only 4 decimal digits = The whole part is m = 2 = = 106 (maximum error) Writing the value as a sum of powers: for this value, the error is: = = (< 106 ) IEEEP754 FloatingPoint The IEEEP754 standard describes the most common notations used by computer FPUs (FloatingPoint Units) to compute floatingpoint values The two exponential binary floating point notations described have the form mantissa 2 exponent and are: Single precision (SP) Double precision (DP) Single precision values uses 32 bits divided in 3 parts: sign: 1 bit exponent field: 8 bits mantissa (or significand) field: 23 bit s exponent mantissa The sign bit is defined as follows: 0 is used for values 0 1 is used for values 0 (negative zero!) The mantissa (or significand ) is in the normalized form 1.xxxxx, where the 1 before the radix point is the leftmost 1 (MSB) in the binary representation Only the fractional part of the binary mantissa is stored in the mantissa field: the leftmost 1 is already known to be present (called hidden bit ), this allows for one more bit of precision (23 bits stored + 1 hidden = 24 bits effective)
7 25 26 The exponent is a relative integer value on 8 bits, the IEEEP754 SP standard does not use SM or 2C notations, but a biased notation called excess 127 : the FP exponent field is computed by adding constant value 127 (bias constant ) to the exponent of the normalized value Excess notation is efficient, especially for number comparison The offset value is 2 n 1 1 (n is the number of bits) in order to consider the first half of the range as negative numbers Example: IEEEP754(SP) sign is positive: sign bit = 0 convert the value to binary = normalize the value = Note: base 2 compute the exponent by adding 127 to the real base 2 exponent 3+127=130= Compose the pieces adding padding 0es Example: convert from IEEEP754(SP) sign bit = 1 extract the mantissa, add the hidden bit, and convert to decimal = compute the real exponent by subtracting 127 from the extracted exponent = = 31 compose the parts: =
8 29 30 The SP decimal range is: ( ) The decimal exponent varies from 45 to +38, corresponding to a binary exponent from 126 to 127 Values are approximated to 7 decimal digits (corresponding to the 24 bits used by the mantissa) The representation error is the absolute weight of the LSB This is computed by multiplying the weight of the integer part (hidden bit) times the relative weight of the mantissa LSB (i.e. the weight of the LSB with respect to the integer part) This results in adding the exponents = = = = = = The binary exponent varies from 126 to 127, corresponding to excess 127 values from 1 to 254 Exponent values (0) and (255) are used for special numbers: Zeroes Infinities NaNs Denormalized values Zero Exponent= , Mantissa=0 0/ by definition, not by computation, because there is not any 1 for normalization Positive and negative are considered equivalent Infinity Exponent= , Mantissa=0 0/ Operations with infinitives are well defined
9 33 34 Not a Number (NaN) Exponent= , Mantissa 0 0/ <not 00 00> NaNs are used to indicate values that does not represent real numbers There are 2 types of NaNs: Quiet NaNs: denote indeterminate operations (mantissa MSB set), the result of an operation is not mathematically defined Signalling NaNs: denote an invalid operation (mantissa MSB clear) Any operation with NaN yields a NaN result Special Operations N / INF = 0 INF INF = INF N / 0 = INF INF + INF = INF 0 / 0 = NaN INF INF = NaN INF / INF = NaN INF 0 =NaN IEEEP754 standard allows values in nonnormalized form too (denormalized ) Exponent= , Mantissa 0 Hidden bit is now 0 and not 1 The exponent value is considered 126 Value is: 0.mantissa IEEEP754 Double Precision Double precision notation just extends the SP notation to use 64 bits The differences are: exponent bits: 11 mantissa bits: 52 bias constant: 1023 exponent range: 1022, equivalent decimal range: ( ) with 15 decimal digits denormalized exponent: 1022
10 37 38 IEEEP754 Compact Notation For ease of writing and copying, floatingpoint numbers (as any other bit sequence) can be translated to base 16 as they were (they are not!) a pure binary number BFE00000 C3C Convert the following values to/from IEEEP754: to SP and DP to SP and DP with an absolute precision of 1/ to decimal to decimal EB to decimal Solutions = = 137 = = 1033 = then: SP: in compact form: C4A58800 DP: in compact form: C094B Solutions = 1/1000 n =10 (fractional bits) = = 121 = = 1017 = then: SP: in compact form: 3CB80000 DP: in compact form: 3F
11 41 42 Solutions = = = 1.75 EB = = = = = = = (approx.) the nonapproximated value is: Floatingpoint Addition To add two FP values, these must have the same exponent before adding their mantissas: the smaller value is converted to have the same exponent as the greater (it is denormalized) As the exponent is increased (e.g. by 3), the mantissa must decrease (right shift 3 bits) to not change the overall value Underflow If the conversion of the smaller value shifts away all of the mantissa bits (including the hidden bit), the value is approximated to 0, thus the operation result is equal to the greater while the smaller is just ignored There is an underflow condition when, adding 2 values, the result is equal to the greater of them Underflow Example in SP must be converted to the form xxx 2 43, this causes a right shift of 25 bits on the mantissa, thus shifting away all the 24 mantissa bits and resulting in 0 Adding up many small values, it is possible that a partial sum becomes so big to cause underflow for each of the subsequent values (only the first part of the values is added up)
12 45 46 Calculate the following operations (IEEEP754) and express the result in the same compact form, identify any Overflow/Underflow: 2B1A5F20 + 4F1A3BB0 C4A C2B AB102F 709B1BC2 7F F Solution N.1: 2B1A5F E= =86 4F1A3BB E= =158 Difference of exponents= > 24 UNDERFLOW Result: 4F1A3BB Solution N.2: C4A E= =137 (non biased: 10) M= C2B E= =133 (non biased: 6) M= Difference of exponents: = 4 Solution N.2 (continuation): Denormalized mantissa of the 2 nd value to have exponent=10 (4 right shifts): Addition: = Result: C4B18000
13 49 50 Solution N.3 63AB102F 709B1BC E= E=225 Difference of exponents: = > 24 UNDERFLOW Result: F09B1BC2 (SIGN CHANGED!) Solution N.4 7F E=254 (non biased=127) 7F E=254 (non biased=127) Difference of exponents: Solution N.4 (continuation) = Renormalization: Max exponent is 127 OVERFLOW Result: (+Infinity) F Calculate in the IEEEP754 SP format the following operations with DECIMAL numbers, identify any Overflow/Underflow:
14 53 54 IEEEP754 Puzzles Solution: Values differ on the LSB The two numbers have 9 decimal digits corresponding to about 9 3=27 bits After normalization, the relative weight of the LSB is 227 Having only 24 bits, power 227 is discarded The two values are considered equal Result is 0 IEEEP754 SP Ranges Maximum normalized positive number is with 23 fractional bits If there were all the bits, the value would be: with 127 fractional bits, = Having just 23 fractional bits, the value is approximated to with 23 fractional bits set to 1 and the rightmost =104 bits set to bits set to 1 are value IEEEP754 SP Ranges Maximum normalized positive value: = ( ) ( )= e+38 Minimum normalized positive number: e 38 IEEEP754 SP Ranges Maximum denormalized positive number is with 23 fractional bits the rightmost bit power is: = 149 ( ) ( )= Minimum denormalized positive number is with 23 fractional bits the rightmost bit power is: =
15 57 58 IEEEP754 Puzzles Determine the difference between value 44A58800 and the next one (44A58801) Value in binary is: = Next one differs for just the LSB: Difference is 1 LSB weight = = 213 IEEEP754 Puzzles Determine the range of the consecutive integer values in SP. Values are in the form 1.xx xx with 23 fractional bits (denormals are not integers) 24 bits (hidden bit included) result in 2 24 combinations of bits (0 to ), each corresponds to a value and an appropriate exponent makes it an integer value 2 24 is represented too Range: IEEEP754 Puzzles Determine the (absolute) representation error for value N= in IEEEP754 SP. N = requires 63 bits N = 1.xxx 2 62 In SP there are only 23 bits for the mantissa The relative weight of the LSB is =39 The representation error is 2 39
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