Data Concentrator Modules ATLB. ZYNQ Board EMC DC. VME Gigabit ETH xtca. Advanced Trigger Logic Board. Stand Alone. PANDA EMC Data Concentrator
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1 Data Concentrator Modules ATLB Advanced Trigger Logic Board ZYNQ Board Stand Alone EMC DC PANDA EMC Data Concentrator VME Gigabit ETH xtca
2 Data Concentrator Modules ATLB Advanced Trigger Logic Board ATLB Model ATLB V ATLB L Interface VME 64x /VXS LVD BUS (1) Features 16 optical interfaces (SFP), 6.5 Gb/s each. PowerPC based embedded system 5 NIM Trigger In/Out, 64 MB of DDR RAM, 8 MB of Flash ROM, USB 10/100 Ethernet Trigger Data Flow ~ 100 ns VME Serial Data In 9 2 Gbit/s De serialization Data alignment Calibration Event builedr Energy reconstruction Missing Mass calculation Trigger Out
3 ATLB as Data Collector for KLOE 2 ATLB Hardware architecture MEZZANINE CARD VIRTEX 5 FXT FPGA DATA BUFFER (16X16 SUB EVENT FIFO) EVENT EMULATOR EVENT BUILDER ACTIVE LINK DETECTOR & DATA FORMAT CONTROL VME64x BASE VIRTEX 5 LXT FPGA MAIN DATA BUFFER (1k EVENT FIFO) CONTROL/ STATUS SLOW CONTROL SLOW CONTROL MICROBLAZE EMBEDDED SYSTEM + EXTERNAL PERIPHERAL INTERFACES SYSTEM CONTROL VME
4 ATLB as Data Collector for KLOE 2 ATLB Firmware Front_end Trigger/ Synchronization Optical Transceiver Mezzanine X16 Optical Transceiver SFP Link FIFO Footer FIFO Active Channel Detector PRGB/ BERT Synchronization Event Builder Active Channel Table Local Bus VME Base Board Control/Status Register Data Buffer FIFO Test FIFO VME Interface VME Slow Control Slow Control
5 ATLB as Data Collector for KLOE 2 Data Collection over Optical Links We have done an extensive use of chipscope to debug the front end daq. Here we show data flowing through the first 8 links to the data collection board.
6 ATLB as Data Collector for KLOE 2 Event building: Simultaneous data transfers over optical links Optical Mezzanine VME Base GIB GIB Optical Transceiver Optical Transceiver Link FIFO Simultaneous Transfers data transfersfinished Link FIFO Header check Data FIFO Word count Format check VME
7 ATLB as Data Collector for KLOE 2 Event building: Non coherent data transfers over optical links Optical Mezzanine VME Base GIB Optical Transceiver Link FIFO Footer FIFO Header and Footer check Data FIFO VME GIB Optical Transceiver Link FIFO Word count Format check Footer FIFO Random data transfers Transfers finished when all Footers match
8 ATLB as Data Collector for KLOE 2 Link data structure Event Header (#EFFFFFFF) Sub Event Data Block (lowest active link) XXXXXXXX X 1.. Sub Event Data Block (highest active link) XXXXXXXX X 1 Event Footer 1 (#FE0) Sub event no. Event Footer 2 (#F7F8) Word count
9 ATLB as Data Collector for KLOE 2 VME Data traffic The VME interface supports BLT MBLT 2eVME 2eSST
10 ZYNQ Board A Stand Alone Optical Concentrator Board 4 4 Based on ZED board from Avnet Diploma work of: Panagiotis Stamatakopoulos George Ntounas
11 ZYNQ Board A Stand Alone Optical Concentrator Board
12 ZYNQ Board Hardware check: SFP+ optical loopback 6.25 Gbps DDR 1066 UART Flash SDHC PLL SFP+ USB 2.0? HDMI X Firmware & software Basic Configuration Hello world test DDR test Hardware test LINUX X
13 CGEM DAQ 6.25 Gbps
14 VME64x CGEM DAQ xtca Data Concentrator AMC (utca) 151 mm 16 Optical Links 10 Gbit/s 1Gbit Ethernet
15 xtca Data Concentrator AMC (utca)
16 xtca Data Concentrator AMC (utca) FMC 2 24 LVDS 40 HR 10 GTX FPGA 24 LVDS 4 GTX MMC xtca 24 LVDS XCKU7 060 FFG1156 FMC 2 40 HR 24 LVDS AMC 10 GTX 4 GTX DDR3 (1GB) 2* MT41K128M16JT
17 xtca Data Concentrator MMC Hot swap handle JTAG Prog, debug Front panel LED FMC JTAG RTC RTC 8564JE PS control UCD90160 uc ATmega128L xtca I 2 C xtca Pwr Switch IPMI Temp sens. RTC 8564JE FPGA JTAG FPGA Reset AMC power
18 FMC Mezzanine Board SFP+ SFP+ SFP+ SFP+ SFP+ SFP+ SFP+ SFP+ SFP+ SFP+ SFP+ SFP+ Optical Data Concentrator utca Carrier board CGEM DAQ xtca Data Concentrator as a generic platform FPGA (XC7KU040 ) AMC Connector Custom Mezzanine Board 16 ch. AMP/SHP (16 * LTC6403) SFP+ Shashlyk 250 MSPS 14 bit ADC utca Carrier board 16 ch. ADC (8 * AD9250) PLL (LMK ) FPGA (XC7KU040) AMC Connector
19 Thank You!
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