. HIGH SPEED .LOW POWER DISSIPATION .HIGH NOISE IMMUNITY M54HC112 M74HC112 DUAL J-K FLIP FLOP WITH PRESET AND CLEAR. fmax = 67 MHz (TYP.

Size: px

Start display at page:

Download ". HIGH SPEED .LOW POWER DISSIPATION .HIGH NOISE IMMUNITY M54HC112 M74HC112 DUAL J-K FLIP FLOP WITH PRESET AND CLEAR. fmax = 67 MHz (TYP."

Matthew Garrison
7 years ago
Views:

1 M54HC112 M74HC112 DUAL J-K FLIP FLOP WITH PRESET AND CLEAR. HIGH SPEED fmax = 67 MHz (TYP.) AT VCC =5V.LOW POWER DISSIPATION I CC =2µAATT A =25 C.HIGH NOISE IMMUNITY VNIH =VNIL =28%VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE IOH =IOL = 4 ma (MIN.) BALANCED PROPAGATION DELAYS t PLH =t. PHL WIDE OPERATING VOLTAGE RANGE VCC (OPR) = 2 V TO 6 V PIN AND FUNCTION COMPATIBLE WITH 54/74LS112 DESCRIPTION The M54/74HC112 is a high speed CMOS DUAL J-K FLIP-FLOP WITH PRESET AND CLEAR fabricated in silicon gate C 2 MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power coumption. The M54HC112/M74HC112 dual JK flip-flop features individual J,K, clock, and asynchronous set and clearinputs for each flip-flop. When the clock goes high, the inputs are enabled and data will be accepted. The logic level of the J and K inputs may be allowed to change when the clock pulse is high and the bistable will function as shown in the truth table. Input data is traferred to the input on the negative going edge of the clock pulse. All inputs are equipped withprotection circuits agait static discharge and traient excess voltage. B1R (Plastic Package) M1R (Micro Package) F1R (Ceramic Package) C1R (Chip Carrier) ORDER CODES : M54HC112F1R M74HC112M1R M74HC112B1R M74HC112C1R PIN CONNECTIONS (top view) INPUT AND OUTPUT EQUIVALENT CIRCUIT NC = No Internal Connection October /11

2 TRUTH TABLE INPUTS OUTPUTS CLR PR J K CK Q Q FUNCTION L H X X X L H CLEAR H L X X X H L PRESET L L X X X H H H H L L Q n Q n NO CHANGE H H H L H L H H L H L H H H H H Q n Q n TOGGLE H H X X Qn Qn NO CHANGE X: Don t Care PIN DESCRIPTION IEC LOGIC SYMBOL PIN No SYMBOL NAME AND FUNCTION 1, 13 1CK, 2CK Clock Input (HIGH to LOW edge triggered) 2, 12 1K, 2K Data Inputs: Flip-Flop 1 and 2 3, 11 1J, 2J Data Inputs: Flip-Flop 1 and 2 4, 10 1PR, 2PR Set Inputs 5, 9 1Q, 2Q True Flip-Flop Outputs 6, 7 1Q, 2Q Complement Flip-Flop Outputs 15, 14 1CLR, Reset inputs 2CLR 8 GND Ground (0V) 16 V CC Positive Supply Voltage LOGIC DIAGRAM (1/2 Package) 2/11

3 ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit VCC Supply Voltage -0.5 to +7 V V I DC Input Voltage -0.5 to V CC V VO DC Output Voltage -0.5 to VCC V IIK DC Input Diode Current ± 20 ma I OK DC Output Diode Current ± 20 ma IO DC Output Source Sink Current Per Output Pin ± 25 ma ICC or IGND DC VCC or Ground Current ± 50 ma P D Power Dissipation 500 (*) mw Tstg Storage Temperature -65 to +150 o C T L Lead Temperature (10 sec) 300 o C Absolute MaximumRatings are those values beyond whichdamage tothe device may occur. Functional operation under these condition isnotimplied. (*) 500 mw: 65 o C derate to 300 mw by 10mW/ o C: 65 o Cto85 o C RECOMMENDED OPERATING CONDITIONS Symbol Parameter Value Unit V CC Supply Voltage 2 to 6 V V I Input Voltage 0 to V CC V VO Output Voltage 0 to VCC V T op Operating Temperature: M54HC Series M74HC Series -55 to to +85 o C C t r,t f Input Rise and Fall Time V CC = 2 V 0 to 1000 VCC = 4.5 V 0 to 500 VCC = 6 V 0 to 400 3/11

4 DC SPECIFICATIONS Symbol V IH V IL VOH V OL II I CC Parameter High Level Input Voltage Low Level Input Voltage High Level Output Voltage Low Level Output Voltage Input Leakage Current Quiescent Supply Current VCC (V) Test Conditio TA =25 o C 54HC and 74HC Value -40 to 85 o C 74HC -55 to 125 o C 54HC Min. Typ. Max. Min. Max. Min. Max VI = 4.5 I V O =-20 µa IH or V IL IO=-4.0 ma IO=-5.2 ma V I = 4.5 I O =20µA V IH or VIL I O = 4.0 ma IO= 5.2 ma VI =VCC or GND ±0.1 ±1 ±1 µa 6.0 V I =V CC or GND µa Unit V V V V 4/11

5 AC ELECTRICAL CHARACTERISTICS (CL =50pF,Inputtr=tf=6) Symbol t TLH t THL t PLH t PHL tplh t PHL fmax tw(h) t W(L) tw(l) ts th Parameter Output Traition Time Propagation Delay Time (CK - Q, Q) Propagation Delay Time (CLR, PR - Q, Q) Maximum Clock Frequency Minimum Pulse Width (CLOCK) Minimum Pulse Width (CLR, PR) Minimum Set-up Time Minimum Hold Time VCC (V) Test Conditio TA =25 o C 54HC and 74HC Value -40 to 85 o C 74HC -55 to 125 o C 54HC Min. Typ. Max. Min. Max. Min. Max trem Minimum Removal Time (CLR, PR) CIN Input Capacitance pf C PD (*) Power Dissipation 33 pf Capacitance (*) C PD is defined as the value of the IC s internal equivalent capacitance which is calculated from the operating current coumption without load. (Refer to Test Circuit). Average operting current can be obtained by the following equation. I CC(opr) = C PD V CC f IN +I CC/2 (per FLIP/FLOP) Unit MHz 5/11

6 SWITCHING CHARACTERISTICS TEST WAVEFORM TEST CIRCUIT (Opr.) INPUT TRANSITIONTIME IS THE SAME AS THAT IN CASE OF SWITCHING CHARACTERISTICSTEST 6/11

7 Plastic DIP16 (0.25) MECHANICAL DATA DIM. mm inch MIN. TYP. MAX. MIN. TYP. MAX. a B b b D E e e F I L Z P001C 7/11

8 Ceramic DIP16/1 MECHANICAL DATA DIM. mm inch MIN. TYP. MAX. MIN. TYP. MAX. A B D E e F G H L M N P Q P053D 8/11

9 SO16 (Narrow) MECHANICAL DATA DIM. mm inch MIN. TYP. MAX. MIN. TYP. MAX. A a a b b C c1 45 (typ.) D E e e F G L M S 8 (max.) P013H 9/11

10 PLCC20 MECHANICAL DATA DIM. mm inch MIN. TYP. MAX. MIN. TYP. MAX. A B D d d E e e F G M M P027A 10/11

11 Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no respoability for the coequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No licee is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specificatiomentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronicsproducts are not authorized foruse ascritical componentsin life support devices or systems without express written approval of SGS-THOMSON Microelectonics SGS-THOMSON Microelectronics - All Rights Reserved SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A 11/11

. HIGH SPEED .LOW POWER DISSIPATION .HIGH NOISE IMMUNITY M54/M74HC190 M54/M74HC191 4 BIT SYNCHRONOUS UP/DOWN COUNTERS. fmax = 48 MHz (TYP.

. HIGH SPEED .LOW POWER DISSIPATION .HIGH NOISE IMMUNITY M54/M74HC190 M54/M74HC191 4 BIT SYNCHRONOUS UP/DOWN COUNTERS. fmax = 48 MHz (TYP. M54/M74HC190 M54/M74HC191 4 BIT SYNCHRONOUS UP/DOWN COUNTERS. HIGH SPEED fmax = 48 MHz (TYP.) AT VCC =5V.LOW POWER DISSIPATION I CC =4µA (MAX.) AT T A =25 C.HIGH NOISE IMMUNITY VNIH =VNIL =28%VCC (MIN.)