The George Washington University School of Engineering and Applied Science Department of Electrical and Computer Engineering

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1 The George Washington University School of Engineering and Applied Science Department of Electrical and Computer Engineering Final Design Report Dual Channel Stereo Amplifier By: Kristen Gunia Prepared for EE 20 Section 32 Microelectronic Circuits Prof. Can Korman GTA: Faisal Yasin May 8, 2000

2 ABSTRACT The final project consisted of the design of an amplifier given certain specifications. (see Part 1) The amplifier design chosen was a Common Emitter Circuit followed by a Common Collector Power Amplifier (Class AB). The CEC was chosen because a large voltage gain can be achieved with this circuit, which was beneficial in attaining the 10V/V gain that was given in the specifications. Following the CEC was a CCC power amplifier. Although the CCC only has a voltage gain of 1V/V, it produces a large current gain. This gain is necessary to produce sufficient current so that sound may be heard out of an 8 Ohm speaker, which will serve as our output load. In addition to the amplifier, a 3-bit digital volume control and LED output stage were necessary. The 3-bit digital control was placed at the input of the AC signal. This placement was chosen over putting the control at the output for several reasons. One, if lower volume is desired, power will be saved by cutting down the signal at the input instead of allowing the circuit to amplify the voltage and then cut it down at the output. Also, design was made easier because the input source is known. At the end of the circuit, the output voltage may not necessarily be known. Theoretically it should be constant, but in the real world some parts may fail, or begin to fail, and cause an unexpected output. This would disturb the resistor values chosen for the summing opamp. The summing op-amp was used to obtain various gains. The LED consisted of a comparator circuit. A voltage divider was built to serve as reference voltages at 0.25, 0.5, 1.0, and 2.0 V. The source voltage was then compared to these set references, and if the source was higher the LED s would light. There were many problems that were encountered. The first main problem was that the output voltage was clipping significantly. This was determined to be due to improper DC biasing. A gain of 30 V/V was being calculated for to ensure enough gain was to come out of the circuit. However, that required the V IN to be below 100mV PP, which was way below the specified 500mV PP. (see calculations). Therefore, a gain of only 10 was used in the calculations. This allowed for a proper V IN, and a corrected value of Rc. When Rc was lowered after the second calculation, a working DC bias was attained. Another problem was that the transistors were heating up quite quickly. To alleviate this problem, power transistors were placed in the circuit, in particular TIP 31 (npn) and TIP 42 (pnp). In addition, heat sinks were attached to the TIPs. Since these were able to handle a much higher current than the transistors, R B was able to be lowered. This was useful because it was easier to find an R C in the CEC to give a high gain and preserve the DC biasing. ii

3 TABLE OF CONTENTS Section Page # 1. Specifications 1 2. Theory of Operations 2 3. Circuit Designs, Layouts, & Wire List 4 4. SPICE Simulation 7 5. Testing Procedure 9 6. Users Manual Electrical Parts List Conclusions References Appendices 16 A. Appendix A Calculation 16 B. Appendix B Measurement 23 iii

4 LIST OF ILLUSTRATIONS Illustration Page # 1. Audio Amplifier 4 2. Volume Control 4 3. LED Comparator Circuit 5 4. Power Supply 5 5. Physical Layout 6 6. SPICE Voltage Output 7 7. SPICE Frequency Characteristics 8 8. Volume Control Output Measured Frequency Response CEC Voltage Output CCC Voltage Output 25 iv

5 SPECIFICATIONS Power supply of 120 V rms at 60 Hz. CD stereo input (two channels: Left and Right) at 250 mv peak output. Stereo output. The load is an 8 Ohm speaker with a power rating of 0.2 Watts. Four level LED display per channel at 2V, 1V, 0.5V and 0.25V output levels Volume control per channel: o Digital: 3-bit dip switch control. o Minimum gain (000): -3 db o Maximum gain (111): 20 db o Frequency range: of 300 Hz - 10 khz (without distortion). o Maximum variation in gain over the frequency range: +/- 1 db 1

6 THEORY OF OPERATION Digital Volume Control CEC CCC Power Amp LED.5 V pp 5V pp Input Output Power Supply The circuit consists of many stages. The input is fed to the digital volume control, which leads to the CEC. This is followed by the Class AB Power Amp, which then outputs to the LED and speaker. As stated above, the CEC is used to produce a gain of at least 10V/V. The CCC Power Amp does not amplify the voltage, but amplifies the current significantly. This is useful because we need a fair amount of current to go through the 8 Ohm speaker at the end of the circuit so that sound may be heard. Without ample current, a strong sound will not come out. The digital volume control receives approximately.5 V peak from the source a CD player. Through the use of a summing op-amp, the voltage proceeding on to the CEC could be controlled. A 3-bit DIP switch was used to determine the values of the resistors going into the op-amp. When all three switches were on, the maximum resistance value was achieved, thus the maximum voltage desired was the output to the CEC (20dB). Because a minimum gain of 3dB was necessary when all the switches were off, an additional resistor was added from the CD output to the op-amp input. This served as a constant resistor, which allowed for a minimum voltage output at all times. The circuitry of the CEC consists of a sinusoidal input voltage, capacitors and resistors. The input voltage of from the volume control is fed through a capacitor before it reaches the actual circuit. This serves to get rid of noise, but also to protect the DC voltage. After the capacitor the circuit branches off to two R B values. Since these are connected to the base, they serve to control the DC biasing. The voltage going through the base has to be controlled so as to keep the npn transistor in forward active mode. In the circuit R C varies the output voltage, thus varying the gain. A greater R C will produce a larger gain, but it has to be ensured that the DC biasing is preserved, otherwise a distorted output will be observed. R E is capacitively coupled from the base to ground. In 2

7 this design, R E is combined with r e, which is used for small signal analysis for simplicity. R E also serves to protect the DC biasing by making sure that the correct voltage is allowed to pass through the transistor. After the CEC, a capacitor connects the two stages. The capacitor further aides in noise reduction. It should be noted that the R OUT of the CEC is set equal to the R IN of the CCC in calculations. Although the voltage gain is then reduced in half, it is beneficial to design the circuit this way because it is at this point that there is maximum power. The CCC Power Amp sees the sinusoidal voltage coming out of the CEC and sends it to both a pnp and an npn transistor. By using a Class AB circuit, there is no constant current being drawn, thus saving power. This design consists of a push and pull effect, where the emitter currents are both sent to the output. This helps to amplify the total current in the output. The first thing the voltage sees are two diodes one leading to each transistor. When the AC input is positive it turns on the top transistor (npn), and when it is negative it turns on the bottom (pnp) transistor. Therefore, two diodes are inserted, one leading to each transistor. These diodes function as small batteries (0.7V each), which take care of the slight clipping that occurs when the diodes are turning on an off. They ultimately give more swing to the transistors. After the diodes, R B leads to the collector of each of the transistors. Here, R B functions to control the DC bias as well, but more importantly it controls the current passing on to the transistor. If there is too much current coming into the transistor, they may burn due to their maximum power rating of 625 mw. Thus, R B may be calculated to allow a suitable amount of current through. The resistors lead to the collectors of the npn and pnp, respectively. As stated above, this design utilized two transistors in parallel so that the current may be split between the two for safety reasons. This allowed for a greater current before failure. Resistors were also placed in the emitters of each transistor. These could be very small since it is not desirable to reduce the voltage gain before the output. The main reason for these R E s is to prevent thermal runaway. This is caused by the two transistors having different internal characteristics. If V BE reduces at high temperatures, the collector current can rise, which leads to more power dissipation and therefore heating. This keeps on cycling until ultimate failure of the transistor. The R E s help to control the biasing, which help maintain V BE, thus preventing thermal runaway. Finally, the LED display and the speaker are joined in parallel from the output of the power amp. The LED configuration consists of a voltage divider and the input signal leading to a row of resistors. The voltage divider was formed from 5 resistors in series with a DC voltage running through them. Each point in the series was led to an op-amp, which then compared the DC reference value to the AC voltage from the music. When the AC voltage surpassed the DC voltage, the LED would light up. Thus by controlling the resistor values, the DC reference values could be set as 0.25V, 0.5V, 1V, and 2V. The Power Supply was designed around a full wave bridge rectifier. The transformer was used to step down the 120 V rms supply to 12 V peak waves. These were then fed to 4 diodes in the bridge configuration. From here, both +12Vdc and 12Vdc voltages were attained by feeding the output waves into voltage regulators, which are essentially zener diodes. The zener diodes also had capacitors in parallel with ground. These were used to smooth out the DC voltages. 3

8 CIRCUIT DIAGRAMS, LAYOUTS, & WIRE LISTS Figure #1 Audio Amplifier Figure #2 Volume Control 4

9 Figure #3 LED Comparator Circuit Figure #4 Power Supply 5

10 Figure #5 Physical Layout In the layout above, the left most stage is the volume control, followed by each stage along the top and the bottom. The power supply shares the second breadboard with the CEC, and is situated in between the channels. 6

11 SPICE Simulation Figure #6 SPICE Voltage Output In this figure, the CEC output (represented by the red curve), gave a gain of 17.8 V/V. The power amp output (represented by the green curve), gave a gain of 8.9 V/V. This is slightly below the specified 10 V/V gain, but in the actual circuit the R C of the CEC was replaced with a potentiometer. Adjusting this value slightly adjusted the gain, which made it possible to attain the 10 V/V gain. 7

12 Figure #7 SPICE Frequency Characteristics It is shown by the frequency output of the audio amplifier that the voltage is fairly consistent through the 300Hz to 10kHz range. The sweep was extended to 50kHz to show that the circuit has a high maximum input frequency. 8

13 TESTING PROCEDURE Each part of the circuit was tested independently to ensure they each had the correct output. The input came from the function generator and had a value of 500 mv PP. The power supply was tested by plugging the transformer in and connecting all of the wiring between the components. A voltmeter was then used to test the voltage at the positive and the negative output nodes. In this experiment, the power supply was successful, and achieved a + /- 12V dc output. The CEC gave an loaded output of 5.16V PP, which is a gain of 10 V/V. The load used was the R in of the CCC because that would be the value that the common emitter circuit saw. It should be noted that in testing the CEC the R C was replaced with a potentiometer and the output wave was observed through an oscilloscope. This was useful in determining at which point the DC biasing was wrong, as well as at which point the gain was correct. The CCC gave an independent output of.42 mv PP, a gain of.84 V/V. This output was tested over an 8 Ohm load, simulating the presence of the speaker. These are reasonable since the CEC is expected to give a large voltage gain, while the CCC has a gain of one. Once the two stages were tested independently, the two stages could be joined together. As a whole, the output voltage was measured over an 8 Ohm resistor. The circuit should now be tested to make sure that the gain does not fall below 8 in the range of 300Hz 10 khz. This can be done by varying the frequency output from the function generator. To test the digital volume control, a.5 V peak sinusoidal wave was input, and the voltage at the output was measured at each of the 8 levels of volume control. The resulting V out vs. V in curve should be linear. The LED stage can be tested by applying a +/- 12V dc input to the op-amps, as well as a +12V dc input to the voltage divider. A sinusoidal signal from the function generator can then be run through the op-amps. Since this sin wave acts as the inverting voltage, the function generator can be used to control the input, and the LED s can be observed to see if they in fact turn on at 0.25, 0.5, 1, and 2V peak. 9

14 USERS MANUAL i) Operating Instructions Assuming the circuit is using a CD player as the AC source, the only thing that can be controlled by the user is the volume (the gain). This can be done by flipping the switches in the DIP switch. When three of the switches for one channel are on, there is a maximum gain, and when all three of the switches are off for one channel, there is a minimum gain. ii) Maintenance If the circuit is not functioning properly, the stages should be tested independently of each other to make sure they are giving a correct output. After the troubled stage is identified, further testing can be done. This includes checking the DC biasing using a multimeter and replacing any transistors or diodes that may have failed. Also, all of the wiring should be checked to ensure that there are no faulty connections. iii) Safety Precautions In order to ensure safe operation of the amplifier, the user should not try to replace parts while the power is on to any of the stages. Also, it is advised not to replace nonpolarized capacitors with polarized capacitors as there is a greater chance of a blown capacitor. The user should not eat or drink near the open circuit. 10

15 ELECTRICAL PARTS LIST Table #1 Parts List Reference Name Specific Description Part Number Designator CEC RB1 Resistor 100 kohm RB2 Resistor 33 kohm RC Resistor 600 Ohm RE Resistor 60 Ohm C1 Capacitor 470 uf Electrolytic 140-XRL50V470 C2 Capacitor.82 uf Electrolytic 140-XRL50V470 Power Amp C4 Capacitor.82 uf Electrolytic 140-XRL50V470 C5 Capacitor.82 uf Electrolytic 140-XRL50V470 D1 Diode 1N4002 Rectifier 1N4002 D2 Diode 1N4002 Rectifier 1N4002 RB3 Resistor 2 kohm RB4 Resistor 2 kohm Q1 Transistor NPN Silicon 2N3904 Q2 Transistor NPN Silicon TIP-31 Q3 Transistor PNP TIP-42 RE2 Resistor 2 Ohm RE3 Resistor 2 Ohm RE4 Resistor 2 Ohm RE6 Resistor 2 Ohm RL Resistor 8 Ohm Volume Control DIP Switch 8 Segment, SPST Rf Resistor 1 kohm Rc Resistor 14 kohm R1 Resistor 7.5 kohm R2 Resistor 3.8 kohm R3 Resistor 1.9 kohm U1 General Op-Amp LM741 LED Display U1 U4 General Op-Amp LM741 D1 D4 LED diode GaAsP Mouser MV5753 Red R1 Resistor 40k Ohm R2 Resistor 4 kohm R3 Resistor 2 kohm 11

16 R4 R9 Resistor 1 kohm Power Supply TX1 Transformer 166K18 D1 D4 Diode 1N4002 Rectifier 1N4002 C1, C3 Capacitor 470 uf Electrolytic 140-XRL50V470 C2, C4 Capacitor.82 uf - Nonpolar V.82K 7812 Regulator 12Vdc 7812CT 7912 Regulator -12Vdc 7912CT 12

17 CONCLUSIONS The final design used for the audio amplifier was a multi-stage circuit. The first stage, the digital volume control, took the input signal from the CD player and through the control of the switches to the resistors, was able to attain a particular volume. The tested output is shown below, for each of the 8 levels of specified voltage output. Figure #8 Volume Control Output It can be seen that the volume control was successful. That is, there was an equal gain at each level. A CEC, amplified the voltage so that the proper gain could be achieved. This stage was also successful, as seen in Figure #10 CEC Voltage Output, where a gain of 12 V/V was achieved. The second part consisted of a CCC power amplifier of Class AB. This part did not amplify the voltage (gain of one), but amplified the current so that ample current was run through the speaker and sound could be produced. Together, they produced the desired output of 10V/V. The last stage, the LED display, was also successful. However, for one channel the lights were not as bright as the other channel. The reasons for this are unclear since measurements for Vac, Vdc, and current were comparable for both sides. The main problem encountered was extensive clipping at the output. After the DC bias was examined and values were replaced accordingly, there was still some clipping and noise seen. This was determined to be due to the capacitors. They were not in the same frequency, thus distorting the voltage running through them. It was also observed that the gain was improved with larger capacitors. This is again due to the frequency response of the capacitors. 13

18 Another problem was the heating of the transistors in the CCC power amp. This was resolved by using power transistors (TIP 31 and TIP 42). These are rated to handle a larger current. Also, thermal runaway, the heating of the transistors in series, was not a major problem due to the power transistors. When SPICE is compared to the actual circuit, there was only a slight difference. This is surprising as I have observed great incompatibility in other cases. The internal characteristics of the actual parts must have been very close to those given in SPICE. After an undistorted waveform was produced, the speaker was attached to the circuit as an 8 Ohm load, and clear, audible sound could be heard from the speaker. The frequency response was also measured and ensured to be fairly constant within the specified 300 Hz 10kHz. Figure #9 Measured Frequency Response Since all the specifications have been met, the project is 100% complete. 14

19 REFERENCES Microelectronic Circuits; Sedra & Smith, 4 th Edition Class Notes; Professor Korman, Faisal Yasin 15

20 APPENDICES Appendix A Calculations (See Attached) 16

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