SEMICONDUCTOR TECHNICAL DATA

Transcription

1 SEMICONDUCTOR TECHNICL DT The MC4046B phase locked loop contains two phase comparators, a voltage controlled oscillator (VCO), source follower, and zener diode. The comparators have two common signal inputs, and. Input can be used directly coupled to large voltage signals, or indirectly coupled (with a series capacitor) to small voltage signals. The self bias circuit adjusts small voltage signals in the linear region of the amplifier. Phase comparator (an exclusive OR gate) provides a digital error signal PCout, and maintains 0 phase shift at the center frequency between and signals (both at 50% duty cycle). Phase comparator (with leading edge sensing logic) provides digital error signals, PCout and LD, and maintains a 0 phase shift between and signals (duty cycle is immaterial). The linear VCO produces an output signal VCOout whose frequency is determined by the voltage of input and the capacitor and resistors connected to pins C, CB, R, and R. The source follower output SFout with an external resistor is used where the signal is needed but no loading can be tolerated. The inhibit input Inh, when high, disables the VCO and source follower to minimize standby power consumption. The zener diode can be used to assist in power supply regulation. pplications include FM and FSK modulation and demodulation, frequency synthesis and multiplication, frequency discrimination, tone decoding, data synchronization and conditioning, voltage to frequency conversion and motor speed control. Buffered Outputs Compatible with MHTL and Low Power TTL Diode Protection on ll Inputs Supply Voltage Range =.0 to 8 V Pin for Pin Replacement for CD4046B Phase Comparator is an Exclusive Or Gate and is Duty Cycle Limited Phase Comparator switches on Rising Edges and is not Duty Cycle Limited BLOCK DIGRM L SUFFIX CERMIC CSE 60 ORDERING INFORMTION MC4XXXBCP Plastic MC4XXXBCL Ceramic MC4XXXBDW SOIC T = 55 to 5 C for all packages. PIN SSIGNMENT LD PCout VCOout INH C CB P SUFFIX PLSTIC CSE 648 DW SUFFIX SOIC CSE 75G ZENER PCout R R SFout 4 SELF BIS CIRCUIT PHSE COMPRTOR PHSE COMPRTOR PCout PCout LD = PIN 6 = PIN 8 TGE CONTROLLED OSCILLTOR (VCO) 4 VCOout R R 6 C 7 CB INH 5 SOURCE FOLLOWER 0 SFout 5 ZENER 0/7 Motorola, MOTOROL Inc. 7CMOS LOGIC DT REV 4 MC4046B

2 Î MXIMUM RTINGS* (Voltages Referenced to ) Î Rating Symbol Value Unit DC Supply Voltage Î 0.5 to + 8 Vdc Input Voltage, ll Inputs Î Vin 0.5 to Vdc DC Input Current, per Pin Î Iin ± 0 mdc Power Dissipation, per Package Î PD 500 mw Operating Temperature Range Î T 55 to + 5 C Storage Temperature Range Î Tstg 65 to + 50 ÎÎ C * Maximum Ratings are those values beyond which damage to the device may occur. Temperature Derating: Plastic P and D/DW Packages: 7.0 mw/ C From 65 C To 5 C Ceramic L Packages: mw/ C From 00 C To 5 C Î ELECTRICL CHRCTERISTICS (Voltages Referenced to ) Î i V 55 C 5 C 5 C ÎÎ Characteristic Symbol DD Vdc Min Max ÎÎ Min Typ Max Min Max Unit Output Voltage 0 Level ÎÎ Vin = or Vdc ÎÎ Î 0.05 Î Î 0.05 ÎÎ Level 5.0 Î Î 5.0 Î 4.5 Vdc ÎÎ Vin = 0 or Î ÎÎ Input Voltage # 0 Level ÎÎ (VO = 4.5 or 0.5 Vdc) ÎÎ VIL Vdc 5.0Î.5 Î.5.5Î.5 ÎÎ (VO =.0 or.0 Vdc) Î (VO =.5 or.5 Vdc) ÎÎ (VO = 0.5 or 4.5 Vdc) Level ÎÎ (VO =.0 or.0 Vdc) VIH 5.0Î.5.5Î.75 Î.5 Vdc 0Î Î 5.50 Î 7.0 (VO =.5 or.5 Vdc) ÎÎ Î Î Î Output Drive Current IOH mdc ÎÎ ( =.5 Vdc) Source 5.0Î..0Î.7 Î 0.7 ÎÎ ( = 4.6 Vdc) 5.0Î Î 0.6 Î 0.4 ( =.5 Vdc) ÎÎ ( =.5 Vdc) 5Î.8.5Î.5 Î. ÎÎ ( = 0.4 Vdc) Sink ÎÎ ( = 0.5 Vdc) IOL 5.0Î Î 0.88 Î 0.6 mdc 0Î.6.Î.5 Î 0. ( =.5 Vdc) ÎÎ Î Input Current I in 5Î ÎÎ ± 0. ± ± 0.Î ±.0 µdc Input Capacitance C in Î ÎÎ Î Î pf Quiescent Current ÎÎ (Per Package) Inh = =, ÎÎ IDD µdc 0Î 0 Î Î 00 Zener = ÎÎ = 0 V, = Î or 0 V, Iout = 0 µ ÎÎ Total Supply Current ÎÎ (Inh = 0, fo = 0 khz, CL = 50 pf, IT 5.0 IT = (.46 µ/khz) f + IDD mdc 0 IT = (. µ/khz) f + IDD R =.0 MΩ, R = RSF =, 5 IT = (4.7 µ/khz) f + IDD ÎÎ and 50% Duty Cycle) Î ÎÎ #Noise immunity specified for worst case input combination. Î Noise Margin for both and 0 level =.0 Vdc = 5.0 Vdc.0 Vdc = 0 Vdc.5 Vdc = 5 Vdc To Calculate Total Current in General:.65 IT. x. + V DD.5 /4..65 /4 +.6 x.. + x 0 (CL + ) f + R R RSF x 0. 00% Duty Cycle of PC in. + I Q where: IT in µ, CL in pf,, in Vdc, f in khz, and 00 R, R, RSF in MΩ, CL on VCOout. MC4046B

3 ELECTRICL CHRCTERISTICS* (CL = 50 pf, T = 5 C) Î MinimumÎÎ Maximum Î Characteristic i Î SymbolÎ Vdc Î DeviceÎÎ Typical Î Device Units Î Output Rise Time Î Î ttlh = (.0 ns/pf) CL + 0 ns Î Î Î ttlh ns Î 5.0 Î ÎÎ 80 Î 50 ttlh = (.5 ns/pf) CL + 5 ns Î ttlh = (. ns/pf) CL + 0 ns Î Î 5 Î ÎÎ 65 Î 0 Î Output Fall Time Î tthl Î Î ÎÎ Î ns Î tthl = (.5 ns/pf) CL + 5 ns Î Î Î tthl = (0.75 ns/pf) CL +.5 ns Î tthl = (0.55 ns/pf) CL +.5 ns Î Î 5 Î ÎÎ 7 Î 55 Î PHSE COMPRTORS and Î Input Resistance Rin MΩ Î 5 Î 0. ÎÎ 0. Î Î Î Î Rin 5 Î 50 ÎÎ 500 Î MΩ Minimum Input Sensitivity Î C Coupled Î Î Î Vin mv p p Î 0 Î ÎÎ 400 Î 600 C series = 000 pf, f = 50 khz Î Î Î ÎÎ DC Coupled, 5 to 5 See Noise Immunity Î TGE CONTROLLED OSCILLTOR (VCO) Î Maximum Frequency fmax MHz Î ( =, C = 50 pf Î Î 0 Î.0 ÎÎ.4 Î Î R = 5.0 kω, and R = ) Î Î 5 Î.4 ÎÎ. Î Î Temperature Frequency Stability Î Î 5.0 Î ÎÎ 0. Î %/ C (R = ) Î 5 Î ÎÎ 0.05 Î Î Linearity (R = ) Î Î Î ÎÎ Î % Î ( =.5 V ± 0. V, R > 0 kω) Î Î 5.0 Î ÎÎ.0 Î ( = 5.0 V ±.5 V, R > 400 kω) 0.0 Î ( = 7.5 V ± 5.0 V, R 000 kω) Î Î 5 Î ÎÎ.0 Î Î Output Duty Cycle Î Î 5 to 5Î ÎÎ 50 Î Î % Input Resistance Î Rin Î 5 Î 50 ÎÎ 500 Î MΩ Î SOURCE FOLLOWER Î Offset Voltage V Î ( minus SFout, RSF > 500 kω) Î Î Î Î Î Linearity Î ( =.5 V ± 0. V, RSF > 50 kω) Î Î Î % Î 5.0 Î ÎÎ 0. Î Î ( = 5.0 V ±.5 V, RSF > 50 kω) Î Î Î ( = 7.5 V ± 5.0 V, RSF > 50 kω) Î ZENER DIODE Î Zener Voltage (Iz = 50 µ) VZ Î V Dynamic Resistance (Iz =.0 m) Î RZ Î Î ÎÎ Î Î 00 Î Î Ω * The formula given is for the typical characteristics only. MC4046B

4 PHSE COMPRTOR Input Stage X X PCout 0 Input Stage PHSE COMPRTOR X X State PCout 0 Output Disconnected LD (Lock Detect) Refer to Waveforms in Figure. 0 0 Figure. Phase Comparators State Diagrams Characteristic Using Phase Comparator Using Phase Comparator No signal on input. VCO in PLL system adjusts to center VCO in PLL system adjusts to minimum frequency (f0). frequency (fmin). Phase angle between and. 0 at center frequency (f0), approaching 0 lways 0 in lock (positive rising edges). and 80 at ends of lock range (fl) Locks on harmonics of center frequency. Yes No Signal input noise rejection. High Low Lock frequency range (fl). ÎÎ The frequency range of the input signal on which the loop will stay locked if it was Î initially in lock; fl = full VCO frequency range = fmax fmin. Capture frequency range (fc). ÎÎ The frequency range of the input signal on which the loop will lock if it was initially out of lock. Î Î Depends on low pass filter characteristics fc = fl (see Figure ). fc fl Î Center frequency (f0). ÎÎ The frequency of VCOout, when = / VCO output frequency (f). ÎÎ fmin = (VCO input = ) Î R(C + pf) Note: These equations are intended to be Î Î a design guide. Since calculated component fmax = + fmin (VCO input = ) values may be in error by as much as a Î Î R (C + pf) factor of 4, laboratory experimentation mayî Î Where: 0K R M be required for fixed designs. Part to part frequency variation with identical passive Î Î 0K R M 00pF components is typically less than ± 0%. C.0 µf Î Î Î Figure. Design Information MC4046B 4

5 SOURCE 0 FOLLOWER RSF FREQUENCY f 4 PHSE COMPRTOR OR PCout OR PCout EXTERNL LOW PSS FILTER EXTERNL N COUNTER VCO CI CIB R R CI FREQUENCY Nf = f (a) INPUT R C OUTPUT fc fl R C Typical Low Pass Filters (a) INPUT R R4 C OUTPUT Typically: R4 C 6N fmax N f (R, 000) C 00Nf fmax f = fmax fmin R 4C NOTE: Sometimes R is split into two series resistors each R. capacitor CC is then placed from the midpoint to ground. The value for CC should be such that the corner frequency of this network does not significantly affect ωn. In Figure B, the ratio of R to R4 sets the damping, R4 (0.)(R) for optimum results. Definitions: N = Total division ratio in feedback loop Kφ = /π for Phase Comparator Kφ = /4 π for Phase Comparator KVCO f VCO V for a typical design fr ωn (at phase detector input) 0 ζ Filter n KKVCO NR C N n K KVCO F(s) R C S LOW PSS FILTER Filter B K KVCO n NC (R R4) 0.5 n (R C N K KVCO ) RCS F(s) S(R C R 4 C ) Waveforms PCout Phase Comparator Phase Comparator PCout Note: for further information, see: () F. Gardner, Phase Lock Techniques, John Wiley and Son, New York, 66. () G. S. Moschytz, Miniature RC Filters Using Phase Locked Loop, BSTJ, May, 65. () Garth Nash, Phase Lock Loop Design Fundamentals, N 55, Motorola Inc. (4). B. Przedpelski, Phase Locked Loop Design rticles, R54, reprinted by Motorola Inc. LD Figure. General Phase Locked Loop Connections and Waveforms MC4046B 5

6 OUTLINE DIMENSIONS L SUFFIX CERMIC DIP PCKGE CSE 60 0 ISSUE V T SETING PLNE F 6 8 E G D 6 PL 0.5 (0.00) M T N B S C K L M J 6 PL 0.5 (0.00) M T B S NOTES:. DIMENSIONING ND TOLERNCING PER NSI Y4.5M, 8.. CONTROLLING DIMENSION: INCH.. DIMENSION L TO CENTER OF LED WHEN FORMED PRLLEL. 4. DIMENSION F MY NRROW TO 0.76 (0.00) WHERE THE LED ENTERS THE CERMIC BODY. INCHES MILLIMETERS DIM MIN MX MIN MX B C D E BSC.7 BSC F G 0.00 BSC.54 BSC H K L 0.00 BSC 7.6 BSC M N P SUFFIX PLSTIC DIP PCKGE CSE ISSUE R 6 H 8 G F D 6 PL B S C K 0.5 (0.00) M T SETING T PLNE M J L M NOTES:. DIMENSIONING ND TOLERNCING PER NSI Y4.5M, 8.. CONTROLLING DIMENSION: INCH.. DIMENSION L TO CENTER OF LEDS WHEN FORMED PRLLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLSH. 5. ROUNDED CORNERS OPTIONL. INCHES MILLIMETERS DIM MIN MX MIN MX B C D F G 0.00 BSC.54 BSC H BSC.7 BSC J K L M S MC4046B 6

7 OUTLINE DIMENSIONS DW SUFFIX PLSTIC SOIC WIDE PCKGE CSE 75G 0 ISSUE B D 8X H 0.5 M B M 6 8 E h X 45 NOTES:. DIMENSIONS RE IN MILLIMETERS.. INTERPRET DIMENSIONS ND TOLERNCES PER SME Y4.5M, 4.. DIMENSIONS D ND E DO NOT INLCUDE MOLD PROTRUSION. 4. MXIMUM MOLD PROTRUSION 0.5 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DMBR PROTRUSION. LLOWBLE DMBR PROTRUSION SHLL BE 0. TOTL IN EXCESS OF THE B DIMENSION T MXIMUM MTERIL CONDITION. 6X B B 0.5 M T S B S 4X e T SETING PLNE C L MILLIMETERS DIM MIN MX B C D E e.7 BSC H h L Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. Typical parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. ll operating parameters, including Typicals must be validated for each customer application by customer s technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/ffirmative ction Employer. Mfax is a trademark of Motorola, Inc. How to reach us: US / EUROPE / Locations Not Listed: Motorola Literature Distribution; JPN: Nippon Motorola Ltd.: SPD, Strategic Planning Office, 4, P.O. Box 5405, Denver, Colorado or Nishi Gotanda, Shinagawa ku, Tokyo 4, Japan Customer Focus Center: Mfax : RMFX0@ .sps.mot.com TOUCHTONE SI/PCIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, Motorola Fax Back System US & Canada ONLY Ting Kok Road, Tai Po, N.T., Hong Kong HOME PGE: MC4046B/D 7