SEMICONDUCTOR TECHNICAL DATA

Transcription

1 SEMIONDUTOR TEHNIAL DATA The coists of a phase comparator, a divide by 4, 16, 64 or counter and a programmable divide by N 4 bit binary counter (all positive edge triggered) cotructed with MOS P channel and N channel enhancement mode devices (complementary MOS) in a monolithic structure. The has been designed for use in conjunction with a programmable divide by N counter for frequency synthesizers and phase locked loop applicatio requiring low power dissipation and/or high noise immunity. This device can be used with both counters cascaded and the output of the second counter connected to the phase comparator (TL high), or used independently of the programmable divide by N counter, for example cascaded with a M14569B, M145B or M1456B (TL low). Supply Voltage Range = 3. to 18 V apable of Driving Two Low Power TTL Loads, One Low Power Schottky TTL Load or Two HTL Loads Over the Rated Temperature Range. hip omplexity: 549 ETs or 137 Equivalent ates ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ MAXIMUM RATINS* (Voltages referenced to ) ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Rating Symbol Value Unit D Supply Voltage.5 to + 18 Vdc Input Voltage, All Inputs Vin.5 to +.5 Vdc D Input urrent, per Pin Iin ± madc Power Dissipation, per Package PD 5 mw Operating Temperature Range TA 55 to + 15 Storage Temperature Range Tstg 65 to + * Maximum Ratings are those values beyond which damage to the device may occur. Temperature Derating: Plastic P and D/DW Packages: 7. mw/ rom 65 To 15 eramic L Packages: 1 mw/ rom To 15 BLOK DIARAM L SUIX ERAMI ASE 6 ORDERIN INORMATION M14XXXBP M14XXXBL M14XXXBD Plastic eramic SOI TA = 55 to 15 for all packages. TRUTH TABLE P SUIX PLASTI ASE 648 D SUIX SOI ASE 751B Division Ratio Pin Pin of ounter D The divide by zero state on the programmable divide by N 4 bit binary counter, D, is illegal. Pin 14 (RE.) A B PHASE OMPARATOR 13 1 T T TL HIH TL LOW 1 9 TL 3 = PIN 16 = PIN 8 OUNTER D1 4 BIT PRORAMMABLE OUNTER D DP3 DP DP DP1 T 1 Q1/ Pin 1 P/ D1 D Q1/ Pin 1 P/ D1 D Q1/ REV 3 1/94 MOTOROLA Motorola, Inc MOS LOI DATA 1

2 ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ELETRIAL HARATERISTIS (Voltages Referenced to ) ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ haracteristic Output Voltage Vin = or Vin = or Level 1 Level Input Voltage# Level (VO = 4.5 or.5 Vdc) (VO = 9. or 1. Vdc) (VO = 13.5 or 1.5 Vdc) (VO =.5 or 4.5 Vdc) (VO = 1. or 9. Vdc) (VO = 1.5 or 13.5 Vdc) Output Drive urrent (VOH =.5 Vdc) (VOH = 4.6 Vdc) (VOH = 9.5 Vdc) (VOH = 13.5 Vdc) (VOL =.4 Vdc) (VOL =.5 Vdc) (VOL = 1.5 Vdc) 1 Level Source Sink Symbol VOL 5. VOH 5. VIL VIH IOH Vdc Min Max Min Typ # Max Min Max Unit IOL Input urrent Iin ±.1 ±.1 ±.1 ±1. µadc Input apacitance in p Quiescent urrent (Per Package) Vin = or, Iout = µa Total Supply urrent** (Dynamic plus Quiescent, Per Package) (L = 5 p on all outputs, all buffers switching) Three State Leakage urrent Pi 1, 13 #Noise immunity for worst input combination. IDD 5. IT 5. Noise Margin for both 1 and level = 1. V = 5. V =. V = V =.5 V = V To calculate total supply current at loads other than 5 p: IT(L) = IT(5 p) + 1 x 3 (L 5) f where: IT is in µa (per package), L in p, in V, and f in khz is input frequency. ** The formulas given are for the typical characteristics only at 5. Pin is connected to or for input voltage test IT = (. µa/khz) f + IDD IT = (.4 µa/khz) f + IDD IT = (.9 µa/khz) f + IDD Vdc Vdc Vdc Vdc madc madc µadc µadc ITL ±.1 ±.1 ±.1 ±3. µadc PIN ASSINMENT Q1/ 1 16 TL 3 14 Pin DP DP 5 1 DP1 6 DP MOTOROLA MOS LOI DATA

3 ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ SWITHIN HARATERISTIS (L = 5 p, TA = 5 ) ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ haracteristic Symbol Output Rise Time ttlh 5. Output all Time tthl 5. Minimum Pulse Width, 1, Q1/, or Pin Input twh 5. Maximum lock Rise and all Time, 1, Q1/, or Pin Input PHASE OMPARATOR ttlh, tthl V Min Typ Max Unit Input Resistance Rin 5. to 6 MΩ Input Seitivity, dc oupled 5. to See Input Voltage Turn Off Delay Time, and Outputs Turn On Delay Time. and Outputs DIVIDE BY 4, 16, 64 OR OUNTER (D1) Maximum lock Pulse requency Division Ratio = 4, 64 or 5. tphl 5. tplh 5. Division Ratio = Propagation Delay Time, Q1/ Output Division Ratio = 4, 64 or fcl 5. tplh, tphl 5. Division Ratio = PRORAMMABLE DIVIDE BY N 4 BIT OUNTER (D) Maximum lock Pulse requency (igure 3a) Turn On Delay Time, Output (igure 3a) Turn Off Delay Time, Output (igure 3a) fcl 5. tplh 5. tphl 5. Minimum Preset Enable Pulse Width twh() µs MHz MHz MOTOROLA MOS LOI DATA 3

4 PULSE ENERATOR 1 PULSE ENERATOR TL DP DP1 DP DP3 Pin 1 Q1/ SWITHIN TIME TEST IRUITS AND WAVEORMS L k L out RE B Pin P1 A A LAS B, IS LOW. 5% tplh igure 1. Phase omparator A LEADS B, IS HIH. tthl 9% 5% % 9% tplh % tphl ttlh tphl THREE STATE THREE STATE 75% 5% tphl tplh tw(pin) tplh VOH VOL PULSE ENERATOR TL DP DP1 DP DP3 Pin 1 Q1/ L 1 % Q1/ % 5% 9% 9% 5% ttlh tw(1) tphl tthl fin fmax igure. ounter D1 PULSE ENERATOR DP DP1 DP DP3 Q1/ Pin 1 TL PULSE ENERATOR 1 PULSE ENERATOR DP DP1 DP DP3 Q1/ Pin 1 TL L L N PULSES* Q1/ % tplh ttlh 4 % 9% 5% 9% 5% tphl tthl tw(q1/) fin fmax Q1/ = P 1 = P 5% 9% 5% % tw() * N is the value programmed on the DP Inputs. a. b. igure 3. ounter D MOTOROLA MOS LOI DATA

5 LOI DIARAM 14 Pin A 13 B (RE.) D Q D Q Q 9 1 OUNTER D1 1 Q1/ TL 3 OUNTER D Q D = PIN 16 = PIN DP3 DP DP1 DP MOTOROLA MOS LOI DATA 5

6 Typical Maximum requency Divider D1 Division ratios: 4, 64 or (L = 5 p) Typical Maximum requency Divider D1 Division ratio: 16 (L = 5 p) = V f, REQUENY (MHz) = V = V = 5 V f, REQUENY (MHz) = V T, TEMRATURE ( ) Typical Maximum requency Divider D Division ratio: (L = 5 p) T, TEMRATURE ( ) = 5 V f, REQUENY (MHz) = V = V = 5 V T, TEMRATURE ( ) MOTOROLA MOS LOI DATA

7 ORATIN HARATERISTIS The contai a phase comparator, a fixed divider ( 4, 16, 64, ) and a programmable divide by N 4 bit counter. PHASE OMPARATOR The phase comparator is a positive edge controlled logic circuit. It essentially coists of four flip flops and an output pair of MOS traistors. Only one of its inputs (Pin, pin 14) is accessible externally. The second is connected to the output of one of the two counters D1 or D (see block diagram). Duty cycles of both input signals (at A and B) need not be taken into coideration since the comparator responds to leading edges only. If both input signals have identical frequencies but different phases, with signal A (pin 14) leading signal B (Ref.), the comparator output will be high for the time equal to the phased difference. If signal A lags signal B, the output will be low for the same time. In between, the output will be in a three state condition and the voltage on the capacitor of an R filter normally connected at this point will have some intermediate value (see igure 4). When used in a phase locked loop, this value will adjust the Voltage ontrolled Oscillator frequency by reducing the phase difference between the reference signal and the divided VO frequency to zero. A (Pin) B (RE.) 1/f VOH VOL VOH VOL VOH VOL igure 4. Phase omparator Waveforms If the input signals have different frequencies, the output signal will be high when signal B has a lower frequency than signal A, and low otherwise. Under the same conditio of frequency difference, the output will vary between VOH (or VOL) and some intermediate value until the frequencies of both signals are equal and their phase difference equal to zero, i.e. until locked condition is obtained. apture and lock range will be determined by the VO frequency range. The comparator is provided with a lock indicator output, which will stay at logic 1 in locked conditio. The state diagram (igure 5) depicts the internal state traitio. It assumes that only one traition on either signal occurs at any time. It shows that a change of the output state is always associated with a positive traition of either signal. or a negative traition, the output does not change state. A positive traition may not cause the output to change, this happe when the signals have different frequencies. DIVIDE BY 4, 16, 64 OR OUNTER (D1) This counter is able to work at an input frequency of 5 MHz for a value of volts over the standard temperature range when dividing by 4, 64 and. Programming is accomplished by use of inputs and (pi and ) according to the truth table shown. onnecting the ontrol input (TL, pin ), to allows cascading this counter with the programmable divide by N counter provided in the same package. Independent operation is obtained when the ontrol input is connected to. The different division ratios have been chosen to generate the reference frequencies corresponding to the channel spacings normally required in frequency synthesizer applicatio. or example. with the division ratio and a 5 MHz crystal stabilized source a reference frequency of 5 khz is supplied to the comparator. The lower division ratios permit operation with low frequency crystals. INPUT STATE X X A B (LOK DETET) 3 STATE OUTPUT DISONNETED 1 1 igure 5. Phase omparator State Diagram MOTOROLA MOS LOI DATA 7

8 If used in cascade with the programmable divide by N counter, practically all usual reference frequencies, or channel spacings of 5,, 1.5,, 6.5 khz, etc. are easily achievable. PRORAMMABLE DIVIDE BY N 4 BIT OUNTER (D) This counter is programmable by using inputs DP... DP3 (pi ). The Preset Enable input enables the parallel preset inputs DP... DP3. The output must be externally connected to the input for single stage applicatio. Since there is not a cascade feedback input, this counter, when cascaded, must be used as the most significant digit. Because of this, it can be cascaded with binary counters as well as with BD counters (M14569B, M145B, M1456B). TYPIAL APPLIATIONS fin M14569B ZERO DETET M145B Q4 OR M1456B M145B Q4 OR M1456B Q1/ DP DP3 DP DP3 DP DP3 LSD MSD fout igure 6. ascading and M145B or M1456B with M14569B (4 khz) Pin 1 TI Q1/ VO fout ( MHz) DP DP3 M14 Q M14569B ZERO DETET k MIXER requencies shown in parenthesis are given as an example. M RYSTAL OSILLATOR igure 7. requency Synthesizer with and M14569B Using a Mixer (hannel Spacing khz) (143.5 MHz) 8 MOTOROLA MOS LOI DATA

9 (5 MHz) () Pin 1 TL VO fout DP DP3 M145B Q M14569B ZERO DETET (BD) BINARY DP DP3 N1 ( 5) (65 khz STEPS) N ( 9) (6.5 khz STEPS) N3 (, 4, 8, 1) (6.5 khz STEPS) Divide ratio = 16N1 + 16N + N3 Example: fout = N1 (MHz) + N (x khz) + N3 (x5 khz) requency range = 5 MHz hannel spacing = 5 khz Reference frequency = 6.5 khz igures shown in parenthesis refer to example. Recommended reading: (1) AN535: Phase Lock Techniques () AR54: Phase Locked Loop Design Articles igure 8. requency Synthesizer Using, M14569B and M145B (Without Mixer) MOTOROLA MOS LOI DATA 9

10 TO 455 khz I REEIVER SEOND MIXER.695 MHz REEIVER IRST MIXER R AMP LOK DETETOR REERENE OSILLATOR 8 64 φ D LOOP LOW PASS ILTER N.4 MHz X3 N = 91 1 (55) MHz khz (.55) MHz NOTE: 1. khz hannel Spacing. Expandable to 165 hannels (Expanded frequency range shown in parenthesis) V DD TRX N M1456B OSILLATOR (TRASMIT ONLY) DOWN MIXER RV.695 MHz (8.65) MHz (17.9) MHz VO MIXER TO TRANSMITTER (8.65) MHz igure 9. Typical 3 hannel B requency Synthesizer for Double onversion Traceivers MOTOROLA MOS LOI DATA

11 OUTLINE DIMENSIONS L SUIX ERAMI DIP PAKAE ASE 6 ISSUE V T SEATIN PLANE A E D 16 PL.5 (.) M T N B A S K L M J 16 PL.5 (.) M T B S NOTES: 1. DIMENSIONIN AND TOLERANIN R ANSI Y14.5M, ONTROLLIN DIMENSION: INH. 3. DIMENSION L TO ENTER O LEAD WHEN ORMED PARALLEL. 4. DIMENSION MAY NARROW TO.76 (.3) WHERE THE LEAD ENTERS THE ERAMI BODY. INHES MILLIMETERS DIM MIN MAX MIN MAX A B D E.5 BS 1.7 BS BS.54 BS H K L.3 BS 7.6 BS M N P SUIX PLASTI DIP PAKAE ASE ISSUE R 16 H A D 16 PL B S K.5 (.) M T SEATIN T PLANE A M J L M NOTES: 1. DIMENSIONIN AND TOLERANIN R ANSI Y14.5M, ONTROLLIN DIMENSION: INH. 3. DIMENSION L TO ENTER O LEADS WHEN ORMED PARALLEL. 4. DIMENSION B DOES NOT INLUDE MO LASH. 5. ROUNDED ORNERS OPTIONAL. INHES MILLIMETERS DIM MIN MAX MIN MAX A B D BS.54 BS H.5 BS 1.7 BS J K L M S MOTOROLA MOS LOI DATA

12 OUTLINE DIMENSIONS D SUIX PLASTI SOI PAKAE ASE 751B 5 ISSUE J T SEATIN PLANE A D 16 PL K B P 8 PL.5 (.) M B S.5 (.) M T B S A S M R X 45 J NOTES: 1. DIMENSIONIN AND TOLERANIN R ANSI Y14.5M, ONTROLLIN DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INLUDE MO PROTRUSION. 4. MAXIMUM MO PROTRUSION. (.6) R SIDE. 5. DIMENSION D DOES NOT INLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE.17 (.5) TOTAL IN EXESS O THE D DIMENSION AT MAXIMUM MATERIAL ONDITION. MILLIMETERS INHES DIM MIN MAX MIN MAX A B D BS.5 BS J K M 7 7 P R Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation coequential or incidental damages. Typical parameters which may be provided in Motorola data sheets and/or specificatio can and do vary in different applicatio and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. Motorola does not convey any licee under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applicatio intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless agait all claims, costs, damages, and expees, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. How to reach us: USA/EURO/Locatio Not Listed: Motorola Literature Distribution; JAPAN: Nippon Motorola Ltd.; Tatsumi SPD J, 6 Seibu Butsuryu enter, P.O. Box 91; Phoenix, Arizona or Tatsumi Koto Ku, Tokyo 135, Japan MAX: RMAX@ .sps.mot.com TOUHTONE ASIA/PAII: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, INTERNET: NET.com 51 Ting Kok Road, Tai Po, N.T., Hong Kong MOTOROLA MOS LOI /D DATA