DDR2 x16 Hardware Implementation Utilizing the Intel EP80579 Integrated Processor Product Line
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1 Utilizing the Intel EP80579 Integrated Processor Product Line Order Number: US
2 Legal Lines and Disclaimers INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Intel products are not intended for use in medical, life saving, life sustaining, critical control or safety systems, or in nuclear facility applications. Intel may make changes to specifications and product descriptions at any time, without notice. Designers must not rely on the absence or characteristics of any features or instructions marked reserved or undefined. Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. The information here is subject to change without notice. Do not finalize a design with this information. The products described in this document may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request. Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order. Copies of documents which have an order number and are referenced in this document, or other Intel literature, may be obtained by calling , or by visiting Intel s Web Site. [When the doc contains software source code, include a copy of the software license or a hyperlink to its permanent location.] Intel processor numbers are not a measure of performance. Processor numbers differentiate features within each processor family, not across different processor families. See for details. Code Names are only for use by Intel to identify products, platforms, programs, services, etc. ( products ) in development by Intel that have not been made commercially available to the public, i.e., announced, launched or shipped. They are never to be used as commercial names for products. Also, they are not intended to function as trademarks. BunnyPeople, Celeron, Celeron Inside, Centrino, Centrino logo, Core Inside, FlashFile, i960, InstantIP, Intel, Intel logo, Intel386, Intel486, Intel740, IntelDX2, IntelDX4, IntelSX2, Intel Core, Intel Inside, Intel Inside logo, Intel. Leap ahead., Intel. Leap ahead. logo, Intel NetBurst, Intel NetMerge, Intel NetStructure, Intel SingleDriver, Intel SpeedStep, Intel StrataFlash, Intel Viiv, Intel vpro, Intel XScale, Itanium, Itanium Inside, MCS, MMX, Oplus, OverDrive, PDCharm, Pentium, Pentium Inside, skoool, Sound Mark, The Journey Inside, VTune, Xeon, and Xeon Inside are trademarks of Intel Corporation in the U.S. and other countries. *Other names and brands may be claimed as the property of others. Copyright 2008, Intel Corporation. All rights reserved. 2 Order Number: US
3 Contents 1.0 Introduction Purpose Related Documents Intel EP80579 Memory Controller Features DDR2 (x8) Addressing DDR2 (x16) Design Considerations EP80579 DDR2 Configurations DDR2 x8 and x16 Memory Addressing Hardware Constraints Firmware Implications...9 Figures No Figures Used At This Time. Tables 1 Related Documents Supported DRAM Capacity for 64b Mode MB Addressing MB Addressing GB Addressing GB Addressing...8 Order Number: US 3
4 Revision History Date Revision Description 002 Updated Table 2 through Table 6. August Initial Release. 4 Order Number: US
5 1.0 Introduction 1.1 Purpose The Intel EP80579 Integrated Processor Product Line (EP80579) integrates a single-channel DDR2 system memory controller with a single 64-bit wide bus interface. The memory controller provides support for 2 ranks, unbuffered or registered DDR2 configurations, operating at DDR2-400/533/667/800 MT/s speed rates. The EP80579 is designed to support 256Mb, 512Mb, 1Gb and 2Gb density memory parts in the x8 configuration. The objective of this application note is to provide board designers the guidelines to use discreet x16 DDR2 memory devices on EP80579-based platforms to conserve board space. Note: This document is intended for advice only. This document suggests a possible way to connect x16 DDR2 devices to the EP The EP80579 was designed only to support x8 DDR2 devices. The guidance and information in this document have not been validated, and Intel does not intend to validate nor support these recommendations. 1.2 Related Documents Table 1. Related Documents Document Title Document Number Intel EP80579 Integrated Processor Product Line Datasheet Intel EP80579 Integrated Processor Product Line Platform Design Guide Intel EP80579 Memory Controller Features The EP80579 memory controller supports the following features: Supports DDR2 single rank (64- or 32-bit mode) or dual rank (64-bit mode) memory configurations Supports DDR2-400/533/667/800 MT/s speed rates Supports unbuffered and registered DIMMs and SODIMMs Supports discrete memory components soldered on the board Supports 256Mb, 512Mb, 1Gb and 2Gb density parts in the x8 configuration. Supports Error Correction Code (ECC); single-bit correct/double-bit detect (SEC/DED) modes. Supports 4-bank devices 256Mb and 512Mb DDR2 parts Supports 8-bank devices. 1Gb and 2Gb DDR2 parts Supports 1KB page size Order Number: US 5
6 3.0 DDR2 (x8) Addressing The Intel EP80579 Integrated Processor Product Line Datasheet provides a list of memory densities and addressing of x8 memory configurations supported by EP As stated above, the memory controller requires that the 256Mb and 512Mb density parts to be 4-bank configured, while the 1Gb and 2Gb density parts are 8-bank configured. Since the bank (bank addressing) and page size (column addressing) are specified for the supported memory densities, the row addressing, and thereby the structural architecture of the memories are also implicitly defined. For instance, the x8, 4-bank, 256Mb memory is only addressed as follows: Bank Address = BA0 - BA1 (4 banks) Column Address = A0 - A9 (1K page size) Row Address = A0 - A12 (8K) 4.0 DDR2 (x16) Design Considerations Although the EP80579 has been designed for and validated with x8 memory configuration only, it is possible to select x16 memory parts that behave exactly like x8 memory devices. DDR2 x16 memories is used, when and only when, the x16 memory configuration addressing adheres identically to the bank, row, and column addressing of the x8 memory configurations for the memory densities, as specified in the Intel EP80579 Integrated Processor Product Line Datasheet. The conformity of the addressing between the two configurations enables the x16 configuration to be viewed by the EP80579 as an x8 configuration differentiated only by capacity. 5.0 EP80579 DDR2 Configurations Table 2 shows the various memory capacities supported by EP80579 in a 64b bus width mode in the x8 and x16 configuration. The table assumes a 64-bit bus and no Error Correction. However, all configurations are used to support 32-bit bus designs. The first column shows the total DRAM capacity on the channel. The rest of the columns indicate the DRAM devices features, technologies, densities and the number of devices required to achieve the given capacity. The table assumes single rank configurations only. The number of devices double in dual-rank configuration designs. For dual-rank configurations, the minimum capacity supported by EP80579 is 256MB and the maximum capacity supported is 4GB. Table 2. Supported DRAM Capacity for 64b Mode Total DRAM Capacity DRAM Part Technology x8 Devices Total # of parts (w/o ECC) DRAM Part Technology x16 Devices Total # of parts (w/o ECC) 256MB 256Mb x Mb x MB 512Mb x8 8 1Gb x16 4 1GB 1Gb x8 8 2Gb x16 4 2GB 2Gb x8 8 4Gb x Order Number: US
7 6.0 DDR2 x8 and x16 Memory Addressing Table 3, Table 4, Table 5, and Table 6, show the DRAM device addressing for the various DDR2 device densities supported by EP The tables also show the addressing conformity requirements for the x8 and x16 memory configurations. Please note, that for a given memory capacity, the DRAM technology required for x16 designs is twice the density required for x8 designs. Note: Table 3. Memory configuration = (Bank Density) x (# of Banks) x (Part Width) 256MB Addressing Parameter DDR2 x8 DDR2 x16 Total DRAM Capacity 256MB 256MB DRAM Technology 256Mb x8 512Mb x16 Configuration 8Mb x 4 x 8 8Mb x 4 x 16 Bank Density 8Mb 8Mb # of Banks 4 4 Part Width x8 x16 # of Parts 8 4 Page Size 1KB 1KB Example Part Number MT47H32M8 (Micron 256MbDDR2) MT47H32M16 (Micron 512MbDDR2) Bank Address BA0, BA1 (4) Column Address Row Address A0-A9 (1K) A0-A12 (8K) Table MB Addressing Parameter DDR2 x8 DDR2 x16 Total DRAM Capacity 512MB 512MB DRAM Technology 512Mb x8 1Gb x16 Configuration 16Mb x 4 x 8 16Mb x 4 x 16 Bank Density 16Mb 16Mb # of Banks 4 4 Part Width x8 x16 # of Parts 8 4 Page Size 1KB 1KB Example Part Number MT47H64M8 (Micron 512MbDDR2) Note: No manufactured 1Gb x16 (with 4-bank) memory part is identified that conforms to x8 addressing configuration. Bank Address BA0, BA1 (4) Column Address Row Address A0-A9 (1K) A0-A13 (16K) Order Number: US 7
8 Table 5. 1GB Addressing Parameter DDR2x8 DDR2x16 Total DRAM Capacity 1GB 1GB DRAM Technology 1Gb x8 2Gb x16 Configuration 16Mb x 8x 8 16Mb x 8 x 16 Bank Density 16Mb 16Mb # of Banks 8 8 Part Width x8 x16 # of Parts 8 4 Page Size 1KB 1KB MT47H128M8 Example Part Number (Micron 1GbDDR2) Bank Address BA0 - BA2 (8) MT47H128M16 (Micron 2GbDDR2) Column Address Row Address A0-A9 (1K) A0-A13 (16K) Table 6. 2GB Addressing Parameter DDR2 x8 DDR2 x16 Total DRAM Capacity 2GB 2GB DRAM Technology 2Gb x8 4Gb x16 Configuration 32Mb x 8x 8 32Mb x 8 x 16 Bank Density 32Mb 32Mb # of Banks 8 8 Part Width x8 x16 # of Parts 8 4 Page Size 1KB 1KB Example Part Number MT47256M8 (Micron 2GbDDR2) Note: No manufactured 4Gb x16 memory part is identified that conforms to the x8 addressing configuration. Bank Address BA0-BA2 (8) Column Address Row Address A0-A9 (1K) A0-A14 (32K) 8 Order Number: US
9 7.0 Hardware Constraints Table 3, Table 4, Table 5, and Table 6 show that, for x16 memory designs, the EP80579 supports only 256MB and 1GB total memory capacity configurations. This constraint is based primarily to the fact that there are no identified manufactured parts for 512MB and 2GB x16 memory capacities which provide the addressing conformity between both the x8 and x16 memory configurations. 8.0 Firmware Implications No impact. Order Number: US 9
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