Quasi Resonant DC Link Converters


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1 Quasi Resonant DC Link Convetes Analysis and Design fo a Battey Chage Application Pe Kalsson Lund 1999
2 Cove pictue Measuement of the esonant link voltage fo the quasi esonant DC link battey chage implemented. See futhe page 159. Depatment of Industial Electical Engineeing and Automation (IEA) Lund Institute of Technology (LTH) P.O. Box 118 S1 LUND SWEDEN ISBN CODEN:LUTEDX/(TEIE1)/116/(1999) 1999 Pe Kalsson Pinted in Sweden by Univesitetstyckeiet, Lund Univesity Lund 1999 ii
3 Abstact Envionmental aspects have duing the last yeas made electic vehicles an inteesting competito to the pesent intenal combustion engine diven vehicles. Fo a boad intoduction of pue electic vehicles, a battey chaging infastuctue is deemed necessay. Howeve, to build and maintain such an infastuctue is costly. Active powe line conditioning capabilities could be included in the battey chage, making the infastuctue advantageous fom the distibution netwok point of view. Anothe option is that the battey chage could be able to suppot the gid with peak powe duing peiods of stability poblems o emegency situations. This means that enegy is boowed fom the batteies of vehicles connected to a chage. The pice fo enegy supplied by the batteies is likely to be seveal times highe than the nomal electic enegy pice, due to the wea costs of the batteies. Theefoe, the battey chage losses also epesents a high cost. It is often stated that esonant convetes have a high efficiency compaed to had switched. Since caie based pulse width modulation is employed, quasi esonant DC link convetes ae of inteest. Fou of the most pomising quasi esonant DC link topologies epoted in the liteatue ae compaed. A fai compaison is obtained by designing them to meet cetain common design citeia, in this case the duation of the zeo voltage inteval and the maximum output voltage time deivative. The deivation of the design expessions ae given, and also the simulation esults, by means of efficiency. A 1 kw battey chage, equipped with one of the quasi esonant DC links investigated is implemented. A had switched battey chage with the same ating is also tested to compae the measued efficiency with the simulated. Both the simulations and measuements shows that the efficiency decease fo quasi esonant battey chages compaed to the had switched case. Futhemoe, low fequency hamonics appea in the battey chage input and output cuents. Howeve, full contol of the output voltage deivatives is obtained.
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5 Acknowledgements Fist of all I would like to thank my fiend and oommate Matin Bojup, who also is the pefect poject companion. Togethe, we have spent many late evenings in the laboatoy, testing battey chages. I also would like to expess my sincee gatitude to my supevisos, Pofesso Mats Alaküla and Pofesso Las Getma. Thei suppot and encouagement have been to geat help along the way. Las Getma also has pomoted seveal valuable contacts, which is stongly appeciated. The steeing committee also consists of the extenal membes Andes Lasson, Volvo Technological Development, and Ulf Thoén, Sydkaft AB. Besides the inteesting discussions held at the committee meetings, they neve hesitate to answe questions o give a helping hand, which of couse is geatly acknowledged. I am also vey gateful to all my colleagues and the staff of IEA, who makes the wok enjoyable. Special thanks to Getachew Dage and Bengt Simonsson fo thei help egading pactical issues. Bengt Simonsson has a lot of valuable contacts which lowes the costs and shotens delivey times. Special thanks also to D Ulf Jeppsson, fo maintaining the UNIXsystem, with the softwaes SABER and ACE. I am also vey thankful to the ecently etied Associate Pofesso at IEA, Stig Lindquist, who bought me to the depatment as a laboatoy assistant in I thank my paents fo thei love, suppot and tust. I also thank my fiends back in Helsingbog, fo thei suppot. This wok is pat of the poject Battey Chages fo Electic Vehicles which has been financially suppoted by Elfosk AB as a poject unde the Elekta eseach and development pogam. This suppot is gatefully acknowledged. Pe Kalsson
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7 Contents 1 Intoduction Backgound Fast chaging Chage infastuctue Battey chage topology Resonant convetes Outline of the thesis... 5 Resonant convetes 7.1 The RCD chagedischage snubbe Load esonant convetes The esonant DC link convete Quasi esonant DC link convetes Analysis and design of quasi esonant DC link convetes The passively clamped two switch quasi esonant cicuit The passively clamped one switch quasi esonant cicuit The paallel quasi esonant cicuit The actively clamped quasi esonant cicuit Devices fo esonant convetes Powe diodes IGBTs Inductive elements Capacitos...11
8 Contents 5 Simulation Geneal simulation model Simulation of the two switch passively clamped quasi esonant DC link Simulation of the one switch passively clamped quasi esonant DC link Simulation of the paallel quasi esonant DC link Simulation of the actively clamped quasi esonant DC link Simulation conclusions Implementation Powe electonic main cicuit Quasi esonant DC link contolle Measuements Conclusions Results Futue wok Refeences 167 A Modulation 175 A.1 Caie based PWM A. Discete pulse modulation B Contol 181 B.1 Battey side cuent contolle B. AC side vecto cuent contolle...18 B.3 DC link voltage contolle C Diffeential equations 187 C.1 Method C. Application to the esonant DC link convete C.3 Integation of the voltage equation D Inducto design 197 D.1 Inductance D. Inducto coe size selection D.3 Inducto design example...1 viii
9 1 Intoduction This chapte intoduces electic vehicles and battey chages fo electic vehicles. Then, an intoduction to the investigated concept is povided. Finally an oveview of the thesis is given. 1.1 Backgound Envionmental aspects have made electic vehicles (EVs) an inteesting challenge of the pesent Intenal Combustion Engine (ICE) diven vehicles. Pesent electical dives offes a eliable and envionmentally sustainable solution to the pollution poblems caused by the ICE diven vehicles. Almost all of the commecial automobile companies do indeed have a poduct ange that also coves EVs. Anyway, today thee is only a limited use of EVs fo pesonal taffic. In Sweden, most of the EVs ae used fo community puposes such as postal delivey. Howeve, also in these cases the EVs constitutes only a mino pat of the vehicle fleet of these companies. The main poblem with EVs is that the batteies limit the maximum diving ange, since pesent electochemical batteies do have a by fa lowe enegy to weight atio than gasolin. Pesent EVs ae equipped with an onboad battey chage. The onboad chage nomally has a athe low powe ating, since it is pimaily intended fo nighttime battey chaging at the ownes esidence. Usually, Swedish households ae equipped with 16 A fuses, which limits the chaging powe to appoximately 1 kw. Today, this poblem can be solved by the use of electohybid systems, wee an ICE is mechanically connected to an electical geneato chaging the vehicle batteies. Some of these electical hybid vehicles (EHVs) also uses a pat of the enegy geneated by the ICE fo taction of the vehicle [38]. The idea is to chage the batteies when diving outside city aea. The chaging stategy can be optimised in such a way that the ICE is contolled to give minimum emissions o to minimise the fuel
10 1. Intoduction consumption o othe citeia [1]. Howeve it is obvious that the pollution poblem is only deceased, not eliminated by such a solution. 1. Fast chaging As peviously mentioned, pesent EVs ae equipped with onboad battey chages, but in ode to be able to compete with the ICE diven vehicles by means of daily diving ange, a fast chaging infastuctue is needed. Thee ae howeve poblems with the building of a fast chage infastuctue as well. Fist, the cost of chages is high and second, designs based on diode o thyisto technology could esult in cuent hamonics and voltage distotion [49]. Instead of diode o thyisto technology, fully contollable semiconducto devices, i.e. powe tansistos, should be used. Tansisto equipped voltage souce convetes (VSCs) ae often used fo eliably opeating speed contol of electical dives. The tansistos ae contolled by pulse width modulation (PWM) which gives a well defined output cuent spectum [44]. If PWM contolled VSCs ae used fo battey chages, the poblem of gid fequency elated distotion can be cicumvented. Howeve, the cost of the chages and contolles inceases since they become moe complicated. Anyway, a boad intoduction of electic vehicles opens a new maket fo the powe semiconducto industy which pobably esults in a lowe pice fo these devices. In [36] it is stated that fast chaging should be avoided in uban aeas due to the fact that the deegulation of the powe distibution maket has esulted in etiement of seveal enegy plants neaby cities, since it is cheape to buy powe than to un these plants. The electical powe bought on the maket is geneated at lage hydo o nuclea powe plants, which esults in a low pice. The poblem is that stability poblems might aise since such plants usually ae located fa away fom uban aea. Fast chaging futhe inceases this poblem since the loading of the tansmission lines becomes heavie, at all times duing the day, thus esulting in highe peak powe demands. 1.3 Chage infastuctue One way to cope with the poblem of the initial high cost of the chaging infastuctue, is to make it advantageous both fo the powe deliveing company and fo the EV ownes. It was peviously mentioned that a
11 1. Intoduction battey chage using a diode o thyisto based gid inteface usually consumes nonsinusoidal cuent and thus injects hamonics into the gid. If a battey chage infastuctue is built solely on such chages thee would typically be poblems like themal oveloading of tansfomes and shunt capacitos [39]. Futhemoe, malfunction of equipment sensitive to distubances is going to be a poblem [39], [5]. If, on the othe hand, battey chages with a powe tansisto gid inteface ae used, they can be contolled to inject o consume cuents of abitay wavefom. This means that the powe gid inteface can be used to consume hamonics in ode to cancel hamonics injected by othe loads. Also, eactive powe can be geneated o consumed by such a powe gid inteface. Single phase loads can be compensated fo, which means that the cuent can be contolled in a manne wee the highe voltage levels will expeience the lowe as consuming a balanced, hamonic fee thee phase cuent with powe facto equal to one. These featues foms what usually is called an active powe line conditione o active filte [4], [37]. Thee is one futhe possibility of such a system, which might be slightly povocative; the battey chage can be used to delive powe fom the batteies back to the powe gid. This is not likely to be used fo the high powe chaging stations (gas station countepat) except at emegency situations like duing powe system stability poblems. This is due to the fact that, at the chaging station the EV should be chaged as fast as possible, without any delays, o thee might be an queue situation. Fo low powe battey chages at paking lots o office buildings etc., this active powe capability can be inteesting. At such places thee will be occasions when the vehicle is connected to the battey chage fo longe time than it takes to chage its batteies. Fo these occasions, an ageement between the EV owne and the payment system of the battey chage can be set. Fo instance, the ageement can say that the batteies might be dischaged duing the day but at a cetain time they should be chaged to a cetain level and the chaging enegy pice should be educed to a cetain level. Dischaging the batteies shotens thei lifetime which can be costly fo the EV owne. This can be solved by a leasing ageement whee the powe deliveing company owns the batteies, and the EV owne leases the batteies. The ageement pocedue indicated above esults in no futhe complexity, since a payment system is needed anyway [39]. The payment system is based on communication between the battey management system (BMS) of the EV, the battey chage and a supevisoy unit 3
12 1. Intoduction which is needed both fo billing and fo opeation of the battey chage as an active powe line conditione. 1.4 Battey chage topology A wide vaiety of diffeent convete topologies used fo battey chages do indeed exist. Howeve, in ode to meet the capabilities stated in the pevious section, the ange of cicuits is educed. Since this is a, fom powe electonic point of view, low to medium powe application a voltage souce convete is consideed. The eason fo this is that most tansisto valves fo this powe ange ae designed fo voltage souce convetes. Also, the simplicity of the voltage souce convete compaed to the cuent souce convete (CSC) is an advantage. In Figue 1.1 a voltage souce battey chage is shown. Hee, the chage is connected to the powe gid via a LCLfilte. The line side stage of the battey chage is a thee phase voltage souce convete, acting as a contolled ectifie. The capacito C dc is efeed to as the DC link capacito, poviding the voltage souce featue. On the battey side, a half bidge convete is used to contol the chaging cuent fed to the vehicle batteies, via anothe LCLfilte. 3Φ 4 V 5 Hz V dc C dc V batt Figue 1.1 Voltage souce battey chage. Note that the line and battey side filtes ae composed fom LCLcombinations, foming thid ode filtes. The advantages of LCLfiltes compaed to the nomally used Lfiltes ae thooughly discussed in [4]. In Appendix D.3 design of a LCLfilte inducto fo a 75 kw battey chage accoding to Figue 1.1, implemented in [3], is discussed. 1.5 Resonant convetes A consequence of the peviously mentioned active powe delivey capability is that the efficiency of the battey chage becomes vey impotant, since the enegy pice fo enegy deliveed fom the batteies to the powe gid becomes consideably highe than the nomal enegy pice, due to the wea cost of the batteies. It is often stated in the 4
13 1. Intoduction liteatue [5], [13], [14], [3], that an inceased efficiency can be achieved by using a esonant convete which povides educed switching losses at the expense of an inceased numbe of passive and in some cases also active devices. Futhemoe, it is often pointed out that the device stess fo the active devices ae educed fo esonant convetes [16], [8], [3]. Thee ae seveal diffeent types of esonant convetes but the basic idea is that that the switch state should be changed only at low voltage acoss o at low cuent though the semiconducto devices, thus esulting in educed switching losses. The ising and falling edges of these quantities can also be contolled to educe intefeence poblems. Fo esonant powe convetes with low semiconducto device count, the esonant cicuit is often compised patly by the load [8], [3], [3], [35], [45], [59]. Hee, these ae efeed to as load esonant convetes. Fo bidge applications on the othe hand, often one esonant cicuit, inseted in between the passive enegy stoage device and the semiconducto bidge, is used to seve the entie bidge. This type of esonant convetes ae efeed to as esonant DC link convetes [13], [14], [], [3], [43], [46], [47]. Fo the basic esonant convetes the possible switching instants, i.e. when low device voltage o cuent is obtained, cannot be contolled. This means that caie based PWM cannot be used fo this type of convetes. Only a subclass of the esonant convetes can be tigged on demand, efeed to as quasi esonant convetes [1], [], [7], [9], [11], [15], [19], [41], [55], [56]. Fo a quasi esonant convete, the oscillation is inteupted in between two consecutive switching instants and is only stated when a change of convete switch state is commanded. Fo a battey chage with active powe line conditioning capabilities, caie based PWM is pefeed due to its well known output cuent spectum [44]. This means that if esonant powe convete technology is to be used, quasi esonant DC link convetes ae the most inteesting. 1.6 Outline of the thesis In Chapte, basic popeties of soft switching ae discussed, stating fom capacitive snubbes. The design expessions fo quasi esonant DC link convete passive component selection ae developed in Chapte 3. The design expessions ae deived though thoough mathematical analysis of fou diffeent quasi esonant DC links. In Chapte 4, powe electonic semiconducto devices in soft switching applications ae 5
14 1. Intoduction eviewed. Also, the simulation passive component models used in Chapte 5 ae discussed. In Chapte 5, battey chages equipped with the quasi esonant DC links investigated, ae simulated. The quasi esonant convetes simulated, ae designed to have equal popeties, at least in some aspects. The simulations ae intended to veify the design expessions and also fo calculation of the efficiency of the diffeent battey chages. In Chapte 6, one of the simulated battey chages is implemented and tested. Chapte 7 concludes the thesis. Note that this thesis is one of two, evolved fom the battey chage poject. The accompanying thesis [4], teats contol and functional aspects of the battey chage, while this thesis focuses on hadwae elated aspects. 6
15 Resonant convetes The pesent esonant convete topologies do indeed exist in a wide vaiety of foms. Howeve, they all oiginate fom attempts to avoid simultaneously high voltage acoss and high cuent though the semiconducto devices when the device taveses fom conducting to blocking state o vice vesa. Anothe advantage of esonant convetes often addessed in the liteatue, is the ability to contol the time deivative of the voltage and/o the cuent. On the othe hand, esonant convetes intoduces new poblems. This chapte gives an intoduction to the evolution of esonant convetes, fom load esonant convetes to quasi esonant DC link convetes. Though not esonant, this pesentation stats with a shot intoduction of a cetain kind of snubbe, the RCD chagedischage snubbe, which exhibits some of the featues of esonant convetes..1 The RCD chagedischage snubbe In this section the RCD chagedischage snubbe is investigated. This is mainly done in ode to intoduce the tem soft switching. The investigation stats with a pesentation of the had switched step down convete. Then, a capacitive snubbe is intoduced. This is followed by the intoduction of the full RCD chagedischage snubbe applied both fo the step down convete and a tansisto half bidge. Had switching One of the most basic tansisto bidge configuations fo powe electonic applications is the step down convete. It consists of a voltage souce (DC link capacito), a powe tansisto (IGBT in this case) and a feewheeling diode, see Figue.1. Since this is a voltage souce convete, the load is a cuent souce, i.e. inductive. When the state of the switch is changed fom on to off (tunoff) o fom off to on (tunon), the tansition will take a finite time in the nonideal case. Futhemoe, fo nonideal cicuits thee ae paasitic components, fo
16 . Resonant convetes example stay inductance that can cause ovevoltage acoss the semiconducto devices at tunoff. i C v CE V dc I load Figue.1 Basic step down convete used in the analysis. Figue. shows typical collecto cuent and collectoemitte voltage fo a powe tansisto (IGBT in this case), when used in the step down convete above. Note that the collecto cuent and collectoemitte voltage is expessed in p.u., whee the nomalisation values ae selected as the ated maximum continuos collecto cuent, I C, and maximum collectoemitte voltage that can be sustained acoss the device, V CES. In the simulation of the step down convete the DC link voltage V dc and load cuent I load ae selected as I V load dc = 8. I = 6. V C CES (.1) v CE i C v CE i C 1 1 Figue. 1 (a) t [µs] 1 (b) t [µs] Timesignals showing nomalised tansisto cuent (black) and voltage (gey) at (a) tunon and (b) tunoff of the powe tansisto in the step down convete. In Figue., the powe tansisto is exposed to a cuent spike at tunon which is due to evese ecovey of the feewheeling diode. Futhemoe, it is clealy seen that the IGBT is exposed to simultaneously high cuent and voltage at the switching instants. This leads to high switching losses, especially at tunoff since the IGBT exhibits a collecto 8
17 . Resonant convetes cuent tail hee. The physics of evese ecovey of a powe diode and the IGBT cuent tail ae discussed in Chapte 4. A common way to visualise the stess levels imposed on a powe electonic semiconducto device is to plot the switching tajectoies, i.e. cuent vesus voltage, on top of the safe opeating aea (SOA) of the device. The powe semiconducto manufactues specify the SOA on absolute maximum values that must not be exceeded. Howeve, in some cases thee ae two SOAs, the second valid only fo vey shot pulses (tansients). Figue.3 shows the switching tajectoies coesponding to the time signals in Figue. on top of the SOA fo the paticula IGBT used in the simulation of the step down convete above. i C v CE Figue.3 Switching tajectoies (tunon black and tunoff gey) of an IGBT in a step down convete application. The total aea coesponds to the safe opeating aea valid fo shot pulses. The switching tajectoies in Figue.3 shows that thee ae no poblems with ovevoltage o ovecuent extending outside the SOA. The duation of the time intevals whee the powe tansisto is exposed to high cuent and voltage simultaneously, causing high losses, is howeve not seen. This can only be seen in Figue.. Both these plots ae valuable since eithe of them ae delimiting to what extent, by means of tansfeed powe, the powe convete can be used. In some cases, the cicuit stay inductance can be high causing a high ovevoltage at tunoff, which means that thee must be a lage magin between the DC link voltage used and the ated voltage. In othe cases the switching losses can be high causing a low value of ated convete cuent in ode to keep the junction tempeatue of the powe tansisto at an acceptable level. To patly ovecome this poblem and be able to use the semiconducto devices in a moe efficient way, snubbe cicuits ae intoduced [44], [6], 9
18 . Resonant convetes [63]. Thee ae seveal diffeent snubbe cicuits used fo diffeent puposes, fo example to educe the ovevoltage caused by stay inductance, at tunoff. Thee ae also snubbe cicuits whee the aim is to move the switching loci futhe into the SOA, which means lowe losses, at least if the duation of the switching intevals ae not polonged. One such snubbe is the RCD (esisto, capacito, diode) chagedischage snubbe. The capacitive snubbe Fom now on the RCD chagedischagesnubbe is efeed to only as RCD snubbe, even though thee ae seveal types of RCD snubbes fo diffeent puposes. At tunoff, this snubbe behaves as a pue capacito. Theefoe, in ode to simplify the peliminay analysis, the snubbe is consideed as consisting only of a single capacito denoted C s in Figue.4. i C v CE C s V dc I load Figue.4 The step down convete with a puely capacitive tunoff snubbe. By intoducing a capacito acoss the powe tansisto output teminals, the voltage deivative with espect to time can be contolled, see fo example [44]. This is possible since at tunoff, a pat of the tansisto cuent finds an altenative path though the capacito, which means that the tansisto collecto cuent falls and the collectoemitte voltage ises simultaneously, see Figue.5. This is not possible in the pevious case, i.e. without a snubbe, since hee the only altenative way fo the load cuent is though the feewheeling diode. The feewheeling diode only caies substantial cuent when fowad biased, which means that the tansisto collectoemitte voltage must be appoximately equal to the DC link voltage, V dc, befoe the collecto cuent can begin to decline at tunoff fo the case without a snubbe. It is sometimes stated that this type of snubbe cicuit povides tunoff unde zeo voltage switching (ZVS) conditions, o soft switched conditions [5]. This efes to the fact that when the tunoff sequence is initiated, the collectoemitte voltage is appoximately zeo. Howeve, at 1
19 . Resonant convetes the end of the cuent fall inteval the collectoemitte voltage is high, ideally equal to the DC link voltage V dc, accoding to [44]. Convetes not using snubbes poviding soft tansitions neithe at tunon o tunoff, ae often temed had switched [3], [5]. Anothe chaacteisation of soft switching is also used in this context, zeo cuent switching (ZCS), which efes to that eithe o both the tunon and tunoff tansitions take place at vitually zeo cuent [35], [44]. v CE i C 3 v CE i C Figue.5 1 (a) t [µs] 1 (b) t [µs] Timesignals showing tansisto cuent (black) and voltage (gey) at (a) tunon and (b) tunoff of the powe tansisto in the step down convete with a capacitive snubbe acoss the powe tansisto. Note the high collecto cuent peak at tunon, and that the collecto cuent and collectoemitte voltage changes simultaneously at tunoff. Fom Figue.5 it is seen that the snubbe capacito is affecting the tunoff wavefoms in such a way that the tunoff losses do decease. Also, the collectoemitte voltage deivative is contolled which can be an impotant aspect by means of electomagnetic compatibility (EMC) [51]. On the othe hand, it is also seen that the tunon wavefoms becomes less favouable. Fo the had switched step down convete thee was a shot collecto cuent spike due to evese ecovey of the feewheeling diode at tunon of the powe tansisto. Fo the case with a capacitive snubbe the cuent spike is even highe, thus adding stess to the tansisto at tunon. Pio to tunon, the snubbe capacito is fully chaged, i.e. the capacito voltage equals V dc. The voltage acoss the feewheeling diode emains close to zeo as long as its junction is fowad biased, which implies that 11
20 . Resonant convetes the capacito voltage, and theeby the collectoemitte voltage, cannot decease befoe the pnjunction of the feewheeling diode becomes evese biased. The feewheeling diode becomes evese biased exactly when the evese ecovey cuent eaches its peak value. Revese ecovey is due to stoed minoity chage caies close to the pnjunction of the diode, causing the junction to be fowad biased even though the diode cuent is negative. The negative cuent sweeps out the minoity caies and eventually the junction becomes evese biased. As mentioned ealie, powe electonic diodes and IGBTs ae investigated futhe in Chapte 4. The discussion above implies that the capacito dischage stats when the evese ecovey cuent eaches its peak. Even if the diode ecoves fast, the tansisto has to cay an excessive cuent fo quite some time since the only dischage path fo the capacito is though the powe tansisto. The RCD snubbe In ode to cope with the poblem of the capacitive snubbe, a esisto is added. The intention with the esisto is to limit the capacito dischage cuent at tansisto tunon. A diode is placed in paallel with the esisto since at tunoff, the capacito gives the desied behaviou and the esisto would only cause inceased losses. This completes the RCD snubbe, see Figue.6. V dc i C D s R s v CE C s I load Figue.6 The step down convete with the full RCD chagedischage snubbe placed acoss the output teminals of the device. The esisto value is chosen in such a way that the capacito peak dischage cuent do not exceed the peak evese ecovey cuent of the feewheeling diode [44]. Figue.7 shows the time signals of the tansisto collecto cuent and collectoemitte voltage. It is clealy seen that the tunoff sequence is simila to the one fo the puely capacitive snubbe, but the stess levels at tunon is only slightly highe than it was fo the had switched step down convete. 1
21 . Resonant convetes v CE i C v CE i C 1 1 Figue.7 1 (a) t [µs] 1 (b) t [µs] Timesignals showing tansisto cuent (black) and voltage (gey) at (a) tunon and (b) tunoff of the powe tansisto in the step down convete with a full RCD chagedischage snubbe acoss the powe tansisto. The RCD chagedischage snubbe in bidge applications The battey chage poposed consists of fou half bidges with two IGBTs and two feewheeling diodes each, see Figue 1.1. To investigate the switching wavefoms fo a battey chage implemented with RCD snubbes, one acoss each IGBT, an entie half bidge has to be consideed. In Figue.8 a half bidge with a RCD snubbe acoss each tansisto is shown. V dc i C D s1 v CE R s1 C s1 D s R s C s I load Figue.8 A half bidge with one RCD snubbe connected acoss each tansisto. The uppe RCD snubbe is intended to povide soft tunoff fo the uppe IGBT. The lowe RCD snubbe is intended to povide soft tunoff fo the lowe IGBT. The simulated collecto cuent and collectoemitte voltage ae shown in Figue.9. Note the vey high cuent peak at tansisto tunon. The occuence of this cuent peak is due to the capacitive cuent path seen fom the IGBT output teminals, [44]. At tunon of the uppe IGBT, the collectoemitte voltage should decease fo the uppe IGBT and incease fo the lowe. This means that the uppe snubbe capacito in 13
22 . Resonant convetes Figue.8, denoted C s1, should be dischaged and the lowe, denoted C s, should be chaged. v CE i C 4 v CE i C Figue.9 1 (a) t [µs] 1 (b) t [µs] Timesignals showing tansisto collecto cuent (black) and collectoemitte voltage (gey) at (a) tunon and (b) tunoff of the uppe IGBT in the convete consisting of a bidge leg. One RCD snubbe is used acoss each IGBT. Note the high collecto cuent peak at tunon. Also note the poo behaviou at tunoff. The dischage cuent of C s1 is limited by the snubbe esisto R s1 as pevious but the chaging cuent of C s is not limited by any othe component. Futhemoe, the only path possible fo the chaging cuent, is though the uppe IGBT. In this way, the chaging cuent of the lowe snubbe capacito gives a lage contibution to the collecto cuent of the uppe IGBT, at tunon. The same poblem appeas fo the lowe tansisto. Anothe poblem seen in Figue.9 is that the tunoff is not soft, i.e. the collecto cuent fall and the collectoemitte voltage ise do not occu simultaneously. Instead, the collecto cuent falls somewhat, then inceases and eventually the cuent falls again. This is efeed to as a cuent tail bump, which is discussed in Chapte 4. The switching loci fo the convete consisting of a bidge leg with RCD snubbes acoss the tansistos is shown in Figue.1. Note that the switching tajectoy is outside the SOA valid fo vey shot pulses, which is vey dangeous, since this can lead to device failue. 14
23 . Resonant convetes Small vaiations of the snubbe cicuit can be used to patly solve this poblem. Fist, the snubbe diodes in paallel with the esistos can be emoved. In this way the capacitive path is boken but soft tunoff is also lost. Howeve, EMC elated poblems can still be educed [44]. i C v CE Figue.1 Switching loci (tunon black and tunoff dak gey) of the bidge leg with RCD snubbes. Note that the tunon collecto cuent is beyond the cuent limit of the dynamic SOA (light gey), valid fo shot pulses. Anothe way to solve this poblem is by intoducing inductos in seies with the snubbes, thus educing the cuent deivative with espect to time [63]. This woks, but gives a bulky snubbe. This is not desiable, especially not since eight such snubbes ae needed fo the battey chage consideed.. Load esonant convetes The next step is to investigate load esonant convetes. The name load esonant convete efes to the fact that fo this type of convetes, the load is pat of the esonant cicuit. Thee ae basically two diffeent types, the seies and the paallel esonant convetes. In this section both these, also efeed to as class D convetes, ae discussed. Accoding to [8] the class D esonant convetes wee invented by P.J. Baxandall in The idea of esonant convetes is to povide soft switching in ode to be able to incease the switching fequency. An inceased switching fequency means that the passive filte equiements and/o the output cuent ipple ae deceased. Also, switching fequencies beyond the 15
24 . Resonant convetes audible limit of the human ea can be used, thus educing the distubing noise of the convete. The seies esonant convete The seies esonant convete consist of one o two half bidges foming a half o full bidge convete. Between the output teminals, a seies esonant cicuit is connected. This seies esonant cicuit consists of an inducto, a capacito and a esisto, with one o moe of these elements actually being pat of the load. Usually, at least the esisto is pat of the load. Howeve, fo this basic cicuit only ACpowe can be deliveed to the load, due to the esonant behaviou of the cicuit. If a DCload is used, the esisto can be eplaced by a ectifie connected to the DC load. If the load is diectly connected to the esonant cicuit, i.e. without a ectifie in between, it is efeed to as a seies esonant DC to AC convete. If the load is connected to the convete via a ectifie, it is efeed to as a seies esonant DC to DC convete. The basic seies esonant DC to DC fullbidge convete is shown in Figue.11. L C i load V dc v conv i L v ect V load Figue.11 Seies esonant DCDC fullbidge convete. In this case the load consist of a constant voltage souce, i.e. an ideal battey. Besides the basic components peviously discussed, the convete in Figue.11 is also equipped with lossless snubbes, i.e. capacitive snubbes, which ae discussed late. The ectifie is connected in seies with the esonant cicuit which acts as a cuent souce fo the ectifie. Since the ectifie is cuent fed, the ectifie output should appea as a voltage souce. Load esonant cicuits ae often [8], [44] chaacteised upon the fundamental of the excitation fequency fed by the convete. The behaviou of the cicuit is vaying depending on whethe the convete output fequency is below, at o above the esonance fequency of the LC cicuit [8], [44]. The esonance fequency is given by ω = π f = 1 LC (.) 16
25 . Resonant convetes Figue.1 shows the wavefoms of the seies esonant convete opeating at switching fequency above the esonance fequency. v conv v ect t [µs] (a) i load i L t [µs] (b) Figue.1 Nomalised voltages (a), convete output voltage (black) and ectifie input voltage (gey). Nomalised cuents (b), load cuent (black) and esonant cuent (gey). Note that the esonant cuent is lagging the fundamental of the convete output voltage. The quantities in Figue.1 ae nomalised to a p.u. system with base values selected accoding to I V base base = I = V load, avg dc (.3) The shape of the wavefoms, especially the esonant cuent in the case of a seies esonant convete, ae stongly dependent on the loaded quality facto, Q L, defined as 17
26 . Resonant convetes Q L Z = (.4) R eq whee Z L = (.5) C In [8] it is stated that the esonant cuent i L is almost sinusoidal if Q L is lage than.5. Fo a nonlinea load, an equivalent loaded quality facto have to be calculated. Fo the convete in Figue.11, with wavefoms as in Figue.1, an equivalent load esistance is calculated based on the amplitude of the fundamental of the ectifie input voltage, which is popotional to the battey voltage. It is also assumed that the esonant cuent is sinusoidal. In this example, a Q L of 1.5 and a esonance fequency of 66.7 khz ae desied. These two paametes togethe with the equivalent seies esistance gives the component values of L and C. The eason fo selecting a low Q L is that this gives a low esonant cuent and a low esonant capacito voltage v C [8], [35]. Fo the seies esonant convete, a switching fequency lowe than the esonance fequency means that the esonant cicuit behaves like a capacitive load. Switching fequency highe than the esonant fequency means that the esonant cicuit appeas as an inductive load fo the convete. Thus, at switching fequencies below esonance, the esonant cuent i L leads the fundamental of the convete output voltage. Consequently, i L lags the fundamental of the convete voltage when the esonant cicuit is excited above the esonance fequency. Fo continuos load cuent this means that below esonance fequency the convete switches ae tuned on in a had switched manne and tuned off unde ZVS and ZCS conditions. Above esonance the convete switches ae tuned on unde ZVS and ZCS conditions and tuned off unde had switched conditions. Lossless tunoff above esonance is povided by the individual snubbe capacitos in paallel with each convete switch, as shown in Figue.11. Peviously when ZVS tunoff snubbes wee discussed, it was found that the use of capacitive snubbes mounted acoss each tansisto in a half bidge, esulted in high collecto cuent peaks at tunon. Howeve, in the case of a seies esonant convete this poblem is not obseved due to 18
27 . Resonant convetes the fact that the tansistos tunon at ZVS and ZCS conditions since the diode in paallel with the tansisto is caying the esonant cuent, pio to tunon. The esonant cuent commutates to the tansistos when its sign changes. This implies that tansisto tunon do not change the chage state of the snubbe capacitos, and consequently no snubbe capacito chaging cuent is caied by the tansistos. Although this cicuit was invented aleady in 1959, the seies esonant convete is still a eseach object [8], [45]. Also vaiants of this cicuit togethe with the cicuit discussed in the next section, the paallel esonant convete, is gaining a lot of inteest [8], [3], [44]. In [35], [45] the seies esonant convete is used in a somewhat diffeent way than peviously descibed. Hee, the seies esonant cicuit is opeated well below esonant fequency and with discontinuous esonant cuent. Although the cicuit pesented in [35] do not look exactly as a seies esonant in Figue.11, it is still a seies esonant DC to DC convete. The idea of opeating the seies esonant convete below esonance and with discontinuous cuent is that tunon and tunoff is pefomed unde (vitually) ZCS conditions. The eason fo this is that the esonant cuent is only piecewise sinusoidal, with intevals appoximately equal to zeo in between. In [35] it is stated that these intevals ae not equal to zeo, since a tansfome is connected between the esonant cicuit and the ectifie, which gives ise to a small magnetising cuent duing the discontinuous cuent intevals. Anyway, the convete switches ae opeated at low cuent. The paallel esonant convete The paallel load esonant convete is simila to the peviously investigated seies esonant convete. Howeve, in the case of a paallel esonant convete, the output ectifie is connected in paallel with the esonant capacito, see Figue.13. Since the esonant capacito epesents a voltage souce to the ectifie, the output filte of the ectifie must be a cuent souce, i.e. inductive. The ectifie epesents a nonlinea load, also in this case. Usually, a tansfome is connected between the esonant cicuit and the ectifie in ode to adapt the load voltage to the DC link voltage used. A tansfome can also be used to povide a galvanically isolated output voltage, which is desied in some applications. 19
28 . Resonant convetes L f L i ect V dc v conv i L C v C V load Figue.13 The paallel esonant convete with a constant voltage load. Note the capacitive snubbes connected acoss the convete switches poviding lossless tunoff. Often a tansfome is connected between the esonant cicuit and the ectifie. The esonant wavefoms of the paallel esonant convete in Figue.13, opeating at switching fequency above esonance ae shown in Figue.14. Hee, the wavefoms ae nomalised accoding to (.3). v conv v C t [µs] (a) i ect i L t [µs] (b) Figue.14 Nomalised voltages (a), convete output voltage (black) and esonant capacito voltage (gey). Nomalised cuents (b), load cuent (black) and esonant inducto cuent (gey).
29 . Resonant convetes Unlike the case with the seies esonant convete, the esonant inducto cuent is not detemined by the ectifie output cuent fo the paallel esonant convete. On the othe hand, the ectifie output voltage is dependent on the esonant capacito voltage fo the paallel esonant convete. Fo the paallel esonant convete, continuos cuent opeation above esonance esults in tunon at ZCS conditions since the esonant cuent commutates fom the feewheeling diodes to the powe tansistos natually. In this case, natual commutation means that the commutation takes place at the zeo cossing of the esonant inducto cuent. Tansisto tunoff howeve, is not pefomed unde neithe ZCS o ZVS conditions, unless lossless tunoff snubbes ae used. As befoe, the capacitive snubbes povide tunoff at low voltage. Simila to the case fo the seies esonant convete, thee is no cuent peak occuing with such snubbes at tunon of the convete switches fo the paallel esonant convete. The main poblem of both the seies and the paallel esonant convetes, is that the esonant cuents and voltages can be seveal times highe than the aveage load cuent and DC link voltage espectively, depending on the load. If lage load vaiations ae likely, the components of the esonant convete must be designed fo the wost case stess. Seveal vaiations and combinations of the seies and paallel esonant convetes do exist [8], [44]. Thee ae also completely diffeent esonant convetes like the class E esonant convetes [8], [44] and the zeo voltage tansition (ZVT) convetes [4]. Howeve, thee ae so many esonant convete topologies that a complete eview would be vey extensive. Futhemoe, the eseach on esonant convetes is widespead which also makes a complete suvey difficult..3 The esonant DC link convete A huge step in esonant convete technology was taken in 1986 when the esonant DC link convete was invented [13], [14]. Fo the esonant DC link convete, one esonant cicuit is used to povide soft switching fo the entie convete. As the name esonant DC link hints, it is the DC link which is foced to oscillate. This means that the esonance cicuit is located on the DC link side and not on the load side of the convete. This is vey useful, especially fo thee (o moe) phase convetes since othewise, one esonant cicuit fo each half bidge would be equied. 1
30 . Resonant convetes The basic thee phase esonant DC link convete is shown in Figue.15. If a thee phase backtoback convete [6] is to be implemented with a esonant DC link, this is done by connecting the six half bidges in paallel [13]. In [13] anothe solution fo the esonant backtoback convete is also pesented whee a cuent fed Hbidge is used. This cicuit equies fou exta switches and is not consideed hee. L v L i L i conv i C V dc C dc C v C Figue.15 The basic thee phase esonant DC link convete. In ode to investigate the esonant DC link convete, a simplification of the convete in Figue.15 is done. Instead of the thee phase convete, a piecewise constant cuent souce is connected acoss the DC link epesenting the cuent fed to the convete. Howeve, one switch must be kept acoss the DC link since a path fo the ciculating esonant cuent has to be povided. The simplified esonant DC link convete is shown in Figue.16. The idea of the esonant DC link convete is that the switch state of the convete only should be changed at o close to zeo link voltage. This implies that the cuent dawn by the cuent souce in Figue.16, should change only at low DC link voltage. The esonant cicuit is fomed by the esonant inducto L and the esonant capacito C. Since the DC link capacito C dc has a much highe capacitance than C, it does not affect the esonance behaviou. In othe wods, the DC link capacito can be egaded as a constant voltage souce. L v L i L V dc C dc i C C v C i o Figue.16 Simplified esonant DC link convete.
31 . Resonant convetes Assume that a esonant cycle stats at a capacito voltage equal to twice the DC link voltage V dc. Due to the esonant popeties of this cicuit the capacito voltage deceases towads zeo. When the voltage acoss C passes the level of the DC link voltage the inducto cuent is close to its minimum value. When the capacito voltage eaches zeo, it will be clamped to this level due to the fact that the load cuent feewheels though the feewheeling diodes, at least if the esonant inducto cuent is lowe than the load cuent which is the case if no switching is pefomed. As soon as the inducto cuent eaches the level of the load cuent, the capacito voltage stats to amp up. When the voltage acoss C passes the level of the DC link voltage the inducto cuent is at its maximum value. Fo the case whee the output cuent is not changed, the capacito voltage eaches the stating point of the analysis which equals twice the DC link voltage. The esonant DC link convete is mathematically analysed in Appendix C.. The nomalised esonant wavefoms fo the case of changing output cuent ae shown in Figue.17. Fom Figue.17 some inteesting obsevations ae made. Fist, when the output cuent i o is deceased due to a change of the convete switch state, the esonant DC link voltage esonates to a peak value highe than twice the DC link voltage V dc. Second, when the output cuent is inceased, the zeo voltage inteval is polonged and the esonant capacito voltage inceases with a modeate deivative, to a peak value close to twice the DC link voltage V dc. v C i L i o t [µs] Figue.17 Nomalised inducto cuent (black) and esonant link voltage (gey) fo a esonant DC link convete. The cuent fed to the convete is also shown (dashed). Note the esonant link voltage peak esulting fom a decease of the convete cuent. 3
32 . Resonant convetes In the fist case, thee is excess enegy stoed in the esonant inducto due to the peviously high cuent though L, coesponding to the load cuent. This enegy must decease to meet the new output cuent, which implies that the enegy must be tansfeed to the esonant capacito C. This excess enegy thus esults in a high voltage acoss the capacito. By inceasing the capacitance and deceasing the inductance, the peak capacito voltage is deceased. Howeve, the same action inceases the magnitude of the esonant cuent though L. Also the deivative of the voltage amp up inteval can be contolled by selection of the inductance and capacitance of the esonant cicuit. This is impotant in moto dive applications since it has been found that high voltage deivatives shotens the lifetime of the winding insulation of motos [46], [47], [53]. In the second case, a too small amount of enegy is stoed in the inducto, which esults in a polonged zeo voltage inteval. The length of the zeo voltage inteval is detemined by the time needed fo the inducto cuent to each the same level as the convete cuent. When the inducto cuent eaches the level of the convete cuent, the esonant capacito is being chaged, since the inducto cuent continues to ise. Since the capacito chaging cuent is low and contolled by the inducto in this case, the voltage is inceasing with a modeate deivative. The capacito voltage only eaches about twice the DC link voltage, which is due to the fact the voltage ise inteval stats at zeo voltage with zeo chaging cuent. If the esonance fequency of the DC link is much highe than the switching fequency the oscillation might be damped which means that afte some esonance cycles, zeo voltage will not be eached. This damping is due to losses of the passive components. One way to cope with this poblem is to maintain the zeo voltage inteval somewhat longe by shot cicuiting the esonant capacito with the convete switches. This foces stoage of moe enegy in the esonant inducto which in tun esults in highe capacito peak voltage. Anothe poblem of this cicuit is that caie wave PWM can not be used since the possible switching instants ae detemined by the esonant cicuit. Instead othe modulation stategies must be applied [13]. One such modulation stategy is eviewed in Appendix A. Howeve, these modulation stategies equie that the esonance fequency is much highe than the switching fequency, in ode to get a esult compaable to caie based PWM by means of output cuent spectum [46], [47]. 4
33 . Resonant convetes Seveal othe esonant link cicuits ae pesented in the liteatue. Both AC and DC link cicuits ae developed and also ZVS and ZCS esonant cicuits ae available. Anyway, the est of this epot only deals with esonant DC link cicuits intended fo poviding ZVS condition at tansisto switching. Clamp cicuits Thee ae mainly two poblems associated with the esonant DC link convetes. One poblem is that PWM cannot be used, which as peviously mentioned can be solved by inceasing the esonant link fequency. The othe poblem is the capacito voltage oveshoot following a change of switch state that deceases the cuent fed fom the DC link to the convete. This can be solved by allowing the change of switch state at a slightly highe voltage than zeo [46], [47], see Appendix C.. By using this voltage peak contol (VPC), a capacito peak voltage only slightly highe than twice the DC link voltage is obtained, even at convete switchings esulting in a decease of the esonant link output cuent. The othe way is to use a clamp cicuit, which assues that the maximum capacito voltage is limited to a cetain level by an extenal cicuit. Two methods of clamping ae poposed in the liteatue, active and passive clamping. Active clamping [14], [], utilises a capacito and an auxiliay switch to povide clamp action, see Figue.18. Hee, the esonant DC link voltage is limited to a level detemined by the voltage acoss the clamp capacito C c. When v C eaches K V dc, the antipaallel diode of S aux stats to conduct. Thus, the esonant link voltage is clamped to this value. The paamete K is called clamping facto. (K1) V dc C c S aux L V dc C dc C v C Figue.18 Active clamp cicuit fo the esonant DC link convete. Note that duing clamp action, the capacito C c is chaged, implying that the clamping voltage will incease if no pecautions ae made. To solve 5
34 . Resonant convetes this poblem the contollable pat of S aux has to be opeated duing the offclamping intevals of the esonant cycle. If this is done appopiately the clamping voltage can be contolled to be almost constant. The idea is to tun on the tansisto of S aux while the diode is conducting, which means that this occus at zeo voltage. Then, S aux is kept on in ode to dischage the clamp capacito in such a way that the voltage acoss C c etuns to the value detemined by the clamp facto. Accoding to [14], a suitable value fo the clamp facto is between 1. and 1.4. In the case of passive clamping [14], a tansfome is used to achieve the desied limitation of the esonant link voltage, see Figue.19. In this case the idea is that the clamp diode D should be evese biased fo esonant link voltages less than the clamp level. When the esonant link voltage eaches the clamp level, D should be a the edge of fowad biasing. This is obtained by a pope selection of the clamping tansfome tuns atio, since at this point the seconday voltage equals V dc and the pimay voltage equals (K1) V dc. Thus, the clamp tansfome winding tuns atio should be selected accoding to N N 1 1 = K 1 (.6) whee N 1 and N ae the numbe of winding tuns fo the clamp tansfome pimay and seconday, espectively. The clamping facto can howeve not be chosen abitaily, since it has to be ganted that the esonant link voltage fulfils the oscillation all the way down to zeo voltage. This implies that the clamping facto can not be less than two [14], fo the passively clamped esonant DC link. L 1 L V dc C dc D C v C Figue.19 A passively clamped esonant DC link convete. One majo poblem with this cicuit is that D has to sustain a high evese voltage duing the esonant DC link zeo voltage inteval. This voltage equals 6
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