AN1207. Switch Mode Power Supply (SMPS) Topologies (Part II) REQUIREMENTS AND RULES INTRODUCTION CONTENTS. Microchip Technology Inc.

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1 Swich Mode Power Supply (SMPS) opologies (Par II) Auhor: INRODUCION his applicai noe is he secd of a wo-par series Swich Mode Power Supply (SMPS) opologies. he firs applicai noe in his series AN Swich Mode Power Supply (SMPS) opologies (Par I) explains he basics of differen SMPS opologies while guiding he reader in selecing an appropriae opology for a given applicai. Par II of his series expands he previous maerial in Par I and presens he basic ools needed o design a power cverer. All of he opologies inroduced in Par I are covered and afer a brief overview of he basic funcialiy of each equais o design real sysems are presened and analyzed. Before cinuing i is recommended ha you read and become familiar wih Par I of his series. CONENS Anio Bersani Microchip echnology Inc. his applicai noe cains he following major secis: Requiremens and Rules... 1 Buck Cverer... 2 Boos Cverer Forward Cverer wo-swich Forward Cverer Half-Bridge Cverer Push-Pull Cverer Full-Bridge Cverer Flyback Cverer Volage and Curren opologies Cclusi References Source Code REQUIREMENS AND RULES he following requiremens and rules were used o deermine he various compen values used in he design of a power cverer. he general design requiremens are lised as follows: Nominal inpu volage (VDC) Minimum inpu volage (VDC min) Maximum inpu volage (VDC max) Oupu volage (VOU) Nominal average oupu curren (IO av nom) Nominal minimum oupu curren (IO av min) Maximum ripple volage (VR max) In addii a few comm rules were used for compen seleci: MOSFEs (or swiches) mus be able o: - Wihsand he maximum volage - Wihsand he maximum curren - Operae efficienly and correcly a he frequency of he PWM - Operae in he SOA (dependan dissipai) Diodes mus be able o: - Wihsand he maximum reverse volage - Wihsand he average curren Arrows are used in he circui schemaics o represen volages. he volage polariy is no direcly refleced by he arrow iself (meaning if he volage reverses he arrow is no reversed bu ha he value of he volage is negaive) Microchip echnology Inc. DS01207B-page 1

2 BUCK CONVERER he Buck Cverer cvers a high inpu volage ino a lower oupu volage. I is preferred over linear regulaors for is higher efficiency. opology Equais Figure 1 shows he basic opology of a Buck Cverer. he Q1 swich is operaed wih a fixed frequency and variable duy cycle signal. FIGURE 2: VDC Q1 BUCK CONVERER OPOLOGY: OERIOD D1 LO VL CO VOU FIGURE 1: VDC Q1 BUCK CONVERER OPOLOGY Accordingly volage VI is a square-wave s(). he Fourier series of such a signal is shown in Equai 1. EQUAION 1: his means ha he square-wave can be represened as a sum of a DC value and a number of sine waves a differen increasing (muliple) frequencies. If his signal is processed hrough a low-pass filer (Equai 2) he resuling oupu (DC value ly) is received. EQUAION 2: VI D1 A LoCo low-pass filer exracs from he square-wave is DC value and aenuaes he fundamenal and harmics o a desired level. Q1 CLOSED (OERIOD) In his cfigurai he circui is redrawn as shown in Figure 2. he diode is reverse-biased so ha i becomes an open circui. LO VL s () A-- τ + Σsin CO VOU waves_wih_frequency_muliple_of_he_square_wave_frequency where: τ he duy cycle he period A he square-wave ampliude s f () A-- τ cs Based Figure 2 he volage he inducor is as shown in Equai 3. EQUAION 3: V L V DC V Q V OU he inducor curren (having a csan ime derivaive value) is a ramp: ( V DC V Q V OU ) i L () i L ( 0) L O A ime ON equals: ( V DC V Q V OU ) i L ( ON ) i L ( 0) ON Where ON is he durai of he ime inerval when he swich Q1 is closed. Q1 OPEN (OFF PERIOD) As shown in Figure 3 when he swich Q1 opens he inducor will ry o keep he curren flowing as before. FIGURE 3: VDC Q1 BUCK CONVERER OPOLOGY: OFF PERIOD D1 As a resul he volage a he D1 LO Q1 inerseci will abruply ry o become very negaive o suppor he cinuous flow of curren in he same direci (see Figure 4). LO VL L O CO VOU DS01207B-page Microchip echnology Inc.

3 FIGURE 4: VL INDUCOR BEHAVIOR IL During ON he inducor is soring energy ino is magneic field (VL > 0). INPU/OUPU RELAIONSHIP AND DUY CYCLE Wha has been described unil now is called Cinuous mode. o undersand wha i is and is imporance refer o Figure 5(G) which represens he inducor curren. As previously seen here is a ramp-up during ON and a ramp-down during OFF. he average curren can be compued easily using Equai 6. VL During OFF he inducor is releasing energy previously sored (VL < 0). EQUAION 6: I 2 + I I Lav Equai 4 shows he resuling inducor volage while Equai 5 shows he curren. EQUAION 4: IL V L V OU V D he average inducor curren is also he curren flowing o he oupu so he oupu average curren is equal o Equai 7. EQUAION 7: I 2 + I I Oav EQUAION 5: V OU V D i L () i L ( ON ) L O 2009 Microchip echnology Inc. DS01207B-page 3

4 FIGURE 5: BUCK CONVERER WAVEFORMS Q1 Command (A) VDC + VD VQ1 (B) I2 I1 IQ1 (C) VD1 (D) (-VDC + VQ ) I2 I1 ID1 (E) VDC - VOU VL A (F) B -VOU I2 I1 IL (G) ON OFF (A) Command signal and MOSFE gae (B) Volage and MOSFE (C) Curren flowing ino MOSFE (D) Volage D1 diode (E) Curren in D1 diode (F) Volage LO inducor (G) Curren in LO inducor DS01207B-page Microchip echnology Inc.

5 Supposing he oupu load RO (cneced in parallel o he oupu capacior CO) changes by increasing his change has he effec of reducing he average oupu curren. As shown in Figure 6 curren moves from line A for he nominal load o line B for a larger load. Wha should be noed is ha he slopes of he wo ramps boh during ON and OFF do no change because hey ly depend VDC VOU and L and hey have no been changed. As a csequence increasing he load resuls in RO becoming greaer. Since VO equals csan (he crol loop explained earlier handles his) and RO increases he curren diminishes. FIGURE 6: VL INDUCOR CURREN A DIFFEREN LOADS ON OFF Increasing load (reducing IO av) A B C D CONINUOUS MODE Operaing in he Cinuous mode is so named since he curren in he inducor never sops flowing (goes o zero). As shown in Figure 6 if he load cinues o increase (reducing IO av) a some ime he inducor curren plo will ouch he x-axis (line C). his means he iniial and final curren (a he beginning and he end of he swiching period) in he inducor is zero. A his poin he inducor curren eners wha is csidered as Criical mode. If he load is furher increased he curren during he down-ramp will reach zero before he end of he period (line D) which is known as Discinuous mode. Noe: In Discinuous mode he ly way o furher decrease he inducor curren is o reduce he ON ime (ON). One key poin is ha he inducor curren a he end of he OFF period mus equal he inducor curren a he beginning of he ON period meaning he ne change in curren in e period mus be zero. his mus be rue a Seady sae when all ransiens have finished and he circui behavior is no lger changing. ON Using he value of IL(ON) derived from Equai 3 and Equai 5 creaes he relaiship shown in Equai 8. EQUAION 8: ΔI L V DC V Q V OU ( ) ( ON V OU + V ) D OFF Neglecing VD and VQ Equai 8 can be solved for VOU as shown in Equai 9. EQUAION 9: V OU V DC D where D / (duy cycle) or V OU D V DC he maximum duy cycle is achieved when he inpu volage is a is minimum as shown in Equai 10. EQUAION 10: D max V OU V DC min herefore D mus obviously be beween 0 and Microchip echnology Inc. DS01207B-page 5

6 DISCONINUOUS MODE In Discinuous mode he inducor curren goes o zero before he period ends. he inducor (oupu) average curren (IO av min) ha deermines he edge beween Cinuous and Discinuous mode can be easily deermined as shown Figure 7. FIGURE 7: INDUCOR CURREN A HE EDGE OF DISCONINUOUS MODE IL IL peak I2 IO limi I1 ON OFF Based Figure 7 he inducor curren limi is equal o Equai 11. EQUAION 11: 1 1 I O limi --I L peak --( I I 1 ) 1 --I 2 2 From his poin he behavior of he Buck Cverer changes radically. If he load cinues o increase he ly possibiliy he sysem has o reduce he curren is o reduce he duy cycle (Figure 6). However his means ha a linear relaiship as shown in Equai 9 no lger exiss beween inpu and oupu. he relaiship beween VDC VOU and D can be obained wih some addiial effor as shown in Equai 12. EQUAION 12: V OU D V DC I O I O limi V OU V DC Figure 8 illusraes his relaiship. 1 DS01207B-page Microchip echnology Inc.

7 FIGURE 8: DUY CYCLE IN CONINUOUS AND DISCONINUOUS REGIONS D 1 VDC/VOU 1.25 (A) VDC/VOU 2 Discinuous regi Cinuous regi VDC/VOU IO/IO limi As shown in Figure 8 saring from he cinuous regi and moving alg line (A) where D 0.5 as so he boundary beween cinuous and discinuous regis (doed line) is crossed o keep he same oupu volage (VDC/VOU 2) D changes according o he nlinear relai in Equai 12. Design Equais and Compen Seleci his seci deermines he equais ha enable he design of a Cinuous mode Buck Cverer. INDUCOR he average minimum curren (IO av min) is se as he average oupu curren a he boundary of Discinuous mode (Figure 7). his way for any curren larger han IO av min he sysem will operae in Cinuous mode. Usually i is a percenage of IO av nom where a comm value is 10% as shown in Equai 13. EQUAION 13: 1 ( V DC nom V OOU ) 0.1I o av nom --I L ON O I o av min I O limi Solving Equai 13 wih respec o LO resuls in Equai 14. EQUAION 14: L O 5 ( V DC nom V )V OU OU V DC nom F PWM I O av nom where FPWM is he PWM frequency (FPWM 1/) Power Losses In he Inducor Power losses in he inducor are represened by Equai 15. EQUAION 15: P LOSS inducor I O av nom ( ) 2 ESR where ESR is he equivalen inducor resisance 2009 Microchip echnology Inc. DS01207B-page 7

8 OUPU CAPACIOR he curren ripple generaes an oupu volage ripple having wo compens as shown in Figure 9. Power Losses in he Capacior Power losses dissipaed in he capacior are shown in Equai 19. FIGURE 9: MODEL OF HE OUPU CAPACIOR CO CO RESR (ESR) LESL (ESL) EQUAION 19: DIODE Referring o Figure 5(E) he curren flowing hrough he diode during OFF is he inducor curren. I is easy hen o compue he average diode curren using Equai 20. EQUAION 20: 2 P LOSS capacior ΔI L R ESR he firs compen of he ripple volage (VR) is caused by he effec series resisance (ESR) of he oupu capacior. his resisance is shown in Figure 9 as RESR. he secd compen VRCO comes from he volage drop caused by he curren flowing hrough he capacior which resuls in Equai 16. EQUAION 16: V R ESR he wo cribuis are no in phase; however csidering he wors case if hey are summed in phase his resuls in e swiching period as shown in Equai 17. EQUAION 17: R ESR ( I 2 I 1 ) R ESR ΔI L where (I 2 - I 1 ) is he ripple curren flowing in he inducor and o he oupu (a he edge of Discinuous mode which is: ΔI L 2 I O limi) and V R CO i C O C ()d ΔV R oal R ESR ΔI L D + ΔI L C O F PWM he maximum reverse volage he diode has o wihsand is during ON (see Figure 5(D)) as shown in Equai 21. EQUAION 21: Power Dissipai Compuai in he Diode Because volage he diode is n-zero (VR) bu he curren is zero dissipai during ON is equal o Equai 22. EQUAION 22: Dissipai during OFF is equal o Equai 23. EQUAION 23: P D OFF I D av I O av nom ( 1 D) V R max V DC max + V Q P D ON 0 V f I O av nom V f I O av nom ( 1 D) OFF By rearranging erms he required capacior value needed o guaranee he specified oupu volage ripple is shown in Equai 18. EQUAION 18: C O ΔI L D V R oal F PWM [ Δ R ESR ΔI L ] MOSFE he maximum volage he swich (see Figure 5(B)) during OFF is shown in Equai 24. EQUAION 24: V Q max V DC max + V D DS01207B-page Microchip echnology Inc.

9 he average curren (Figure 5(C)) during ON is shown in Equai 25. EQUAION 25: MOSFE Power Losses Compuai Saic Dissipai During ON he average curren flowing in Q1 is IO av nom D and he volage is V Vf he swich forward volage which resuls in Equai 26. his value is small since VF is relaively small. EQUAION 26: P Q1 saic ON I Q av I O av nom D V f I O av nom DV I f O av nom ON his same loss can be expressed using he RDS(ON) of he MOSFE aking care o deermine from he compen daa shee he value of RDS(ON) a he expeced junci emperaure (RDS(ON) grows wih emperaure). his erm can be wrien as shown in Equai 27. During OFF he volage Q1 is VDC + VD (Figure 5(B)) bu he curren is zero. As shown in Equai 28 here is no cribui o he dissipaed power. EQUAION 28: P Q1 saic OFF 0 Swiching Dissipai Figure 10 illusraes wha occurs during swiching. here are wo evens o csider: urn- (Q1 closes) and urn-off (Q1 opens). In boh cases volage and curren do no change abruply bu have a linear behavior. he represenai in Figure 10 is he wors-case possibiliy where a urn he volage VQ1 remains csan a VDC while he curren is ramping up from zero o is maximum value. Only a his momen does he volage sar falling o is minimum value of VF. In realiy he wo ramps will somehow overlap; however since his is he wors case his depiced siuai is csidered he curren swiching even. herefore a urn- he power is equal o Equai 29. EQUAION 27: P Q1 saic ON DI O av nom ( ) 2 R DS ( ON ) highemp FIGURE 10: MOSFE SWICHING LOSS COMPUAION WAVEFORMS VQ1 IQ1 VF VR CR ON CF OFF urn- urn-off EQUAION 29: P Q1 swiching urn CR 1 1 I -- V Q1 I Q1 d -- O av nom V DC d -- I V DC O av nom V DC I O av nom CR V DC I O av nom VF + d CR VF 0 VF 2009 Microchip echnology Inc. DS01207B-page 9

10 If CR is equal o Equai 30 he resul of Equai 29 can be simplified as shown in Equai 31. EQUAION 30: CR VF SW EQUAION 31: V DC I O av nom P Q1 swiching urn SW A urn-off he swiching loss can be calculaed using Equai 32. EQUAION 32: P Q1 swiching urn off VR V Q1 I Q1 d -- I V DC 1 I O av d -- O av nom V + V nom DC d DC I O av nom VR V DC I O av nom CF VR CF 0 CF 2 Again if VR is equal o Equai 33 his compuai resuls in Equai 34. EQUAION 33: VR CF SW EQUAION 34: V DC I O av nom P Q1 swiching urn off SW he oal dissipai in he MOSFE is shown in Equai 35. EQUAION 35: + + P Q1 oal P Q1 saic ON P Q1 swiching urn P Q1 swiching urn off DV f I O av nom + 2V DC I O av nom SW DS01207B-page Microchip echnology Inc.

11 Buck Cverer Design Example his seci shows how he equais previously discussed are o be used in he design process of a Buck Cverer. In addii he ypical design requiremens and how hey influence he design are also discussed. DESIGN REQUIREMENS. he design requiremens are: Inpu volage: VDC 12V ±30% Oupu volage: VOU 5V IO nominal IO av nom 2A IO limi 0.1 IO av nom 0.2A (I2 - I1) ΔIL 2 IO limi 0.4A Swiching frequency 200 khz Oupu ripple volage 50 mv Inpu ripple volage 200 mv DESIGROCESS Duy Cycle Compuai he cverer is supposed o operae in Cinuous mode so ha Equai 9 holds and: Dnominal VOU/VDC 5/ In addii he maximum and minimum available inpu volages will be compued: Minimum inpu volage 8.5V Maximum inpu volage 15.5V Inducor According o Equai 14 he nominal value of he inducor (Cinuous mode) is equal o Equai 36. EQUAION 36: 5( V DC V OU ) L o V OU I O av nom V DC F PWM ( 12 5) μH K he inducor required o place he sysem in Cinuous mode wih he maximum inpu volage is shown in Equai 37. EQUAION 37: V DC V OU V OU μH K L O M 0.2I O av nom V DC F PWM 2009 Microchip echnology Inc. DS01207B-page 11

12 he required inducor wih he minimum inpu volage is shown in Equai 38. EQUAION 38: An inducor of a leas 42 µh will preven he cverer from going discinuous over he full inpu volage range. In fac if he smalles inducor L 26 µh is seleced he maximum inpu volage (VDC 15.5V) would resul in a curren ripple of I2 - I1 0.85A. Cversely he inducor L 42 µh wih an inpu volage of 8.5V gives a curren ripple of 0.17A. his means ha any inducor greaer han 42 µh will fi. Oupu Capaciance Equai 39 is supposing o selec a capaciance having ESR 30 mω. EQUAION 39: V DC V OU V OU μH K L O m 0.2I O av nom V DC F PWM C ΔI L D F PWM [ V RIPPLE R ESR ΔI L ] 200K[ μF 0.4 ] Inpu Capacior Using he same approach o compue he oupu capaciance he inpu capaciance is hen calculaed using Equai 40. EQUAION 40: C ΔI L D F PWM [ V RIPPLE R ESR ΔI L ] 200K[ μF 0.4] Free-Wheeling Diode Seleci Based Equai 21 (see also Figure 5(D)) he maximum reverse volage he diode during ON is hen calculaed as shown in Equai 41. EQUAION 41: V R max V DC max + V Q 15.5V According o Equai 20 he average curren in he diode is calculaed as shown in Equai 42. EQUAION 42: I D av I O av nom ( 1 D) 2 ( ) 1.16A DS01207B-page Microchip echnology Inc.

13 MOSFE seleci he key parameers for he seleci of he MOSFE are he average curren and he maximum volage (referring o Equai 24 and Equai 25). he resuling calculais are shown in Equai 43 and Equai 44. EQUAION 43: V Q max V DC max + V D 15.5V EQUAION 44: I Q av I O av nom D A he power dissipaed in he MOSFE can be compued wih Equai 35 which resuls in Equai 45 where ypical values of VF 1V and sw 100 ns are used. EQUAION 45: P LOSS max SW DV f I O av nom 2V DC I O av nom ns V 2A V 2A W 5μs 2009 Microchip echnology Inc. DS01207B-page 13

14 BOOS CONVERER A Boos Cverer cvers a lower inpu volage o a higher oupu volage. opology Equais Figure 11 shows he essenial opology of a Boos Cverer. Q1 OPEN (OFF PERIOD) When he swich opens (Figure 13) and since he inducor curren canno change abruply he volage mus change polariy. Curren hen begins flowing hrough he diode which becomes forward-biased. FIGURE 13: BOOS CONVERER OPOLOGY: OFF PERIOD FIGURE 11: VL L1 VDC BOOS CONVERER OPOLOGY Q1 D1 VOU CO RO VOU VL VD L1 D1 VOU VDC Q1 CO RO he resuling inducor volage is shown in Equai 48. EQUAION 48: Q1 CLOSED (OERIOD) In his cfigurai he circui is redrawn as shown in Figure 12. FIGURE 12: VDC VL L1 BOOS CONVERER OPOLOGY: OERIOD he resuling volage he inducor is shown in Equai 46. EQUAION 46: Based he inducor equai (Equai 46) he curren resuls are shown in Equai 47. EQUAION 47: Q1 D1 V L V DC V Q VOU CO ( V DC V Q ) I L () I L ( 0) L 1 RO VOU he curren flowing ino he inducor during OFF which is ramping down is compued using Equai 49. EQUAION 49: V L V DC V D V OU < 0 V D V OU I L () I ( ON ) OPERAING MODES V DC Like he Buck Cverer he Boos Cverer can also be operaed in Cinuous and Discinuous modes. he difference beween he wo modes is in he inducor curren. In Cinuous mode i never goes o zero whereas in Discinuous mode he falling inducor curren in he OFF period reaches zero before he sar of he following PWM period. As in he case of he Buck Cverer he Boos Cverer can be used in boh modes. In eiher case he crol loop mus be csidered. A solui for e mode does no necessarily work well wih he oher. Cinuous Operaing Mode As usual he wo areas below he inducor volage during ON and OFF mus be equal. his means ha he curren a he beginning of he PWM period equals he curren a he end (Seady sae cdii) of he PWM period. Using Equai 47 and Equai 49 he relai shown in Equai 50 can be made. L 1 DS01207B-page Microchip echnology Inc.

15 EQUAION 50: V OU where D is he duy cycle of he PWM signal. V DC D I is imporan o noe ha his is a nlinear relaiship (Figure 14) unlike he Buck ransfer funci. If a lossless circui is assumed PO PDC VOIO VDCIDC resuling in Equai 51. EQUAION 52: he power delivered o he load by he inpu during OFF is shown in Equai 53. EQUAION 53: P L where Ip is he inducor peak curren L 1 I 2 P EQUAION 51: P DC I P F V DC I O ( 1 D) I DC Discinuous Operaing Mode o find he I/O relaiship a differen approach is used where energy is csidered which differs from he approach used for Buck Cverers. he oal power (P) delivered o he load comes from he cribui of he magneic field in he inducor and during OFF from he inpu volage VDC. he power delivered from he inducor (assuming 100% efficiency) is shown in Equai 52. where F as indicaed in Figure 15(G) is he pori of he OFF period from ON o when he inducor curren reaches zero. he oal power delivered o he load is he sum of Equai 52 and Equai 53. he peak curren is derived from Equai 47. If ON + F k he resuls are ha of Equai 54. EQUAION 54: kr V OU V O ON DC L 1 where RO is he oupu load resisor FIGURE 14: VO/VDC Series D% 2009 Microchip echnology Inc. DS01207B-page 15

16 FIGURE 15: BOOS CONVERER WAVEFORMS (DISCONINUOUS MODE) ON OFF Q1 Command VD + VOU (A) VQ1 (B) IQ1 (C) VD1 (A) (D) -VOU + VQ ID1 (E) VDC VL (F) (B) VDC - VOU IL (G) F (A) Command signal Q1 MOSFE gae (B) Volage Q1 MOSFE (C) Curren flowing ino Q1 MOSFE (D) Volage D1 diode (E) Curren in D1 diode (F) Volage LO inducor (G) Curren in LO inducor DS01207B-page Microchip echnology Inc.

17 Design Equais and Compen Seleci As previously discussed in Cinuous mode he inpu/oupu relaiship is equal o Equai 50. In Discinuous mode his relaiship is equal o Equai 54. he maximum ON ime will correspd o he minimum inpu volage VDC. he duy cycle can be chosen so ha in Equai 54 ON + F k < wih 0 < k < 1. Combining Equai 47 and Equai 49 and using he previous definii for ON + F gives an equai for ON max as shown in Equai 55. he resuling maximum duy cycle is shown in Equai 56. EQUAION 55: EQUAION 56: INDUCOR. ON max I is possible o compue he inducor L1 using Equai 54. he maximum ON minimum VDC and minimum RO are assumed which resuls in Equai 57. EQUAION 57: OUPU CAPACIOR k( V OU V DC min ) V OU kv ( OU V DC min ) D max L 1 kr O min V OU D max VDC min 2 2F PWM V OU he oupu capacior mus be able o supply he oupu curren during ON wihou having a volage drop greaer han he maximum allowed oupu ripple. Since he capacior is large i is possible o approximae he expenial discharge wih a linear behavior. he curren drawn from he capacior is he average oupu curren (IO av nom) and he charge los during ON is equal o Equai 58. herefore he volage drop is equal o Equai 59. EQUAION 59: A simplified represenai is shown in Equai 60. EQUAION 60: DIODE During ON he diode D1 is open wih he maximum reverse volage as shown in Equai 61. EQUAION 61: he average curren in D1 during OFF is shown in Equai 62. EQUAION 62: MOSFE I O av nom ON V DROP he average curren represened in Figure 13 is shown in Equai 63. EQUAION 63: he maximum volage represened in Figure 12 is shown in Equai 64. EQUAION 64: < V C RIPPLE I O av nom ON V RIPPLE C > V R max V OU + V Q F I D av I O av nom ON I Q1 av I O av nom V Q max V OU + V D EQUAION 58: Q ON I O av nom ON 2009 Microchip echnology Inc. DS01207B-page 17

18 FORWARD CONVERER he opology of a Forward Cverer shown in Figure 16 can be csidered a direc derivaive of he Push-Pull Cverer where e of he swiches is replaced by a diode. As a csequence he cos is usually lower which makes his opology very comm. FIGURE 16: FORWARD CONVERER OPOLOGY D1 VR NR VA A D2 B VB LO NP NS VS D3 VL CO RO VOU VDC VP Q1 opology Equais Referring o he seci Forward Cverers in AN1114 (see Inroduci ) he behavior of he sysem can be quickly summarized. he swich is driven by a waveform whose duy cycle mus be less han 50% as shown in Figure 17. FIGURE 17: Q1 MOSFE COMMAND SIGNAL IMING OFF Q1 Command ON R DS01207B-page Microchip echnology Inc.

19 Q1 ON (INERVAL 0 - ON) For his cfigurai he circui is redrawn as shown in Figure 18. FIGURE 18: FORWARD CONVERER OPOLOGY: INERVAL 0 - ON D1 V R NR VA A D2 B V B LO NP NS V S D3 VL CO RO VOU VDC VP Q1 Inpu Circui Behavior he inpu volage is direcly cneced o he winding NP and csequenly he do end of his winding is posiive respec o he n-do end. Similarly he do end of NR has a higher volage han he n-do end. Diode D1 is reverse-biased and no curren flows ino he winding NR. he volage he winding NP is shown in Equai 65. EQUAION 65: he volage winding NR is shown in Equai 66. EQUAION 66: V R V P N R V DC V Q V P ( V DC V Q ) N R he magneizing curren flowing ino he NP windings and he swich Q1 circui (curren ha would be flowing ino he ransformer if he secdary winding were open) is equal o Equai 67. he oal curren flowing ino NP is he sum of he magneizing curren and he oupu curren refleced o he primary hrough he ransformer. Oupu Circui Behavior Because of he volage polariy he primary windings he do end of he secdary winding is posiive compared o is n-do end. Csequenly D2 is forward-biased while D3 is reverse-biased. he secdary winding volage is shown in Equai 69. EQUAION 69: V S he volage o he righ of he recifying diode D2 is shown in Equai 70. EQUAION 70: ( V DC V Q ) V B V S V D ( V DC V ) V Q D EQUAION 67: I M () V P L M V DC V Q L M he volage he oupu inducor is shown in Equai 71. EQUAION 71: A posiive-slope ramp whose maximum value is reached a ON is shown in Equai 68. V L ( V DC V ) V Q D V OU EQUAION 68: I M ( ON ) V DC V Q L M ON he curren flowing hrough he oupu inducor and hrough D2 is shown in Equai Microchip echnology Inc. DS01207B-page 19

20 EQUAION 72: ( V N DC V Q ) V D V OU P I L () I L ( 0) A his poin he oal curren flowing ino he primary can be compued. I has wo cribuis: he magneizing curren (see Equai 67) and he load curren refleced back ino he primary as shown in Equai 73. EQUAION 73: I P oal L O ( V V DC V Q N DC V Q ) V D V OU I L ( 0) P L M L O Q1 OFF [INERVAL ON - (ON + R)] Based his cfigurai he circui is redrawn as shown in Figure 19. FIGURE 19: FORWARD CONVERER OPOLOGY: INERVAL ON - (ON + R) D1 VR NR VA A D2 B VB LO NP NS VS D3 VL CO RO VOU VDC VP Q1 DS01207B-page Microchip echnology Inc.

21 Inpu Circui Behavior Before he swich Q1 was opened he magneizing curren was flowing in NP. When he swich opens i reverses all he volages o cinue he flow. he do end of NR becomes negaive in respec o he n-do end and a similar behavior is experienced by he winding NP. Because of he polariy NR diode D1 becomes forward-biased and keeps he volage a he do end of NR e diode drop below ground. Magneizing curren can now flow hrough NR and diode D1 ino he power supply VDC as shown in Figure 19. he volage VR NR is shown in Equai 74. EQUAION 74: he volage NP is shown in Equai 75. EQUAION 75: When ON he curren in he rese winding equals he magneizing curren IM muliplied by he windings rai as shown in Equai 76. EQUAION 76: V R ( V DC + V D ) < 0 V P off N R ( V DC + V D ) < 0 Oupu Circui Behavior As previously menied he magneizing curren reverses all volages when he swich Q1 urns off. As a resul he do end of he secdary winding is more negaive han he n-do end and diode D2 becomes reverse-biased. he secdary volage is shown in Equai 77. EQUAION 77: o keep he curren flowing ino inducor LO is volage reverses so ha he lef end of he inducor is more negaive han he righ end and i would cinuously decrease; however he freewheeling diode D3 becoming forward-biased and ses VB o a diode volage drop below ground. he volage he inducor is now equal o Equai 78. EQUAION 78: Csequenly he inducor curren will decrease according o Equai 79: EQUAION 79: V S off N R V L ( V DC + V D ) V OU V D I R N R I M V OU + V D I L () I ( ON ) L O During R his curren has a down-slope and reaches zero when ON + R. his curren is he same curren ha is flowing ino he free-wheeling diode D Microchip echnology Inc. DS01207B-page 21

22 Q1 OFF [INERVAL (ON + R ) O ] In his cfigurai he circui is redrawn as shown in Figure 20. FIGURE 20: FORWARD CONVERER OPOLOGY: INERVAL (ON + R) - D1 VR NR VA A D2 B VB LO NP NS VS D3 VL CO RO VOU VDC VP Q1 Inpu Circui Behavior As so as he magneizing curren reaches zero (a ON + R) all of he energy ha had been sored ino he ransformer when ON has been released and diode D1 opens. Csequenly he volage drop NR becomes zero and he volages a boh he do end and he n-do end of NR equal VDC. he volage drop NP equally becomes zero so ha now he volage applied o he swich is VDC. Oupu Circui Behavior Nohing changes compared o he previous ime inerval. Design Equais and Compen Seleci INPU/OUPU RELAIONSHIP AND DUY CYCLE A he oupu a seady sae he curren in he inducor LO a 0 mus equal he curren a. Expressing he inducor volage as a funci of he inducor curren based Equai 72 and Equai 78 resuls in Equai 80 which in urn solves Equai 81. EQUAION 80: ( V N DC V Q ) V D V OU P ON L O V OU + V D L O OFF EQUAION 81: V OU he magneizing curren a ime 0 and ON + R is zero (a Seady sae). herefore ΔIM during ON mus equal ΔIM during R which is represened by Equai 82 (refer o Equai 65 and Equai 75). EQUAION 82: V DC L M he circui is now running a he maximum duy cycle when R equals OFF which means he full OFF period is needed o nullify he magneizing curren. In his case in Equai 82 R is replaced wih is maximum heoreical value OFF so ha ON max as shown in Equai 83 is derived from Equai 84. EQUAION 83: EQUAION 84: ( V DC V )D V Q D N R L M N P ON V DC R ON R ON max N R OFF ON max N R 1 D max heoreical N R N R ( ON max ) In he case of NR NP Dmax heoreical 0.5. DS01207B-page Microchip echnology Inc.

23 RANSFORMER: PRIMARY he core of he ransformer during operai moves in he firs quadran of he hyseresis curve. he change in flux according o he Faraday law as shown in Equai 85 is proporial o he produc of he applied volage VP and he ime x during which his volage is presen. EQUAION 85: In general ON + R k; he maximum value for ON is chosen as ON max k/2 when NP NR. As indicaed in Figure 21 he maximum value of ON is also dependen he rai NP/NR. Based he characerisics of he ransformer core ΔB is defined. From Equai 85 he primary number of urns can be deermined csidering he minimum value of VDC and csequenly he maximum duy cycle as shown in Equai 86. V P X EQUAION 86: ΔB A core D max where he unis are esla for ΔB and m 2 for A F ( core PWM A core ΔB V DC V min Q ) During ON his produc equals (VDCON) while during R he produc is NPVDC(R)/NR based Equai 65 and Equai 75 neglecing VQ and VD. In Figure 22(F) he produc (VDCON) equals area A1 while VDCNPR/NR equals area A2. I is preferable o have a ne ΔB 0 so ha in he hyseresis plane he operaing poin a he end of he PWM period has come back o he iniial poin. his guaranees ha he sysem will never drif oward saurai. he poin is ha he cdii can easily be fulfilled wih differen values of he raio NP/NR by selecing a differen number of urns he wo windings (see Figure 21). his provides an addiial degree of freedom in he design of he sysem. Replacing NP in Equai 81 and neglecing VD resuls in Equai 87. EQUAION 87: V OU F PWM A core ΔB NR can be deermined by csidering he behavior described in Figure Microchip echnology Inc. DS01207B-page 23

24 FIGURE 21: FORWARD CONVERER: VOLAGE ON HE MOSFE FOR DIFFEREN VALUES OF PRIMARY AND RESE WINDING URNS /2 /2 N 1 P VDC N R A2 NP NR VDC A1 R ON N 1 P VDC > 2V N R DC A2 NP > NR VDC A1 ON R N 1 P VDC < 2V N R DC VDC A2 NP < NR A1 R ON DS01207B-page Microchip echnology Inc.

25 FIGURE 22: FORWARD CONVERER WAVEFORMS (NP NR): PRIMARY SIDE ON R Q1 Command VDC VQ ON ON + R (A) VP (B) IM (C) VR (D) IR ID1 (E) VDC N R VDC VQ1 A1 A2 (F) IP IQ mr (G) (A) Command signal Q1 MOSFE gae (B) Volage VP primary winding NP (C) Magneizing curren IM (D) Volage VR rese winding NR (E) Rese winding curren equal o diode D1 curren (F) Volage Q1 MOSFE (G) Primary winding curren equal o Q1 MOSFE curren 2009 Microchip echnology Inc. DS01207B-page 25

26 RANSFORMER: PRIMARY WIRE SIZE As shown in Figure 22(G) he oal curren flowing ino he primary has wo cribuis: he magneizing curren (Equai 67) and he load curren (Equai 72) refleced back ino he primary resuling in Equai 88. EQUAION 88: ( V V DC V Q N DC V Q ) V D V OU P I P oal L M L O he primary wire size can hen be compued by firs referring o Figure 22(G) and hen replacing he real curren waveform wih a pulse having a square shaped waveform wih he same widh and whose ampliude is he value in he middle of he ramp (IQ mr). he curren is expressed as a funci of known (design requiremens) daa. Noe ha in hese compuais magneizing curren is negleced since he ransformer is designed o make i abou e-enh of he load refleced curren. herefore he inpu power PI equals Equai 89. EQUAION 89: P I he oupu power is shown in Equai 90. EQUAION 90: Solving Equai 90 resuls in Equai 91. EQUAION 91: his is he equivalen curren flowing in he primary wires when ON is a is maximum allowed value. he rms value is compued in Equai 92. EQUAION 92: V DC min I Q mr D max P O ηp I ηv DC min where η is he cverer efficiency I Q rms I Q mr I Q mr D max 1 P I Q mr -- O V DC min D max η P O 1 D max η V DC min D max D max RANSFORMER: SECONDARY WIRE SIZE As shown in Figure 24(C) he secdary curren equals he inducor curren (IO av) during ON. Again as for he primary curren he acual curren waveform is replaced wih a curren pulse having a square shaped wave form whose ampliude equals he mid-ramp inducor curren in he up-slope IO av nom. herefore he secdary average curren is equal o Equai 93. EQUAION 93: he rms value is compued as Equai 94. EQUAION 94: RANSFORMER: RESE WINDING WIRE SIZE he rese winding is no involved in carrying any curren refleced back ino he primary from he secdary. he ly curren i has o carry is he magneizing curren which is ploed in Figure 22(C). he magneizing peak curren compued in Equai 67 is shown in Equai 95. EQUAION 95: I Sav I O av nom I Srms I O av nom D max ON V DCmin ( ) V Q I M pk L M he rms value is he peak value muliplied by he square roo of he duy cycle and divided by radix 3 as shown in Equai 96. he correc AWG (wire size) can be deermined accordingly. DS01207B-page Microchip echnology Inc.

27 EQUAION 96: ( ) ON 3 V DC min V Q I M rms L M D max MOSFE During OFF he volage he Q swich is equal o Equai 97. EQUAION 97: V Q off 1 N R VDC A ON a spike due o leakage curren appears. I can safely be esimaed o be 30% of he peak value as shown in Equai 98. EQUAION 98: V Q off max N R V DC max he average curren flowing hrough he swich has been compued in Equai 92. DIODES able 1 summarizes he values of average curren and volage he diodes have o cope wih. ABLE 1: Diode D1 DIODE CURREN AND VOLAGE Cfigurai 0 - ON ON - (ON + R) (ON + R) - V D max 1 N R V DC max V F V D max V DC max D2 V F V D max N R V DC max V D max 0 D3 Legend: V D max VF is he diode forward volage. V DC max V F V F 2009 Microchip echnology Inc. DS01207B-page 27

28 OUPU FILER INDUCOR As in all oher opologies wih an LC low-pass filer a he oupu he inducor is seleced o no operae he sysem in Discinuous mode. he inducor is calculaed jus a he edge beween Cinuous and Discinuous mode (i.e. Criical mode) where he inducor curren sars from zero a he beginning of he PWM period and reurns o zero before he PWM period ends. In his cdii he average curren equals 0.5 he peak curren (or curren ripple) as shown in Figure 23. FIGURE 23: INDUCOR CURREN: PEAK CURREN RIPPLE CURREN AMPLIUDE AND OUPU CURREN A HE EDGE OF DISCONINUOUS MODE I Inducor IO PN IO av min IRIPPLE ON ON + R In Criical mode he minimum accepable oupu curren (defined by design requiremens) is made coinciden wih he average curren as shown in Equai 99. EQUAION 99: Using Equai 72 o compue IO ripple resuls in Equai 100. EQUAION 100: L O OUPU CAPACIOR I O ripple I O av min V DC min V OU D 2F PWM I max O av min he oupu volage ripple is mainly due o he capacior ESR. he inducor curren ripple flowing hrough i deermines a volage drop. herefore a capacior wih an ESR equal o Equai 101 mus be seleced. EQUAION 101: he capacior value iself can hen be compued wih Equai 102 which describes he value of he volage ripple aking ino accoun all compens. EQUAION 102: Neglecing ESL since i is normally very small (a leas for PWM frequencies less han 400 khz) resuls in Equai 103. EQUAION 103: V OU ripple I O ripple ESR < where I O ripple is compued as in Equai 98 V ripple C O D max ESL F I ripple ESR PWM F PWM C I O ripple D max D max F PWM ( V OU ripple I O ripple ESR) DS01207B-page Microchip echnology Inc.

29 FIGURE 24: FORWARD CONVERER WAVEFORMS: SECONDARY SIDE ON R Q1 Command (A) OFF VS (B) IO av IS ID2 (C) VB VD3 (D) VD2 (E) VL (F) IL (G) ID3 (H) (A) Command signal Q1 MOSFE gae (B) Volage VS secdary winding NS (C) Secdary winding curren equal o diode D2 curren (D) Volage a node B (E) Volage diode D2 (F) Volage LO inducor (G) Curren in LO inducor (H) Curren in diode D Microchip echnology Inc. DS01207B-page 29

30 WO-SWICH FORWARD CONVERER Clearly derived from he single-ended opology (Forward Cverer) his circui has significan advanages over single-ended forward cverers. A schemaic of his opology is shown in Figure 25. FIGURE 25: WO-SWICH FORWARD CONVERER OPOLOGY Q1 D3 VB VL VDC D2 D1 NP NS VS D4 LO CO VOU Q2 opology Equais Referring o he seci wo-swich Forward Cverers in AN1114 (see Inroduci ) he basic equais are reviewed firs followed by he seleci of circui compens. Boh swiches Q1 and Q2 are simulaneously driven by a square wave signal wih a duy cycle less han 0.5 as shown in Figure 26. FIGURE 26: SIGNAL DRIVING SWICHES Q1 AND Q2 R Q1 Command Q2 Command ON DS01207B-page Microchip echnology Inc.

31 Q1 ON Q2 ON (INERVAL 0 - ON) In his cfigurai he circui is redrawn as shown in Figure 27. FIGURE 27: WO-SWICH FORWARD CONVERER OPOLOGY: INERVAL 0 - ON IPRIMARY Q1 D3 VB VL VDC D2 D1 NP NS VS D4 LO CO VOU Q2 Inpu Circui Behavior he ransformer is cneced beween VDC and ground; he do end is more posiive han he n-do end and he magneizing curren is flowing hrough i. Boh diodes a he primary are reverse-biased and do no cribue o he operai. he volage he primary is equal o Equai 104. EQUAION 104: he secdary volage is equal o Equai 106. EQUAION 106: V S ( V DC 2V Q ) Equai 107 shows he volage he inducor. EQUAION 107: V P V DC 2V Q V L ( V DC 2V Q ) V D V OU he magneizing curren in he ransformer has a posiive slope increase as shown in Figure 30(C): EQUAION 105: I M () ( ) V DC 2V Q L M he oal curren in he primary is his magneizing curren plus he secdary curren refleced by he ransformer back o he primary. Oupu Circui Behavior Similar o he primary he secdary winding experiences a volage ha is higher a he do end compared o he n-do end. herefore diode D3 is forwardbiased and cducing he curren o he inducor while diode D4 is reversed-biased. As shown in Equai 108 he curren in he inducor has a linearly growing behavior (see also Figure 31(E)). EQUAION 108: ( V N DC 2V Q ) V D V OU P I L () I L ( 0) A his poin he oal curren in he primary windings can be compued as he sum of he magneizing curren and he secdary curren refleced back ino he primary (see Figure 30(F)) as shown in Equai 109. L O EQUAION 109: I P oal () I L ( 0) ( V ( ) N S N DC 2V Q ) V D V OU P V DC 2V Q L M L O 2009 Microchip echnology Inc. DS01207B-page 31

32 Q1 OFF Q2 OFF (INERVAL ON O (ON + R)) When boh swiches urn off he magneizing curren in NP reverses all he volages in he sysem. A he primary he n-do end par of he inducor becomes more posiive han he do end (see Figure 28). Boh diodes are forward-biased which provides a pah for he leakage curren from he n-do end of he primary hrough D2 ino he posiive of VDC ou of is negaive wire hrough diode D1 and back again o he ransformer. FIGURE 28: WO-SWICH FORWARD CONVERER OPOLOGY: INERVAL ON - (ON + R) Q1 D3 V B VL VDC D2 D1 VP NP NS VS D4 LO CO VOU Q2 he volage he primary is equal o Equai 110. EQUAION 110: V P off he magneizing curren can be expressed as Equai 111. EQUAION 111: ( V DC + 2V D ) I M () ( ) V DC + 2V D L M he magneizing curren reaches zero (ha is all he energy sored ino he ransformer primary during ON has been delivered back o he VDC inpu) a ime ON +R being (ON + R) <. Oupu Circui Behavior Because of he change in polariy of he volages due o he magneizing curren he polariy of he induced secdary volage is such ha he n-do end of he winding is more posiive han he do end. In he meanwhile he volage he oupu inducor changes polariy as well and is lef side ries o go very negaive bu is clamped o a diode volage drop below ground by diode D4 which is forward-biased. D3 he crary becomes reverse-biased. he inducor curren has is pah hrough diode D4 and ino he load and he oupu capacior. Equai 112 shows he secdary volage. EQUAION 112: V S Equai 113 shows he inducor volage. EQUAION 113: Equai 114 shows he curren. EQUAION 114: N S ( V DC + 2V D ) V L I L () V OU V D ( ) V OU + V D L O DS01207B-page Microchip echnology Inc.

33 Q1 OFF Q2 OFF (INERVAL (ON + R) O ) As seen previously from (ON + R) o here is no more energy in he ransformer primary he magneizing curren is zero and csequenly he wo diodes D1 and D2 are no cducing any more as hey are reverse-biased. In his cfigurai he circui is redrawn as shown in Figure 29. Volage VP and VS are boh zero and volage he swich will be less han VDC. Nohing changes a he secdary. FIGURE 29: WO-SWICH FORWARD CONVERER OPOLOGY: INERVAL (ON + R) - Q1 D3 V B VL VDC D2 D1 VP NP NS VS D4 LO CO VOU Q2 Design Equais and Compen Seleci INPU/OUPU RELAIONSHIP AND DUY CYCLE he inpu/oupu relaiship is shown in Equai 115 and is obained by equaing Equai 108 wih Equai 114 where ON and OFF respecively. EQUAION 115: V OU ( V DC 2V )D V Q D EQUAION 117: D max heoreical 0.5 Of course he real duy cycle will be somewha smaller han he maximum heoreical value o ake ino accoun olerances in he compuais. RANSFORMER: PRIMARY he number of primary urns is deermined from he Faraday equai shown in Equai 118 which resuls in Equai 119. Neglecing VD and VQ he duy cycle can be deermined as shown in Equai 116. EQUAION 116: EQUAION 118: ΔB V P ON A core V OU V DC D EQUAION 119: he maximum heoreical duy cycle (Equai 117) can be obained equaing he wo magneizing currens (Equai 105 and Equai 111) csidering ha R can be a maximum R OFF. ( V DC min 2V Q )D max F PWM A core ΔB 2009 Microchip echnology Inc. DS01207B-page 33

34 RANSFORMER: PRIMARY WIRE SIZE he curren flowing hrough he ransformer can be compued replacing he curren in Figure 30(F) wih an equivalen waveform having a csan ampliude (IP mr) correspding o he mid-ramp value. Csidering he relaiship of Equai 120 (beween he inpu power) and Equai 121 (he oupu power) his resuls in Equai 122. herefore he rms value is hen equal o Equai 123. EQUAION 120: RANSFORMER: SECONDARY WIRE SIZE By referring o Figure 31(C) he curren flowing ino he secdary winding can be deermined and he ramp a sep curren waveform can be approximaed wih a csan ampliude signal being he ampliude IO av nom. Based hese he correspding rms value is equal o Equai 125. EQUAION 125: I SECONDARY rms I O ar nom D max P O ηp I MOSFE EQUAION 121: he maximum volage he swiches mus be able o wihsand during OFF is shown in Equai 126. P I V DC min I P mr D max EQUAION 126: EQUAION 122: EQUAION 123: P O I P mr ηv DC min D max I P rms I P mr D max he maximum curren during ON is shown in Equai 127 which is he same curren flowing ino he ransformer. EQUAION 127: V Q max V DC max P O I P mr ηv DC min D max RANSFORMER: SECONDARY he number of urns are deermined by Equai 115 and Equai 119 and resuls in Equai 124. EQUAION 124: V OU F PWM A core ΔB DS01207B-page Microchip echnology Inc.

35 FIGURE 30: WO-SWICH FORWARD CONVERER WAVEFORMS: PRIMARY SIDE R Q1 Command Q2 Command ON (A) VP (B) IM (C) VDC VQ1 VQ2 (D) VD1 VD2 (E) IP mr IP (F) (A) Command signal Q1 and Q2 MOSFE gaes (B) Volage VP primary winding NP (C) Magneizing curren IM (D) Volage Q1 and Q2 MOSFES (E) Volage diodes D1 and D2 (F) oal primary curren IP (magneizing curren and load curren refleced back o he primary side of he ransformer) 2009 Microchip echnology Inc. DS01207B-page 35

36 FIGURE 31: WO-SWICH FORWARD CONVERER WAVEFORMS: SECONDARY SIDE R Q1 Command Q2 Command ON ON + R (A) VS (B) IS (C) VL (D) IO av nom IL (E) IO av nom ID3 (F) VD4 (G) ID4 (H) (A) Command signal Q1 and Q2 MOSFE gaes (B) Volage VS secdary winding NS (C) Curren flowing ino he secdary winding NS (D) Volage inducor LO (E) Curren in inducor LO (F) Curren flowing in diode D3 (G) Volage diode D4 (H) Curren in diode D4 DS01207B-page Microchip echnology Inc.

37 DIODES able 2 provides calculais for deermining diode volage. ABLE 2: Diode D1 V R DIODE VOLAGE Cfigurai 0 - ON ON -> (ON + R) (ON + R) -> V DC max + V Q V F V V DC max R D2 D3 V R V DC max + V Q V F V V DC max R V F VR ( V DC max + 2V D ) + V V D F 2 D4 V R ( V DC max 2V Q ) + V D V F V F Legend: VF is he diode forward volage. able 3 provides calculais for deermining average diode curren. ABLE 3: Diode D1 D2 D3 D4 DIODE CURREN Cfigurai 0 - ON ON -> (ON + R) (ON + R) -> 0 0 P O ηv DC min D max P O ηv DC min D max I O av nom I O av nom I O av nom 2009 Microchip echnology Inc. DS01207B-page 37

38 OUPU INDUCANCE he oupu inducor is compued so ha he oupu inducor is a he edge of he Discinuous mode when he oupu curren is he minimum required (IO av min). Using he same approach used for he Forward Cverer (see Figure 26 and Equais 99 and 100) from Equai 108 and Equai 128 (neglecing he volage drops he MOSFES and diodes) resuls in Equai 129. EQUAION 128: I O ripple I O av min EQUAION 129: L O OUPU CAPACIANCE V DC min V O Dmax F PWM I O av min he capaciance should presen he lowes possible impedance a he frequency of he curren ripple o achieve he lowes oupu volage ripple. he volage ripple is deermined by he ESR of he oupu capacior and by he volage drop CO due o he curren flowing hrough i (see Equai 130). EQUAION 130: ESR I O ripple I O ripple V OU ripple 1 C O D F PWM he oupu capacior value can be deermined from Equai 131. DS01207B-page Microchip echnology Inc.

39 HALF-BRIDGE CONVERER Design Equais Figure 32 presens he schemaic of a Half-Bridge Cverer. Please refer o he seci Half-Bridge Cverers in AN1114 (see Inroduci ) for a deailed descripi of he operai of he sysem. he waveforms (wo pulses wih adjusable widh and a 180 phase delay) used o drive he gaes of he wo Q ransisors are represened in Figure 33. Some margin is needed afer he falling edge of e pulse before he rising edge of he oher. hese ime inervals are called R. If no implemened a shor circui exiss and he swiches will be desroyed by he very high curren flowing hrough he pah from VDC o ground. Iniially CB is replaced wih a shor circui. FIGURE 32: HALF-BRIDGE CONVERER OPOLOGY VDC/2 C1 Q1 D1 NP NS D3 VB VL LO VDC VDC/2 C2 CB Q2 NS D4 CO RO VOU D2 FIGURE 33: Q1 AND Q2 COMMAND SIGNALS R R Signal Driving Q1 1ON Signal Driving Q2 2ON 2009 Microchip echnology Inc. DS01207B-page 39

40 Q1 ON Q2 OFF In his cfigurai he circui is redrawn as shown in Figure 34. FIGURE 34: HALF-BRIDGE CONVERER OPOLOGY: Q1 ON Q2 OFF VDC/2 C1 Q1 D1 NP NS D3 VB VL LO VDC VP VS D4 CO RO VOU VDC/2 C2 Q2 D2 Inpu Circui Behavior he volage capacior C1 develops a volage he primary circui where he do end is more posiive han he n-do end. Equai 132 shows he volage a he primary. EQUAION 132: V P Equai 133 shows he magneizing curren. EQUAION 133: V DC V 2 Q1 I M () V DC V 2 Q L M Oupu Circui Behavior Because of he volage polariy he primary he doend edge of he secdary is more posiive han he n-do end. Diode D4 is hen reverse-biased and D3 is forward-biased. Equai 134 shows he volage a he secdary. EQUAION 134: V S Equai 135 shows he volage he inducor. EQUAION 135: V L V DC V 2 Q V DC V 2 Q1 V D3 V OU > 0 Equai 137 shows he curren. EQUAION 136: V DC V 2 Q1 V D3 V OU I L () I L ( 0) L O DS01207B-page Microchip echnology Inc.