Fifth International Workshop on Network on Chip Architectures
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1 Fifth International Workshop on Network on Chip Architectures December 1, 2012 Vancouver, BC, Canada NoCArc 2012 u Vancouver, BC, Canada u December 1,
2 About NoCArc n Focus of the Workshop è Issues related to design, analysis and testing of on-chip networks n Areas of Interest è Performance analysis è Routing algorithms and router micro-architectures è Power and energy issues è Fault tolerance and reliability è Memory architectures è Design space exploration and tradeoff analysis è Validation, debug and test è Industrial case studies n Goal of the Workshop è To provide a forum for researchers to present and discuss innovative ideas and solutions related to design and implementation of multi-core systems on chip NoCArc 2012 u Vancouver, BC, Canada u December 1,
3 Number of Publications Number of Publications in the NoC area (IEEE Xplorer) Routing Packets not Wires, Dally and Towles, DAC 01 NoCArc 2012 u Vancouver, BC, Canada u December 1,
4 Past Editions n n n n n NoCArc 2008, Lake Como, Italy NoCArc 2009, New York, New York, USA NoCArc 2010, Georgia, Atlanta, USA NoCArc 2011, Porto Alegre, Brazil NoCArc 2012, Vancouver, Canada NoCArc 2012 u Vancouver, BC, Canada u December 1,
5 Submissions Submissions Accepted 5 0 NoCArc'08 NoCArc'09 NoCArc'10 NoCArc'11 NoCArc'12 NoCArc 2012 u Vancouver, BC, Canada u December 1,
6 Acceptance Rate 45,0% 40,0% 35,0% 30,0% 25,0% 20,0% 15,0% 10,0% 5,0% 0,0% NoCArc'08 NoCArc'09 NoCArc'10 NoCArc'11 NoCArc'12 NoCArc 2012 u Vancouver, BC, Canada u December 1,
7 Countries NoCArc'08 NoCArc'09 NoCArc'10 NoCArc'11 NoCArc'12 NoCArc 2012 u Vancouver, BC, Canada u December 1,
8 Review n 22 submissions, 29 TPC members n Review assignment è Assignment based on reviewers' expertises plus slightly manual adjustment to balance the workload è Each paper was assigned to 4 TPC members n All papers received 4 reviews NoCArc 2012 u Vancouver, BC, Canada u December 1,
9 Paper Selection n No face-to-face meeting for paper selection n Selection criteria è Based on the review scores (average, and average weighted by reviewer s confidence) ü Higher scored papers were accepted n Finally, 10 papers were accepted NoCArc 2012 u Vancouver, BC, Canada u December 1,
10 Program n Sessions è 09: Keynote Talk (Alex Yakovlev) è 10:30-12:10 - Session I ü Emerging Architectures & Technologies è 13:15-14:30 Session II ü 3D Design è 15:30-17:30 Session III ü Arbitration, Routing and Link Design NoCArc 2012 u Vancouver, BC, Canada u December 1,
11 Journal Special Issue n IET Computer & Digital Techniques è Special Issue on Emerging On-Chip Networks and Architectures NoCArc 2012 u Vancouver, BC, Canada u December 1,
12 Organizers and Program Committee n Organizers and TPC Chairs è Maurizio Palesi, Kore University, Italy è Terrence Mak, The Chinese University of Hong Kong n Technical Program Committee Paul Ampadu, University of Rochester, USA Federico Angiolini, inocs, Switzerland Giuseppe Ascia, University of Catania, Italy Davide Bertozzi, University of Ferrara, Italy Masoud Daneshtalab, University of Turku, Finland Giorgos Dimitrakopoulos, Univ. of Thrace, Greece Masoumeh Ebrahimi, University of Turku, Finland Natalie Enright Jerger, Univ. of Toronto, Canada José Flich Cardo, UPV, Spain Martti Forsell, VTT, Finland Yuho Jin, New Mexico State University, USA Shashi Kumar, Jönköping University, Sweden Zhonghai Lu, KTH, Sweden Radu Marculescu, CMU, USA Chrysostomos Nicopoulos, Univ. of Cyprus, Cyprus Juan Manuel Orduña Huertas, UPV, Spain Gianluca Palermo, Politecnico di Milano, Italy Partha P. Pande, Washington State University, USA Sudeep Pasricha, Colorado State University, USA Davide Patti, University of Catania, Italy Juha Plosila, University of Turku, Finland Umit Y. Ogras, Intel Corp., USA Amir-Mohammad Rahmani, Univ. of Turku, Finland Alberto Scandurra, STMicroelectronics, Italy Christof Teuscher, Portland State University, USA Xiaohang Wang, Zhejiang University, China Vittorio Zaccaria, Politecnico di Milano, Italy NoCArc 2012 u Vancouver, BC, Canada u December 1,
13 Keynote Talk Developing Survival Instincts in Computing Systems Alex Yakovlev School of Electrical and Electronic Engineering Newcastle University Newcastle upon Tyne, UK NoCArc 2012 u Vancouver, BC, Canada u December 1,
14 Session I ( ) n Emerging Architectures & Technologies (Chair: Chrysostomos Nicopoulos) è Network on Metachip Architectures (I. Hanninen, W. Buckhanan, G. Bernstein and M. Niemier) è Surface Wave Communication Systems for Onchip and Off-Chip Interconnects (A. Karkar, T. Mak, A. Yakovlev, T. Kenneth and R. Aldujaily) è A Structural Analysis of Evolved Complex Networks-on-Chip (H. Chung, A. P. Asnodkar and C. Teuscher) NoCArc 2012 u Vancouver, BC, Canada u December 1,
15 Session II ( ) n 3D Design (Chair: Jing-Jia Liou) è Power Efficiency of Wavelength-Routed Optical NoC Topologies for Global Connectivity of 3D Multi- Core Processors (L. Ramini, D. Bertozzi) è Deadlock-Free and Plane-Balanced Adaptive Routing for 3D Networks-on-Chip (N. Dahir, T. Mak, A. Yakovlev, R. AlDujaily and P. Missailidis) è A High-Efficiency Low-Cost Heterogeneous 3D Network-on-Chip Design (T. C. Xu, P. Liljeberg, J. Plosila and H. Tenhunen) NoCArc 2012 u Vancouver, BC, Canada u December 1,
16 Session III ( ) n Arbitration, Routing & Link Design (Chair: Alex Yakovlev) è Junction Based Routing: A Scalable Technique to Support Source Routing in Large NoC Platforms (S. Badri, R. Holsmark and S. Kumar) è Position-Based Weighted Round-Robin Arbitration for Equality of Service in Many-Core Network-on-Chips (H. Park and K. Choi) è Variability-Tolerant NoC Link Design (E. Kamel, M. El-Kharashi and M. Abuelyazeed) è Low Power Flitwise Routing in an Unidirectional Torus with Minimal Buffering (J. Mische and T. Ungerer) NoCArc 2012 u Vancouver, BC, Canada u December 1,
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