Si Detector Structures for HE Physics and Astronomy
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1 für und Si Detector Structures for HE Physics and Astronomy Rainer H. Richter for the MPI Semiconductor Lab : Advanced Instrumentation for Future Accelerator Experiments Bergen, 4. April 2005
2 Introductory remarks detectors for charged particles and X, ray photons für und applications: particle tracking = position resolved detection of individual charged particles imaging = position resolved integration / counting of photons or particles spectroscopy = measurement of photon (particle) energy imaging spectroscopy concentration on silicon detectors selection of examples personally biased apologies!
3 Semiconductor Detectors Structures für und Diode Structured Diodes Sideward Depletion Structure Silicon Drift Detector pn CCD DEPFET Avalanche drift diode
4 Diode für und
5 Structured Diode Strip Detector für und particle tracking = detection of individual charged particles 1D resolution
6 Structured Diode Strip Detector für und particle tracking 2D resolution
7 Strip Detector example ATLAS Silicon CERN LHC application particle tracking strip detector für und format 6 x 6 cm² x 285µm single sided p strips on n substrate strips 768 strip pitch 80 µm strip width 20 µm resolution 23 µm rms readout ac coupled, binary strip capacitance 20 pf/cm coupling 1 pf/cm interstrip ATLAS silicon tracker 55 m² of silicon strip and pixel detectors! ATLAS strip detector, wedge shape, forward
8 Strip Detector Limitation für und?? ambiguity at high occupancy» 2D pixel sensor
9 Structured Diode Pad Detector / Pixel Sensor für und "p on n" 2D resolution particle tracking = detection of individual charged particles imaging = count / integrate particles or photons
10 Structured Diode Pad Detector / Pixel Sensor für und "n on n" 2D resolution particle tracking = detection of individual charged particles imaging = count / integrate particles or photons
11 Hybrid Pixel Sensor 1 preamp per pixel!» für und front to front mounting of detector and readout chip ( bump bonding ) electroplating / reflow "lift off solder (PbSn) bumps Indium bumps
12 Diode electronic noise für und 2 kt 2 1 C A +2 g m tot 1 ENC = thermal noise optimum shaping time opt» = 2 A3 A1 For good resolution high count rate capability the total capacitance must be minimised!! 2 kt C tot 2 q I L 3 gm 2 a f C tot A2 + q I L A 3 1/f noise leakage
13 Sideward Depletion Structure Emilio Gatti & Pavel Rehak, 1983 für und asymmetric bias fully depleted volume minimum capacitance of bulk contact (independent of sensitive area)?? signal extraction??» advanced detector concepts
14 Silicon Drift Detector (SDD) für und drift field surface 1D position resolution by drift time measurement start trigger!! Emilio Gatti & Pavel Rehak, 1984
15 Spectroscopy SDD für und one sided field strip system homogeneous entrance window Josef Kemmer & Gerhard Lutz, 1987
16 SDD with integrated readout electronics für und integration of first FET» minimization of stray capacitance» good energy resolution» high count rate capability» robust aginst pickup, microphony comparison SDD / Si diode Si diode (10 mm² x 300 µm) C = 3.5 pf SDD C = 200 ff
17 SDD vs. Diodes det ect or t ype pin Si(Li) für und H PGe SDD cooling met hod t hickness [mm] act ive area [mm² ] t h e r m o e le c t r ic liq uid nit r o g e n liq uid nit r o g e n t h e r m o e le c t r ic max. t hroughput [kcps] 4 00 det ect or t ype dead t ime vs. count rat e FW H M [ev] Mn K vs. count rat e 10 0 kc ps 15 0 kc ps kc ps 1 kc ps 5 0 kc ps 10 0 kc ps 1 Mc ps pin 5 0 % 9 5 % ~ 18 0 Si(Li) 5 0 % 9 5 % ~ 12 9 ~ 19 0 H PGe 5 0 % 9 5 % ~ 10 9 ~ 17 5 SDD 5 % 10 % 5 0 % ~ 14 0 ~ 16 0 ~ 2 15 ~ 2 6 0
![t hroughput [kcps] 4 00 det ect or t ype dead t ime vs. count rat e FW H M [ev] Mn K vs.](/docs-images/49/18029541/images/page_17.jpg "count rat e 10 0 kc ps 15 0 kc ps 8 0 0 kc ps 1 kc ps 5 0 kc ps 10 0 kc ps 1 Mc ps pin 5 0 % 9 5 % ~ 18 0 Si(Li) 5 0 % 9 5 % ~ 12 9 ~ 19 0 H PGe 5 0 % 9 5")
18 Spectroscopy SDD options material geometry size für und thickness silicon 5 mm², ~ 140 ev 10 mm², ~ 150 ev 5 mm² 1 cm² 300, 500 µm applications X ray spectroscopy ray spectroscopy (scintillator readout) 20 mm², ~ 170 ev 30 mm², ~ 180 ev (MPI semiconductor laboratory)
19 Spectroscopy SDD example Peltier cooled detector module applications X ray spectroscopy für und key parameters area 10 mm² thickness 500 µm temperature 20 C energy resolution < 140 ev peak/background shaping time 0.5 µsec (pin, Si(Li) 20 µsec) count rate 106 sec 1 energy range 100 ev 30 kev
20 Mars Exploration Rover (MER) mission profile für und 2 independent mobile landers Spirit & Opportunity arrived 04./ mission goals find traces of water investigate the geology of Mars prepare manned mission PI of APXS system: R. Rieder MPI für Chemie, Mainz
21 APXS (Alpha Particle X ray Spectrometer) für und electronics SDD X ray detector detectors collimator Cm 244 source shutter contact ring Curium 244 and X ray sources Silicon Drift Detector» PIXE, XRF particle detectors» Rutherford backscattering similar system on board of the ROSETTA comet lander
22 Results of SDD measurements on Mars für und SDD X ray spectra of Marsian samples for comparison: X ray spectrum of Marsian sample by Pathfinder mission (1997) equipped with PIN diode
23 Applications XRF in Art Analysis für und fingerprint of Goethe s ink editing of Faust I during Faust II work J. W. v. Goethe, Faust I original manuscript experiment & figures by O. Hahn (BAM, Berlin) with portable system arttax (RÖNTEC)
24 pn CCD für und Lothar Strüder et al., 1987
25 pn CCD vs. MOS CCD MOS CCD ( MOS CCD ( video CCD video CCD )) für und» MOS transfer gates MOS transfer gates implanted pn junctions buried channel buried channel» deep transfer partial depletion partial depletion» full depletion frontside illumination frontside illumination» back entrance window serial readout serial readout» 1 preamp / channel pnccd
26 pn CCD options material geometry für und pixel size CCD format thickness silicon µm 1 x 1 6 x 6 cm² 300, 500 µm applications X ray imaging spectroscopy optical, NIR imaging monolithic 6 x 6 cm² pn CCD for XMM Newton (MPI semiconductor lab)
27 Simulation of Semiconductor structures» für und Continuity equations Simultaneous consideration of» Generation» Recombination» Drift» Diffusion» Drift due to electric field derived from Poisson Equation» Numerical simulation: simultaneous solution of diffusion and Poisson equation with boundary conditions
28 Charge transfer in the pnccd (TeSCA Simulation) für und
29 pnccd s properties : Energy Resolution für und Fano 6 kev ΔE= 120 ev ENC= 3 5 el ΔE ev
30 pnccd s properties : Radiation Hardness für und The radiation damage was simulated with 10 MeV protons
31 pn CCD vs. MOS CCD ty p e für und C HA N DRA MI T / LL FI ( o r i g i n a l) MI T / LL BI X MM e n e r g y r e s o lu ti o n q u a n tu m e f f i c i e n c y r e a d o u t p i x e l c e ll d e te c to e V & 5.9 k e e V & 10 k e V ti m e size size FW HM [ e V] [%] [mse c ] [ µm² ] [c m² ] x x x x 2.5 Le i c e s te r x x 2.4 S RO N x x 2.8 pnccd x x 6 backside illumination full depletion large pixels, parallel readout
32 pn CCD example focal plane imaging spectrometer of the XMM Newton satellite applications für und X ray imaging spectroscopy XMM Newton key parameters format 6 x 6 cm² thickness 300 µm pixel size 150 µm energy resolution 130 ev readout time 4.5 msec energy range 100 ev 20 kev temperature 100 C relative intensity 384 x 400 pixels energy [kev] remnant of supernova explosion observed by T. Brahe (1572)
33 Concept of frame store PN CCD Frame store PN CCD different from MOS CCDs für und anode + JFET on chip pn junctions instead of MOS gates per channel p transfer deep in bulk pn junction (homogeneous) backside illumination 0.5 mm n fully depleted p
34 Frame store pnccd results Frame store CCD concept: für und Format: pixel Size: µm² or µm² Low energy response at Carbon K
35 CCD drawbacks: Out of time events power consumption für und pn CCD limitation 6 % out of time events» framestore pn CCD 0.4 % out of time events
36 Depleted P Channel FET (DEPFET) J. Kemmer & G. Lutz, 1987 für und internal amplification no interconnection strays readout on demand non destructive readout» unit cell of an Active Pixel Sensor» integrated readout device of SDD, CCD,
37 Operation principle of DEPFET für und» All charge generated in fully depleted bulk assembles underneath the transistor channel steers the transistor current Combined function of sensor and amplifier low capacitance and low noise Signal charge remains undisturbed by readout repeated readout for noise reduction Complete clearing of signal charge no reset noise Full sensitivity over whole bulk Thin radiation entrance window on backside
38 DEPMOS Technology at HLL (ISE DIOS simulation) Double Poly / Double Al Technology on highohmic 150mm substrate für und Clear Gclear Channel Metal 2 Metal 2 Metal 1 Metal 1 n+ Oxide Poly 2 along the channel Poly 1 Poly 2 Deep p Deep n perpendicular to the channel (Clear region) Double metal necessary for matrix operation Self aligned implantations with respect to polysilicon electrodes => reproducible potential distributions over large matrix areas Low leakage current level: < 200pA/cm² (fully depleted 450µm) p
39 Double metal ILC matrix für und
40 Internal amplification hit response» Measured current change per signal electron (calibration with Fe55)» für und» Circular shape: ca. 300pA/e Rectangular shape ca. 400pA/e TeSCA (2D, time dependent) hit response to a generation of 1600 electron hole pairs
41 DEPFET 3D Simulation (K. Gärtner WIAS Berlin) für und localized generation of electron/hole pairs simulates the incidence of photons or particles very powerful tool for design and technology optimization
42 Charge collection losses? Device simulation now available in 3D VClear = 2V für und VClear=0V
43 DEPFET test results: Noise and Spectroscopy für und Single circular DEPFET L = 5 µm, W = 40 µm time continuous filter, = 6 µsec
44 DEPFET pixel matrix für und Low power consumption Fast random access to specific array regions Read filled cells of a row Clear the internal gates of the row Read empty cells Difference of readings (filled/empty) measures charge
45 DEPFET options geometry pixel size µm (circular) für und µm circular DEPFET (linear) DEPFET + SDD = Macro Pixel scalable size ( 1 cm ) APS format with wafer size 4x4 Macro Pixel prototype with 1 mm pixels linear DEPFET
46 DEPFET example 1 Active Pixel Sensor for the XEUS Wide Field Imager application für und X ray imaging spectroscopy key parameters 75 x 75 µm² DEPFET pixel format prototype 64 x 64 (final 1024 x 1024) pixel size 75 µm thickness 500 µm energy resolution 130 ev readout time ~ msec / frame ~ µsec / row energy range 100 ev 30 kev temperature 60 C 64 x 64 DEPFET based Active Pixel Sensor
47 The XEUS mission Mission concept: für und X ray telescope consisting of two satelites, mirror (MSC) and detector (DSC) spacecraft Formation flight; active control of focal length with 1 mm3 accuracy Replacement of DSC possible Increase of mirror surface from 6 m2 to 30 m2 possible Total mission lifetime ca. 25 yrs. 2 mirror technologies in discussion: Slumped glass / ESA high precision pore optics Parameter Specification (goal) Energy range kev Telescope focal length 50 m Mirror area 6 m2 (MSC 1) 30 m2 (MSC 2) Fields of view 5 (WFI) 1 (NFI) Energy C Kα 50 ev (WFI), 2 ev (NFI) Energy Mn Kα 125 ev (WFI), 5 ev (NFI)
48 DEPMOSFET Prototypes for XEUS Why DEPMOSFET sensors? für und Fully depleted device: Homogeneous entrance window with 100 % fill factor and good QE Low internal gate capacitance yields low system noise No charge transfer needed: Radiation hardness Low dead time (500:1), no out of time events Fast readout: low pile up probability Area efficient: no frame store area needed Windowing / sparse readout can be implemented by pixel interconnection Low power consumption Additionally: Future option of repetitive non destructive readout (RNDR)
49 Prototype matrices für und 64 x 64 pixel arrays with 75 x 75 µm2 pixel size Complete set of control & readout electronics 2 kinds of hybrids: PCB & Ceramic PCB for pre testing and structure selection Ceramic for high performance tests at low temperature Modular, PC based and scalable readout system for test & evaluation PCB type Hybrid Ceramic Hybrid
50 Noise für und Pixel noise distribution is very homogeneous. Calibration of noise values using gainmap yields noise in e ENC Mean 40 C: 13 ev 3.6 e ENC
51 Energy resolution α β Mn K Mn K 1000 für und 100 α α Counts Al K Si K Energy resolution: 133 ev Mn Ka Line corresponding to 6.9 e ENC Escape Peak Next issues: Backside illumination: Source on top of entrance window Peak to background ratio Discrepancy in energy resolution Mn K Low energy response Mn K Optimizing charge collection 10 α Frontside illumination: Source illuminates electronic side Counts Energy (kev) β Escape Peak 10 Energy resolution: 131 ev Mn Ka Line corresponding to 6.4 e ENC Energy (kev) 5 6 7
52 Imaging Illumination from backside Baffle: 300 µm thick silicon Minimal structure size: 150 µm Exposure ca frames für und 500 m µ 800 m µ 4.5 mm 15 mm Contour plot from ADU maps Hitmap with 100 ADU threshold # Hit s Row # 1.370E E E E E E E E E E E E E E E E E E E E5 40 Row # 60 Values Column # Column #
53 PXD4 DEPFET: Two projects on one wafer für und XEUS ILC purpose imaging spectroscopy particle tracking sensor size 7.68 x 7.68 cm² 1.3 x 10 cm², 2.2 x 12.5 cm² pixel size 75 µm 25 µm sensor thickness µm 50 µm noise 4 el. ENC ~ 100 el. ENC Readout time per row 2.5 µs 20 ns
54 DEPFET example 2 Active Pixel Sensor for the ILC inner vertex detector application für und particle tracking key parameters format prototype 128 x 64 (final 4000 x 520) pixel size prototype 36 x 22 µm² (final 20 µm ) thickness 450 µm (final 50 µm ) readout time 20 nsec / row 50 µsec / frame 128 x 64 DEPFET based Active Pixel Sensor (Uni Bonn, Uni Mannheim, MPI HLL)
55 ILC Vertex Detector 1st layer module: 100x13 mm2, 2nd 5th layer : 125x22 mm2 120 modules Impact parameter resolution für und d 5 μm + 10 μm/(p sin3/2 ) TESLA TDR Design APS with pixel size: µm low mass: 0.1 %Xo per layer close to IP, r = 15 mm (1st layer) 5 barrels stand alone tracking overall: ~ 1GPixel
56 Detector requirements for ILC TESLA TDR: für und high position resolution (vertex reconstruction, momentum resolution) low radiation length of inner layers low power consumption (500MPixel + cooling additional material not allowed) high readout out speed for background suppression radiation tolerant pixel size (20 30 µm)2 5(+)10/p sin3/2 µm sensor thickness d=50µm 0.1% X0 per layer ( layer r=13mm ) DEPFET: Pmean< 1W 300 K 50MHz, read out speed occupancy < 1% krad (5 years) 5 x 109 neq/cm2
57 Matrix operation gate für und DEPFET matrix reset off off on reset off off n x m pixel off off V GATE, ON V GATE, OFF IDRAIN drain V CLEAR, ON VCLEAR, OFF V CLEAR Control 0 suppression output o Select one row via external Gates and measure Pedestal + Signal current o Reset that row and measure pedestal currents o Collected charge in internal gate ~ (Difference of both currents) o continue with next row...
58 Module Concept/Power Consumption sensitive area thinned to 50 µm, supported by a 300 µm thick frame of silicon für und active area : sensor + steering chips whole vtx d (5 layers + pulsed: 1/200 ) : sensor : 0.3W steering : ~ 3 4 W r/o chip : 2 3 W whole vtx d: ~5 7 W low power consumption little cooling!
59 Matrix operation/ Test hybrid Control Chips: Switcher für und 128x64 pixel DEPFET Matrix o Select one row via external Gates and measure Pedestal + Signal current o Reset that row and measure pedestal currents o Collected charge in internal gate ~ (Difference of both currents) o continue with next row... Readout Chip: CURO
60 Readout chip: Curo M. Trimpl Uni Bonn für und see talk by M. Trimpl at LCWS workshop Stanford,
61 Control chip: Switcher I. Peric, P. Fischer Uni Mannheim für und
62 DEPFET system in the lab für und
63 Testbeam: Setup für und
64 Testbeam: First results für und
65 Why DEPFET Arrays for the ILC? 1. Charge generation and first amplification in a fully depleted pixel cell: good Signal/Noise 2. No charge transfer needed: better rad. hardness against hadronic irradiation für und fast read out 3. Wafer scale arrays possible, no stiching of reticles (chips) needed: easier module construction, less material 4. Only one row at a time active, read out at the ladder end: low power consumption, less material for cooling How to build and handle thin (tens of μm) DEPFET arrays??
66 Processing thin detectors the idea a) oxidation and back side implant of top wafer Top Wafer für und Handle <100> Wafer open backside passivation b) wafer bonding and grinding/polishing of top wafer c) process passivation d) anisotropic deep etching opens "windows" in handle wafer
67 Diodes & Teststructures on thin Silicon * test bondability of implanted oxide & electrical performance of diodes on thin silicon * für und 2 types of thinned diodes Type I: Simplified standard technology Type II: Implants like DEPFET config. p+ guard ring + n SiO2 n+ Al structured p+ on top unstructured n+ in bond region 3 Wafers SiO2 p+ Al unstructured n+ on top structured p+ in bond region 3 Wafers * + 4 Wafers with standard Diodes as a reference *
68 PiN Diodes on thin Silicon 250 μm, 4 type I diodes, 10 mm 2 Al pa/cm2 reverse current (pa) reverse current (pa) für und 50 μm, 4 type I diodes, 10 mm 2 bias voltage (V) pa/cm2 bias voltage (V) Wafer Bonding: MPI for Microstructure Physics, Halle, (U. Gösele, M. Reiche) Top Wafer grinding and polishing: Sico Wafer GmbH, Jena Processing and deep etching: HLL
69 Material Budget Estimated Material Budget (1 st layer): für und Pixel area: 100x13 mm2, 50 μm : 0.05% X0 steer. chips: 100x2 mm2, 50 μm : 0.008% X0 (massive) Frame :100x4 mm2, 300 μm : 0.09% X0 reduce frame material!!! "support grid" perforated frame: 0.05 % X0 total: 0.11 % X0
70 Radiation Effects Gate Dielectrics 180 nm SiO nm Si3N4 für und Vth = f ( N B, Φ MS, Q f ) N it e 2Φ f Cox N ot e Cox 1. positive oxide charge and positively charged oxide traps have to be compensated by a more negative gate voltage: negative shift of the theshold voltage 2. increased density of interface traps: higher 1/f noise and reduced mobility (gm) see talk by L. Andricek at LCWS workshop Stanford, March 2005
71 Vth : X ray, Mo target, 30kV 9krad/h, 24 h annealing after each irradiation period für und» Vth (V) ~1 week irradiation» Dose (krad)
72 Avalanche drift diode principle für und» New concept: Combination of large area drift diode with small area (point) avalanche structure» Focus electrons onto small area avalanche region independent on point of generation of the electron Drift diode with cylindrical geometry focuses electron on centre point
73 Drift diode and avalanche structure Drift diode für und Avalanche diode: add deep p implant increase voltage to fully deplete deep p Increase deep p in centre to generate homogeneous high field region Increase deep p ring doping to bring innermost ring voltage close to High energy n implant avalanche region to increase allowed range of bias voltages and omit low field region
74 Avalanche drift diode simulation results» Potential distribution für und
75 EUSO Extreme Universe Space Observatory für und Atmos phe ric Sounding km EECR A t m o s ph e r e Fluo r e s c e nc e Extreme energy particle showers Če r e nko v in earth atmosphere: km Ear t h M.C.M. 0 2 Observation of scintillation light from space based observatory
76 MAGIC Gamma ray Particle shower Observation of Cherenkov light from ground based telescope ~ 10 km Che ren kov ligh t für und Major Atmospheric Gamma Imaging Cherenkov Telescope ~ 1o ~ 120 m R. Wagner
77 Summary» Variety of silicon detector structures and possible applications was discussed für und» Hopefully this stimulates thoughts about new detector structures and new applications.
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