CIS SCADA re-engineering project. Enrique BLANCO Industrial Controls & Electronics Group
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1 CIS SCADA re-engineering project Enrique BLANCO Industrial Controls & Electronics Group
2 Introduction CIS: Control and Interlock system for the SPS main power converters Project goal Re-engineering of the supervision of the control and interlock system Why? Because the current supervision has more than years old and the HP-UX platform is not any more supported at CERN. Risks! External project: Outsourced to GTD Large but low-quality and sometimes obsolete documentation
3 Architecture POWER SUPPLY FROM 8kV SUBSTATION ("BUSBAR") -P MRES S - -P MRES S - DC V FR CE CPU CPU DC V FR CE S- S- S- S- S- IM IM IM IM IM SM SM SM S - SM S - SM SM SM SM SM SM SM SM SM SM SM SM SM SM SM SM SM S M S M - P S I MA TI C S - D CV C P U S - SIM ATI C S- I M I M -P MR ES S - SM SI MA TI C S- D CV CP U EE PROM S - S - SM SM IM SEN D I M SM S IM AT IC S - SM SM SM SM SM SM SM -P S IM AT I C S - -P S - -P S - -P S - DC V SM C PU DC V DC V DC V S- S - C PU EE PROM C PU CP U IM I M S- S - S- S - S - S- SI EM EN S - P S - I M I M I M I M SM S- IM I M D CV SM S - SM S - DU MMY S- C PU S - S - I M IM SM SM S - SM SM SM SM SM SM SM SM S M S M D UMMY SM DU MMY SM SM S M SM SM SM SM SM SM SM SM SM SM SM S M - P MR ES S I MA TI C S - D CV SM C PU S - S - IM I M - P S IM AT IC S - SM S IM AT I C S - DC V FR CE CP U EE PROM SIM ATI C S- S - SM IM IM SEN D SM SM S IM AT IC S - SM SM SM SM SM SM SM D UMMY -P S- B A TF D C V F R CE SM C P U SMD's POWER CONVERTER CONTROL ARCHITECTURE x CPU x Profibus x Fast Input x Normal Input x 8 Analogue Input x Normal Output S - S- IM I M -P M RE S S IM AT I C S - SM S- DC V C PU S- S - SM I M S END IM SM SM S- SM SM SM SM SM SM SM - P SI M AT IC S- B A TF D C V F R CE SM CP U S - S - IM IM - P S- SM S - B A TF D C V F R CE C PU EE PROM S - S - SM I M IM SM SM S - SM S M SM SM DUM MY S M SM SM -P MR ES S - D CV SM C PU S - S IM ATI C S - -P MR ES S - IM I M -P M RE S SI MA TI C S- SM S IM AT IC S - BATF DC V FR CE B AT F D C V C P U CPU S - S- I M IM S END SM SM S- S- S - S- SM SM IM IM IM SM SM S - SM SM SM SM SM SM SM SI EM EN S - P S - B A TF D C V F R CE SM C PU S M S - S - SM SIM ATI C S - I M IM SM S - DU MMY SM SM S M S- SM SM S M S M CP DUM MY SM SM CIS CONTROL & INTERLOCK SYSTEM FOR THE SPS MAIN POWER CONVERTERS CERN NETWORK "BUSBAR" PLC 8kV Power Station MWatts SMQ EEPR O M SMQ SMQ MASTER PLC SMD SMD SMD SMD SMD SMD SMDi POWER CONVERTER RECTIFIER FILTERS BY PASS SPS MAGNET DIPOLES SMD SMD SMD SMD SMD SMD SMD
4 Interventions done in 9 (until August) EDMS: 99 Project Engineering Change Request Hardware Replacement of the ancient PLC master and its Profibus Cards by a new S- PN/DP with Ethernet integrated Installation of a new SCADA Data Server (standard solution adopted by EN/ICE) located in the CCC with BE/CO h support in case of problems. Software Redeployment of the master code in the new PLC (Code execution time implies collateral effects!) Development and deployment of a TSPP communications component allowing the visualization of the status. We have integrated an UNICOS component allowing a full deployment of the basic SCADA UNICOS package.
5 Re-engineering activities during 9 PLC Analysis of the PLC code to get a better knowledge of undocumented and/or obsolete-documentation components: Status and historical information. We have now identified the events and their format. In principle no unknowns in the data format which must be read in the PLC. Still not an exhaustive list of possible events and commands results are recorded. SCADA Analysis of the HP-UX (Current supervision) synoptics to capture the command codes sent. We have libraries of command with their associated command created and operational. Tests Extensive tests during ½ week of orders/commands and the subsequent return status in the PLC This gave us the opportunity to see that we get even more status information in our SCADA than we have in the HP-UX (due to the polling mechanism of the HP-UX!)
6 Current Status and To Do list CURRENT STATUS Original application in the PLC cohabiting with the UNICOS TSPP components: : allows to have all the data generated by the PLC and not only the polled by the HP-UX supervision Operational UNICOS-like SCADA capturing and showing status of the main power converters. TO DO LIST PLC: Include the event mechanism allowing TSPP events. SCADA: Devices development: SMD ( instances), SMQ ( instances), Busbar, CIS. Creation of Synoptics (drag & drop actions): Specialist and Operator views Event manager. The events are visualized in a different way than in the UNICOS Alarms manager. The alarms contains features: priorities, assignation (operator, experts, ) Tests: Need MD days to test.
7 Current Status
8 Risk analysis during Hardware The current HP-UX is not any more supported at CERN, but still two interchangeable SCADA machines are installed in the BA control room. Tests: Status values: No risk because the installed PVSS SCADA can run in parallel with the HP-UX without any lost of functionality. A regular follow up of the statuses will allow as to gain confidence and ensure that no critical statuses are left out of the new SCADA. Commands: No possible cohabitation between both SCADAS, HP- UX must be command-disabled when the PVSS SCADA will start sending commands. Still statuses can be read from both. 8
9 Planning March-October SCADA device development May-June MD days to allow us to consolidate the STATUS information September-October MD days to allow us to consolidate the COMMANDS. High autonomy must be foreseen to execute a large variety of commands and to check that the PLC receives the right information. Statuses must also be cross-checked December Final delivery Product acceptance 9
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