Education Ph.D. in Computer Sciences, March 2010 Department of Computer Architecture, Technical University of Catalonia (UPC), Barcelona, Spain.

Size: px
Start display at page:

Download "Education Ph.D. in Computer Sciences, March 2010 Department of Computer Architecture, Technical University of Catalonia (UPC), Barcelona, Spain."

Transcription

1 Marc Casas Guix Education Ph.D. in Computer Sciences, March 2010 Department of Computer Architecture, Technical University of Catalonia (UPC), Barcelona, Spain. 5-years degree in Applied Mathematics (equivalent to M.S.) June Faculty of Mathematics and Statistics (FME), UPC, Barcelona, Spain. Honors and Awards Best Paper Finalist, International Conference for High Performance Computing, Networking, Storage and Analysis (SC 15). Marie Curie Fellow (Beatriu de Pinós - Marie Curie COFUND 7FP Award) September Now. Scholarship for Research Staff Training (Beca de Formación de Personal Investigador, FPI) from the Spanish Government. September August Best Paper Award at the International Euro-Par Conference on Parallel and Distributed Computing, (Euro-Par) August Scholarship from Computer Architecture Department to develop analytical models of parallel programs. September August Award from Bank of Manresa (Caixa de Manresa) for placement among the top 300 undergraduates in Catalonia during the academic year Employment Barcelona Supercomputing Center, Spain. Senior Researcher June Now Lawrence Livermore National Laboratory, USA. Postdoctoral Researcher May May 2013 Barcelona Supercomputing Center, Spain. PhD Student July April 2010 Journals 1. M. Casas, G. Bronevetsky, Evaluation of HPC applications Memory Resource Consumption via Active Measurement, accepted in IEEE Transactions on Parallel and Distributed Systems (TPDS), D. Chasapis, M. Casas, M. Moreto, R, Vidal, E. Ayguade, J. Labarta and M. Valero, PAR- SECSs: Evaluating the Impact of Task Parallelism in the PARSEC Benchmark Suite, accepted in Transactions on Architecture and Code Optimization (TACO), S. Chen, G. Bronevetsky, B. Li, M. Casas, L. Peng, A framework for evaluating comprehensive fault resilience mechanisms in numerical programs, The Journal of Supercomputing, Volume 71, Issue 8, pages , J. González, J. Giménez, M. Casas, M. Moretó, A. Ramírez, J. Labarta, M. Valero, Simulating Whole Supercomputer Applications, IEEE Micro, Volume 31, Number 31, pages 32-45, M. Casas, H. Servat, R. M. Badia, J. Labarta, Extracting the Optimal Sampling Frequency of Applications Using Spectral Analysis, Concurrency and Computation: Practice and Experience, Volume 23, Number 3, pages , M. Casas, R. M. Badia, J. Labarta, Automatic Phase Detection and Structure Extraction of MPI Applications, International Journal of High Performance Computing Applications (IJHPCA), Volume 24, Number 3, pages , 2010.

2 International Conferences 1. E. Castillo, M. Moreto, M. Casas, L. Alvarez, E. Vallejo, K. Chronaki, R. M. Badia, J. L. Bosque, R. Beivide, E. Ayguade, J. Labarta, M. Valero, CATA: Criticality Aware Task Acceleration for Multicore Processors, accepted in the 30th IEEE International Parallel & Distributed Processing Symposium (IPDPS), L. Alvarez, M. Moreto, M. Casas, E. Castillo, X. Martorell, J. Labarta, E. Ayguade, M. Valero, Runtime-Guided Management of Scratchpad Memories in Multicore Architectures, accepted in the 24th International Conference on Parallel Architectures and Compilation Techniques (PACT), L. Jaulmes, M. Casas, M. Moreto, E. Ayguade, J. Labarta, M. Valero, Exploiting Asynchrony from Exact Forward Recovery for DUE in Iterative Solvers, Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis (SC 15), pages 53:1-53:12, L. Alvarez, L. Vilanova, M. Moreto, M. Casas, M. Gonzalez, X. Martorell, N, Navarro, E. Ayguade, M. Valero, Coherence protocol for transparent management of scratchpad memories in shared memory manycore architectures, proceedings of the International Symposium in Computer Architecture (ISCA), pages , M. Casas, M. Moreto, L. Alvarez, E. Castillo, D. Chasapis, T. Hayes, L. Jaulmes, O. Palomar, O. Unsal, A. Cristal, E. Ayguad, J. Labarta, M. Valero, Runtime-Aware Architectures. proceedings of the International Euro-Par Conference on Parallel and Distributed Computing, (Euro-Par), pages 16-27, M. Casas, G. Bronevetsky, Active Measurement of Memory Resource Consumption, proceedings of the 28th IEEE International Parallel & Distributed Processing Symposium (IPDPS), pages , M. Casas, G. Bronevetsky, Active Measurement of the Impact of Network Switch Utilization on Application Performance, proceedings of the 28th IEEE International Parallel & Distributed Processing Symposium (IPDPS), pages , M. Schulz, J. Belak, A. Bhatele, P.-T. Bremer, G. Bronevetsky, M. Casas, T. Gamblin, K. Isaacs, I. Laguna, J. Levine, V. Pascucci, D. Richards, B. Rountree, Performance Analysis Techniques for the Exascale Co-Design Process, proceedings of PARCO 2013, Munich, Germany, September M. Casas, B. R. de Supinski, G. Bronevetsky, M. Schulz, Fault Resilience of the Algebraic Multi-Grid Solver, 26nd International Conference on Supercomputing (ICS), pages , G. Llort, M. Casas, H. Servat, K. Huck, J. Giménez, J. Labarta, Trace Spectral Analysis Toward Dynamic Levels of Detail, Proceedings of the IEEE International Conference on Parallel and Distributed Systems (ICPADS), pages , M. Casas, R. M. Badia, J. Labarta, Prediction of Behavior of MPI Applications, 2008 IEEE International Conference on Cluster Computing (Cluster), pages , M. Casas, R. M. Badia, J. Labarta, Automatic analysis of speedup of MPI applications, 22nd ACM International Conference on Supercomputing (ICS), pages , M. Casas, R. M. Badia, J. Labarta, Automatic Phase Detection of MPI Applications,Parallel Computing: Architectures, Algorithms and Applications (ParCo), Volume 15, pages , M. Casas, R. M. Badia, J. Labarta, Automatic Extraction of Structure of MPI Applications Tracefiles, International Euro-Par Conference on Parallel and Distributed Computing (Euro-Par), pages 3-12, 2007.

3 Workshops and Tech Reports Invited Talks 1. R. Vidal, M. Casas, M. Moreto, D. Chasapis, R. Ferrer, X. Martorell, E. Ayguade, J. Labarta, M. Valero, Evaluating the Impact of OpenMP 4.0 Extensions on Relevant Parallel Workloads, International Workshop in OpenMP (IWOMP), Volume 9342 of the series Lecture Notes in Computer Science, pages 60-72, D. Prat, C. Ortega, M. Casas, M. Moretó and M. Valero Adaptive and application dependent runtime guided hardware prefetcher reconfiguration on the IBM POWER7 in the 5th International Workshop on Adaptive Self-tuning Computing Systems (co-located with HiPEAC 2015) 21 January 2015, Amsterdam, The Netherlands. 3. M. Valero, M. Moreto, M. Casas, E. Ayguade, J. Labarta, Runtime-Aware Architectures: A First Approach, Supercomputing Frontiers and Innovations, Volume 1, Number 1, T. Grass, A. Rico, M. Casas, M. Moretó, A. Ramírez, Evaluating Execution Time Predictability of Task-Based Programs on Multi-Core Processors, in the 7th International Workshop on Multi-/Many-Core Computing Systems (MuCoCoS-2014). August, 2014, Porto, Portugal. 5. Adolfy Hoisie, Kevin J Barker, Greg Bronevetsky, Laura Carrington, Marc Casas, Daniel Chavarria, Roberto Gioiosa, Darren J Kerbyson, Gokcen Kestor, Nathan R Tallent, Ananta Tiwari, Progress report for the X-Stack Meeting. 4th Workshop of the Joint Laboratory for Exascale Computing (JLESC), December 2015, Bonn, Germany. Invitational talk on The Hybrid OmpSs + Charm++ Programming Model. 3rd Workshop of the Joint Laboratory for Exascale Computing (JLESC), June 2015, Barcelona, Spain. Invitational talk on Asynchronous algorithms to mitigate faults recoveries and enable approximate computing SIAM Conference on Computational Science and Engineering, Mini-Symposia on Resilience in Numerical Simulations and Algorithms at Extreme Scale, March 2015, Salt Lake City, talk on Runtime Systems for Fault Tolerant Computing. 2nd Workshop of the Joint Laboratory for Exascale Computing (JLESC), November 2014, Chicago, Illinois. Invitational talk on Exploiting Asynchronous Programming Models to Reduce Faults Impact in Iterative Solvers. HiPEAC Computing Systems Week (CSW), October 8 - October , Athens, Greece. Invited to be a member of a panel on Handling Errors at Multiple Levels: Opportunities and Challenges. 8th International Workshops on Parallel Matrix Algorithms and Applications (PMAA14), June 2 - June , Lugano, Switzerland. Invitational talk on Dealing with Faults in HPC systems. International Conference on Parallel and Distributed Processing (IPDPS), May 2014, Phoenix, Arizona, Research Presentation. 26th ACM International Conference on Supercomputing (ICS), June 25-29, San Servolo Island, Venice, Italy, Research presentation. Technische Universitat Dresden - ZIH Colloquium, May 24, Dresden, Germany, Invitational talk on Automatic Phase Detection and Structure Extraction of Parallel Applications. Schloss Dagstuhl Seminars, Program Developing for Extreme Scale Computing, May 2 - May 6, Dagstuhl, Germany, Invited to give a talk on the Applications of Spectral Analysis in Data Acquisition, Multiplexing Hardware Counters and Architecture Simulation.

4 IEEE International Conference on Cluster Computing(Cluster), September 29- October 1, Tsukuba, Japan, Research presentation. 22nd ACM International Conference on Supercomputing (ICS), June 7-12, Island of Kos, Aegean Sea, Greece, Research presentation. International Conference on Parallel Computing (ParCo), September 3-7, Jülich, Germany, Research presentation. International Euro-Par Conference on Parallel and Distributed Computing (Euro-Par). August 28-31, Rennes, France, Research presentation. Research Projects MontBlanc 3 The main target of the Mont-Blanc 3 project is the creation of a new high-end HPC platform (SoC and node) that is able to deliver a new level of performance / energy ratio whilst executing real applications. The technical objectives are: 1. To design a well-balanced architecture and to deliver the design for an ARM based SoC or SoP (System on Package) capable of providing pre-exascale performance when implemented in the time frame of The predicted performance target must be measured using real HPC applications. 2. To maximise the benefit for HPC applications with new high-performance ARM processors and throughput-oriented compute accelerators designed to work together within the well-balanced architecture. 3. To develop the necessary software ecosystem for the future SoC. Work Package 4 (Compute Efficiency) Leader: Marc Casas IBM-BSC Joint Study Agreement (JSA) on OmpSs for Asynchronous Algorithms This JSA focuses on applications that are likely to benefit from the locality awareness of OmpSs, and the irregular or asynchronous forms of parallelism it supports. These characteristics allow for additional asynchronicity in the execution of parallel tasks (compared to OpenMP) and lower bandwidth requirements. As a result, an application s tolerance for network or memory latency increases, which is an interesting property for the target platform. PI: Marc Casas, Costas Bekas IBM-BSC Joint Study Agreement (JSA) on Adaptive resource management for Power architectures This research focuses on adaptive resource management for improvement of powerperformance metrics associated with current and future POWER-series microprocessors. Both hardware-only and runtime-aided adaptive control systems will be pursued. The collaboration will pursue the development of new adaptive algorithms to exploit prefetching enhancements in current and future POWER architectures and generalized concepts in cross-layer co-optimization for improving power-performance metrics in future POWER systems. Proposals on new harware requirements to support the development of a new generation of hardware-software co-managed adaptative systems will be pursued in this collaboration. PI: Miquel Moreto, Marc Casas, Alper Buyuktosunoglu, Pradip Bose Riding on Moore s Law (RoMoL), RoMoL is a 5-year project funded by an ERC Advanced Grant awarded to Prof. Mateo Valero (GA ). RoMoL involves research in microarchitecture, runtime systems, compilers and programming languages, and has the objective to maximize positive synergies between current research activities in the Computer Sciences Department at BSC. PI: Mateo Valero Institute for Sustained Performance, Energy and Resilience (SUPER), The SUPER project is a broadly-based SciDAC institute with expertise in compilers and other system tools, performance engineering, energy management, and resilience. The goal of the project is to ensure that DOE s computational scientists can successfully exploit the emerging generation of high performance computing (HPC) systems. This goal will be met by providing application scientists with strategies and tools to productively maximize performance, conserve energy, and attain resilience. PI: Bob Lucas

5 Exascale Computing Technologies (ExaCT) ExaCT is a project focused on creating essential capabilities to overcome exascale barriers to predictive simulation. It integrates research on these barriers into 3 key LLNL applications using LLNL s most advanced multicore systems. Specifically, the main targets of the project are: Scalable Multicore Algorithms, Application Level Fault Tolerance, Asynchronous Load Analyzer and Adaptor and Next Generation Debugging Methodologies. PI: Bronis R. de Supinski Reliable High Performance Peta- and Exa-Scale Computing : This project will develop a detailed understanding of the effects of faults on real HPC systems, producing fault models that will enable new tools to identify the root causes of failures and help developers to create more reliable applications and systems by characterizing their vulnerabilities to errors. The ultimate goal of this project is to help create a new generation of highly -productive and cost-efficient supercomputers to enable novel DOE science applications. PI: Greg Bronevetsky IBM/BSC MareIncognito Project (MI) : MI is a bilateral project between BSC and IBM. The project considers several fields that define the technical characteristics and the components design for a new generation of Petascale supercomputers for the year 2011, involving all aspects related to that machine: applications, programming models, performance tools, interconnection and processor architecture, etc. PI: Jesús Labarta High Performance Computing V: Architectures, compilers, operative systems, tools and applications. (Computacion de Altas Prestaciones V TIN ) An R&D project funded by the Spanish Interministerial Commission of Science and Technology (Comision Interministerial de Ciencia y Tecnologia CICYT), a Spanish government agency focused on research and development. PI: Mateo Valero. High Performance Computing IV: Architectures, compilers, operative systems, tools and applications. (Computacion de Altas Prestaciones IV TIN C0201) An R&D project funded by the Spanish Interministerial Commission of Science and Technology (Comision Interministerial de Ciencia y Tecnologia CICYT), a Spanish government agency focused on research and development. PI: Mateo Valero. Directed Bachelor Thesis Directed Master Thesis Directed PhD Thesis Program Committees Analysis of Adaptive Prefetcher Configuration in Advanced Server-Class Processors, Calvin Bulla, June 2015 Parallelization of the Facesim simulator, Raúl Vidal, January 2015 Exploring Scalability Techniques of OmpSs, Iulian Brumar, June 2014 Parallelization techniques of the x264 video encoder, Daniel Ruiz, June 2014 Adaptive and Application Dependant Runtime Guided Hardware Reconfiguration for the IBM POWER7, David Prat, September 2014 Runtime Assisted Cache Memory Optimizations, Vladimir Dimic, July 2015 Transparent Management of Scratchpad Memories in Shared Memory Programming Models, Lluc Àlvarez, December 2015 Program Committee (PC) member of the ACM International Conference on Supercomputing (ICS), Program Committee (PC) member of the 16th IEEE/ACM International Symposium on Cluster, Cloud and Grid Computing (CCGRID) Program Committee (PC) member of the 1st IEEE Workshop on Emerging Parallel and Distributed Runtime Systems and Middleware (IPDRM2016) External Review Committee (ERC) member of the ACM International Conference on Supercomputing (ICS) 2014.

6 Service Reviewer of the Concurrency and Computation: Practice and Experience Journal, Reviewer for the Euro-Par conference Reviewer for the CCGRID conference Organizer of the European Initiative on Runtime Systems and Architecture Co-Design thematic session in the HiPEAC Computing Systems Week (CSW). Oslo, May Reviewer for the Parallel Computing Journal Reviewer for the ACM Transactions on Architecture and Code Optimization Journal (TACO) Reviewer for the International Conference on Parallel Architectures and Compilation Techniques (PACT) Reviewer for IEEE Transactions on Parallel and Distributed Systems Journal Reviewer for PARA 2010: State of the Art in Scientific and Parallel Computing Conference. Organizer of the Managing Large-Scale Systems via the Analysis of System Logs and the Application of Machine Learning Techniques Workshop (SLAML), held in conjuntion with the 23rd ACM Symposium on Operating Systems Principles (SOSP), PhD Committees Vladimir Marjanovic, Technical University of Catalonia (UPC), January Stojce Nakov, University of Bordeaux, December Judit Planas, Technical University of Catalonia (UPC), November 2015.

Min Si. Argonne National Laboratory Mathematics and Computer Science Division

Min Si. Argonne National Laboratory Mathematics and Computer Science Division Min Si Contact Information Address 9700 South Cass Avenue, Bldg. 240, Lemont, IL 60439, USA Office +1 630-252-4249 Mobile +1 630-880-4388 E-mail msi@anl.gov Homepage http://www.mcs.anl.gov/~minsi/ Current

More information

BSC vision on Big Data and extreme scale computing

BSC vision on Big Data and extreme scale computing BSC vision on Big Data and extreme scale computing Jesus Labarta, Eduard Ayguade,, Fabrizio Gagliardi, Rosa M. Badia, Toni Cortes, Jordi Torres, Adrian Cristal, Osman Unsal, David Carrera, Yolanda Becerra,

More information

Big Data Management in the Clouds and HPC Systems

Big Data Management in the Clouds and HPC Systems Big Data Management in the Clouds and HPC Systems Hemera Final Evaluation Paris 17 th December 2014 Shadi Ibrahim Shadi.ibrahim@inria.fr Era of Big Data! Source: CNRS Magazine 2013 2 Era of Big Data! Source:

More information

Scientific Computing Programming with Parallel Objects

Scientific Computing Programming with Parallel Objects Scientific Computing Programming with Parallel Objects Esteban Meneses, PhD School of Computing, Costa Rica Institute of Technology Parallel Architectures Galore Personal Computing Embedded Computing Moore

More information

Minor in IT for Business 2001/09 2004/06 Institution: HEC Montréal, Montreal, QC, Canada

Minor in IT for Business 2001/09 2004/06 Institution: HEC Montréal, Montreal, QC, Canada Judicael A. Zounmevo Curriculum Vitae Education Ph.D. in Computer Engineering 2009/09 2014/05 Thesis: Scalability-Driven Approaches to Key Aspects of the Message Passing Interface for Next Generation Supercomputing

More information

Parallel Computing. Benson Muite. benson.muite@ut.ee http://math.ut.ee/ benson. https://courses.cs.ut.ee/2014/paralleel/fall/main/homepage

Parallel Computing. Benson Muite. benson.muite@ut.ee http://math.ut.ee/ benson. https://courses.cs.ut.ee/2014/paralleel/fall/main/homepage Parallel Computing Benson Muite benson.muite@ut.ee http://math.ut.ee/ benson https://courses.cs.ut.ee/2014/paralleel/fall/main/homepage 3 November 2014 Hadoop, Review Hadoop Hadoop History Hadoop Framework

More information

HPC enabling of OpenFOAM R for CFD applications

HPC enabling of OpenFOAM R for CFD applications HPC enabling of OpenFOAM R for CFD applications Towards the exascale: OpenFOAM perspective Ivan Spisso 25-27 March 2015, Casalecchio di Reno, BOLOGNA. SuperComputing Applications and Innovation Department,

More information

D6.2 Dissemination & Collaboration Strategy Document Version 1.0

D6.2 Dissemination & Collaboration Strategy Document Version 1.0 D6.2 Dissemination & Collaboration Strategy Document Document Information Contract Number 318693 Project Website www.paradime-project.eu Contractual Deadline Month 4 (01 Jan 2013) Dissemination Level Nature

More information

Data Centric Systems (DCS)

Data Centric Systems (DCS) Data Centric Systems (DCS) Architecture and Solutions for High Performance Computing, Big Data and High Performance Analytics High Performance Computing with Data Centric Systems 1 Data Centric Systems

More information

Combining Scalability and Efficiency for SPMD Applications on Multicore Clusters*

Combining Scalability and Efficiency for SPMD Applications on Multicore Clusters* Combining Scalability and Efficiency for SPMD Applications on Multicore Clusters* Ronal Muresano, Dolores Rexachs and Emilio Luque Computer Architecture and Operating System Department (CAOS) Universitat

More information

Write a technical report Present your results Write a workshop/conference paper (optional) Could be a real system, simulation and/or theoretical

Write a technical report Present your results Write a workshop/conference paper (optional) Could be a real system, simulation and/or theoretical Identify a problem Review approaches to the problem Propose a novel approach to the problem Define, design, prototype an implementation to evaluate your approach Could be a real system, simulation and/or

More information

Performance Monitoring of Parallel Scientific Applications

Performance Monitoring of Parallel Scientific Applications Performance Monitoring of Parallel Scientific Applications Abstract. David Skinner National Energy Research Scientific Computing Center Lawrence Berkeley National Laboratory This paper introduces an infrastructure

More information

Power Aware and Temperature Restraint Modeling for Maximizing Performance and Reliability Laxmikant Kale, Akhil Langer, and Osman Sarood

Power Aware and Temperature Restraint Modeling for Maximizing Performance and Reliability Laxmikant Kale, Akhil Langer, and Osman Sarood Power Aware and Temperature Restraint Modeling for Maximizing Performance and Reliability Laxmikant Kale, Akhil Langer, and Osman Sarood Parallel Programming Laboratory (PPL) University of Illinois Urbana

More information

HPC Programming Framework Research Team

HPC Programming Framework Research Team HPC Programming Framework Research Team 1. Team Members Naoya Maruyama (Team Leader) Motohiko Matsuda (Research Scientist) Soichiro Suzuki (Technical Staff) Mohamed Wahib (Postdoctoral Researcher) Shinichiro

More information

Network for Sustainable Ultrascale Computing (NESUS) www.nesus.eu

Network for Sustainable Ultrascale Computing (NESUS) www.nesus.eu Network for Sustainable Ultrascale Computing (NESUS) www.nesus.eu Objectives of the Action Aim of the Action: To coordinate European efforts for proposing realistic solutions addressing major challenges

More information

Parallel Programming at the Exascale Era: A Case Study on Parallelizing Matrix Assembly For Unstructured Meshes

Parallel Programming at the Exascale Era: A Case Study on Parallelizing Matrix Assembly For Unstructured Meshes Parallel Programming at the Exascale Era: A Case Study on Parallelizing Matrix Assembly For Unstructured Meshes Eric Petit, Loïc Thebault, Quang V. Dinh May 2014 EXA2CT Consortium 2 WPs Organization Proto-Applications

More information

Pedraforca: ARM + GPU prototype

Pedraforca: ARM + GPU prototype www.bsc.es Pedraforca: ARM + GPU prototype Filippo Mantovani Workshop on exascale and PRACE prototypes Barcelona, 20 May 2014 Overview Goals: Test the performance, scalability, and energy efficiency of

More information

CATA: Criticality Aware Task Acceleration for Multicore Processors

CATA: Criticality Aware Task Acceleration for Multicore Processors CATA: Criticality Aware Task Acceleration for Multicore Processors Emilio Castillo, Miquel Moreto, Marc Casas, Lluc Alvarez, Enrique Vallejo, Kallia Chronaki, Rosa Badia Jose Luis Bosque, Ramon Beivide,

More information

Methodology for predicting the energy consumption of SPMD application on virtualized environments *

Methodology for predicting the energy consumption of SPMD application on virtualized environments * Methodology for predicting the energy consumption of SPMD application on virtualized environments * Javier Balladini, Ronal Muresano +, Remo Suppi +, Dolores Rexachs + and Emilio Luque + * Computer Engineering

More information

Distributed communication-aware load balancing with TreeMatch in Charm++

Distributed communication-aware load balancing with TreeMatch in Charm++ Distributed communication-aware load balancing with TreeMatch in Charm++ The 9th Scheduling for Large Scale Systems Workshop, Lyon, France Emmanuel Jeannot Guillaume Mercier Francois Tessier In collaboration

More information

Software Distributed Shared Memory Scalability and New Applications

Software Distributed Shared Memory Scalability and New Applications Software Distributed Shared Memory Scalability and New Applications Mats Brorsson Department of Information Technology, Lund University P.O. Box 118, S-221 00 LUND, Sweden email: Mats.Brorsson@it.lth.se

More information

Designing and Building Applications for Extreme Scale Systems CS598 William Gropp www.cs.illinois.edu/~wgropp

Designing and Building Applications for Extreme Scale Systems CS598 William Gropp www.cs.illinois.edu/~wgropp Designing and Building Applications for Extreme Scale Systems CS598 William Gropp www.cs.illinois.edu/~wgropp Welcome! Who am I? William (Bill) Gropp Professor of Computer Science One of the Creators of

More information

Unleashing the Performance Potential of GPUs for Atmospheric Dynamic Solvers

Unleashing the Performance Potential of GPUs for Atmospheric Dynamic Solvers Unleashing the Performance Potential of GPUs for Atmospheric Dynamic Solvers Haohuan Fu haohuan@tsinghua.edu.cn High Performance Geo-Computing (HPGC) Group Center for Earth System Science Tsinghua University

More information

Performance Evaluation of NAS Parallel Benchmarks on Intel Xeon Phi

Performance Evaluation of NAS Parallel Benchmarks on Intel Xeon Phi Performance Evaluation of NAS Parallel Benchmarks on Intel Xeon Phi ICPP 6 th International Workshop on Parallel Programming Models and Systems Software for High-End Computing October 1, 2013 Lyon, France

More information

The University of Arizona Department of Electrical and Computer Engineering Term Paper (and Presentation) for ECE 569 Fall 2006 21 February 2006

The University of Arizona Department of Electrical and Computer Engineering Term Paper (and Presentation) for ECE 569 Fall 2006 21 February 2006 The University of Arizona Department of Electrical and Computer Engineering Term Paper (and Presentation) for ECE 569 Fall 2006 21 February 2006 The term project for this semester is an independent study

More information

Trends in High-Performance Computing for Power Grid Applications

Trends in High-Performance Computing for Power Grid Applications Trends in High-Performance Computing for Power Grid Applications Franz Franchetti ECE, Carnegie Mellon University www.spiral.net Co-Founder, SpiralGen www.spiralgen.com This talk presents my personal views

More information

Reconfigurable Architecture Requirements for Co-Designed Virtual Machines

Reconfigurable Architecture Requirements for Co-Designed Virtual Machines Reconfigurable Architecture Requirements for Co-Designed Virtual Machines Kenneth B. Kent University of New Brunswick Faculty of Computer Science Fredericton, New Brunswick, Canada ken@unb.ca Micaela Serra

More information

Solvers, Algorithms and Libraries (SAL)

Solvers, Algorithms and Libraries (SAL) Solvers, Algorithms and Libraries (SAL) D. Knoll (LANL), J. Wohlbier (LANL), M. Heroux (SNL), R. Hoekstra (SNL), S. Pautz (SNL), R. Hornung (LLNL), U. Yang (LLNL), P. Hovland (ANL), R. Mills (ORNL), S.

More information

Mission Need Statement for the Next Generation High Performance Production Computing System Project (NERSC-8)

Mission Need Statement for the Next Generation High Performance Production Computing System Project (NERSC-8) Mission Need Statement for the Next Generation High Performance Production Computing System Project () (Non-major acquisition project) Office of Advanced Scientific Computing Research Office of Science

More information

Bachelor Degree in Informatics Engineering Master courses

Bachelor Degree in Informatics Engineering Master courses Bachelor Degree in Informatics Engineering Master courses Donostia School of Informatics The University of the Basque Country, UPV/EHU For more information: Universidad del País Vasco / Euskal Herriko

More information

A Locality Approach to Architecture-aware Task-scheduling in OpenMP

A Locality Approach to Architecture-aware Task-scheduling in OpenMP A Locality Approach to Architecture-aware Task-scheduling in OpenMP Ananya Muddukrishna ananya@kth.se Mats Brorsson matsbror@kth.se Vladimir Vlassov vladv@kth.se ABSTRACT Multicore and other parallel computer

More information

Alison N. Norman. Education. Teaching Experience. Austin, Texas (512)

Alison N. Norman. Education. Teaching Experience. Austin, Texas (512) Alison N. Norman ans@cs.utexas.edu Department of Computer Science http://www.cs.utexas.edu/ ans Austin, Texas 78712 (512) 232-7439 Education Ph.D. Computer Sciences,, August 2010 Dissertation Title: Compiler-Assisted

More information

Experiences With Mobile Processors for Energy Efficient HPC

Experiences With Mobile Processors for Energy Efficient HPC Experiences With Mobile Processors for Energy Efficient HPC Nikola Rajovic, Alejandro Rico, James Vipond, Isaac Gelado, Nikola Puzovic, Alex Ramirez Barcelona Supercomputing Center Universitat Politècnica

More information

NA-ASC-128R-14-VOL.2-PN

NA-ASC-128R-14-VOL.2-PN L L N L - X X X X - X X X X X Advanced Simulation and Computing FY15 19 Program Notebook for Advanced Technology Development & Mitigation, Computational Systems and Software Environment and Facility Operations

More information

Cloud Storage Solution for WSN Based on Internet Innovation Union

Cloud Storage Solution for WSN Based on Internet Innovation Union Cloud Storage Solution for WSN Based on Internet Innovation Union Tongrang Fan 1, Xuan Zhang 1, Feng Gao 1 1 School of Information Science and Technology, Shijiazhuang Tiedao University, Shijiazhuang,

More information

Field G. Van Zee. Pursue research and development activities in high-performance computing.

Field G. Van Zee. Pursue research and development activities in high-performance computing. Field G. Van Zee Office: GDC 5.806 The Institute for Computational Engineering and Sciences Department of Computer Sciences Austin, Texas 78712 512.415.2863 field@cs.utexas.edu Citizenship: United States

More information

Part I Courses Syllabus

Part I Courses Syllabus Part I Courses Syllabus This document provides detailed information about the basic courses of the MHPC first part activities. The list of courses is the following 1.1 Scientific Programming Environment

More information

Maximize Performance and Scalability of RADIOSS* Structural Analysis Software on Intel Xeon Processor E7 v2 Family-Based Platforms

Maximize Performance and Scalability of RADIOSS* Structural Analysis Software on Intel Xeon Processor E7 v2 Family-Based Platforms Maximize Performance and Scalability of RADIOSS* Structural Analysis Software on Family-Based Platforms Executive Summary Complex simulations of structural and systems performance, such as car crash simulations,

More information

Optimizing Shared Resource Contention in HPC Clusters

Optimizing Shared Resource Contention in HPC Clusters Optimizing Shared Resource Contention in HPC Clusters Sergey Blagodurov Simon Fraser University Alexandra Fedorova Simon Fraser University Abstract Contention for shared resources in HPC clusters occurs

More information

D5.6 Prototype demonstration of performance monitoring tools on a system with multiple ARM boards Version 1.0

D5.6 Prototype demonstration of performance monitoring tools on a system with multiple ARM boards Version 1.0 D5.6 Prototype demonstration of performance monitoring tools on a system with multiple ARM boards Document Information Contract Number 288777 Project Website www.montblanc-project.eu Contractual Deadline

More information

Analysis of Memory Sensitive SPEC CPU2006 Integer Benchmarks for Big Data Benchmarking

Analysis of Memory Sensitive SPEC CPU2006 Integer Benchmarks for Big Data Benchmarking Analysis of Memory Sensitive SPEC CPU2006 Integer Benchmarks for Big Data Benchmarking Kathlene Hurt and Eugene John Department of Electrical and Computer Engineering University of Texas at San Antonio

More information

Introduction to Cloud Computing

Introduction to Cloud Computing Introduction to Cloud Computing Parallel Processing I 15 319, spring 2010 7 th Lecture, Feb 2 nd Majd F. Sakr Lecture Motivation Concurrency and why? Different flavors of parallel computing Get the basic

More information

Petascale Software Challenges. William Gropp www.cs.illinois.edu/~wgropp

Petascale Software Challenges. William Gropp www.cs.illinois.edu/~wgropp Petascale Software Challenges William Gropp www.cs.illinois.edu/~wgropp Petascale Software Challenges Why should you care? What are they? Which are different from non-petascale? What has changed since

More information

Hari Subramoni. Education: Employment: Research Interests: Projects:

Hari Subramoni. Education: Employment: Research Interests: Projects: Hari Subramoni Senior Research Associate, Dept. of Computer Science and Engineering The Ohio State University, Columbus, OH 43210 1277 Tel: (614) 961 2383, Fax: (614) 292 2911, E-mail: subramoni.1@osu.edu

More information

26 April (Next Friday)

26 April (Next Friday) MAXIMUM ADDITIONAL SCORE: 2 points Description: 1. Selection of a research paper of interest from a given list 2. Study of the selected paper and the referenced material 3. Presentation of the paper in

More information

benchmarking Amazon EC2 for high-performance scientific computing

benchmarking Amazon EC2 for high-performance scientific computing Edward Walker benchmarking Amazon EC2 for high-performance scientific computing Edward Walker is a Research Scientist with the Texas Advanced Computing Center at the University of Texas at Austin. He received

More information

LS DYNA Performance Benchmarks and Profiling. January 2009

LS DYNA Performance Benchmarks and Profiling. January 2009 LS DYNA Performance Benchmarks and Profiling January 2009 Note The following research was performed under the HPC Advisory Council activities AMD, Dell, Mellanox HPC Advisory Council Cluster Center The

More information

Xeon+FPGA Platform for the Data Center

Xeon+FPGA Platform for the Data Center Xeon+FPGA Platform for the Data Center ISCA/CARL 2015 PK Gupta, Director of Cloud Platform Technology, DCG/CPG Overview Data Center and Workloads Xeon+FPGA Accelerator Platform Applications and Eco-system

More information

Making Multicore Work and Measuring its Benefits. Markus Levy, president EEMBC and Multicore Association

Making Multicore Work and Measuring its Benefits. Markus Levy, president EEMBC and Multicore Association Making Multicore Work and Measuring its Benefits Markus Levy, president EEMBC and Multicore Association Agenda Why Multicore? Standards and issues in the multicore community What is Multicore Association?

More information

A Framework For Application Performance Understanding and Prediction

A Framework For Application Performance Understanding and Prediction A Framework For Application Performance Understanding and Prediction Laura Carrington Ph.D. Lab (Performance Modeling & Characterization) at the 1 About us An NSF lab see www.sdsc.edu/ The mission of the

More information

SC15 SYNOPSIS FOR FEDERAL GOVERNMENT

SC15 SYNOPSIS FOR FEDERAL GOVERNMENT SC15 SYNOPSIS FOR FEDERAL GOVERNMENT SC15 Synopsis for Federal Government As a service to our clients, Engility offers a few notes from the Supercomputing Conference 2015 (SC15). Engility recently attended

More information

Study Plan Masters of Science in Computer Engineering and Networks (Thesis Track)

Study Plan Masters of Science in Computer Engineering and Networks (Thesis Track) Plan Number 2009 Study Plan Masters of Science in Computer Engineering and Networks (Thesis Track) I. General Rules and Conditions 1. This plan conforms to the regulations of the general frame of programs

More information

Introducing the Singlechip Cloud Computer

Introducing the Singlechip Cloud Computer Introducing the Singlechip Cloud Computer Exploring the Future of Many-core Processors White Paper Intel Labs Jim Held Intel Fellow, Intel Labs Director, Tera-scale Computing Research Sean Koehl Technology

More information

BSC - Barcelona Supercomputer Center

BSC - Barcelona Supercomputer Center Objectives Research in Supercomputing and Computer Architecture Collaborate in R&D e-science projects with prestigious scientific teams Manage BSC supercomputers to accelerate relevant contributions to

More information

David Rioja Redondo Telecommunication Engineer Englobe Technologies and Systems

David Rioja Redondo Telecommunication Engineer Englobe Technologies and Systems David Rioja Redondo Telecommunication Engineer Englobe Technologies and Systems About me David Rioja Redondo Telecommunication Engineer - Universidad de Alcalá >2 years building and managing clusters UPM

More information

Analysis and Optimization of a Hybrid Linear Equation Solver using Task-Based Parallel Programming Models

Analysis and Optimization of a Hybrid Linear Equation Solver using Task-Based Parallel Programming Models Available online at www.prace-ri.eu Partnership for Advanced Computing in Europe Analysis and Optimization of a Hybrid Linear Equation Solver using Task-Based Parallel Programming Models Claudia Rosas,

More information

Energy efficient computing on Embedded and Mobile devices. Nikola Rajovic, Nikola Puzovic, Lluis Vilanova, Carlos Villavieja, Alex Ramirez

Energy efficient computing on Embedded and Mobile devices. Nikola Rajovic, Nikola Puzovic, Lluis Vilanova, Carlos Villavieja, Alex Ramirez Energy efficient computing on Embedded and Mobile devices Nikola Rajovic, Nikola Puzovic, Lluis Vilanova, Carlos Villavieja, Alex Ramirez A brief look at the (outdated) Top500 list Most systems are built

More information

RUNAHEAD EXECUTION: AN EFFECTIVE ALTERNATIVE TO LARGE INSTRUCTION WINDOWS

RUNAHEAD EXECUTION: AN EFFECTIVE ALTERNATIVE TO LARGE INSTRUCTION WINDOWS RUNAHEAD EXECUTION: AN EFFECTIVE ALTERNATIVE TO LARGE INSTRUCTION WINDOWS AN INSTRUCTION WINDOW THAT CAN TOLERATE LATENCIES TO DRAM MEMORY IS PROHIBITIVELY COMPLEX AND POWER HUNGRY. TO AVOID HAVING TO

More information

OpenPOWER Outlook AXEL KOEHLER SR. SOLUTION ARCHITECT HPC

OpenPOWER Outlook AXEL KOEHLER SR. SOLUTION ARCHITECT HPC OpenPOWER Outlook AXEL KOEHLER SR. SOLUTION ARCHITECT HPC Driving industry innovation The goal of the OpenPOWER Foundation is to create an open ecosystem, using the POWER Architecture to share expertise,

More information

Curriculum Vitae RESEARCH INTERESTS EDUCATION. SELECTED PUBLICATION Journal. Current Employment: (August, 2012 )

Curriculum Vitae RESEARCH INTERESTS EDUCATION. SELECTED PUBLICATION Journal. Current Employment: (August, 2012 ) Curriculum Vitae Michael Tu Current Employment: (August, 2012 ) Assistant Professor Department of Computer Information Technology and Graphics School of Technology Purdue University Calumet Email: manghui.tu@purduecal.edu

More information

Supercomputing and Big Data: Where are the Real Boundaries and Opportunities for Synergy?

Supercomputing and Big Data: Where are the Real Boundaries and Opportunities for Synergy? HPC2012 Workshop Cetraro, Italy Supercomputing and Big Data: Where are the Real Boundaries and Opportunities for Synergy? Bill Blake CTO Cray, Inc. The Big Data Challenge Supercomputing minimizes data

More information

A PERFORMANCE COMPARISON USING HPC BENCHMARKS: WINDOWS HPC SERVER 2008 AND RED HAT ENTERPRISE LINUX 5

A PERFORMANCE COMPARISON USING HPC BENCHMARKS: WINDOWS HPC SERVER 2008 AND RED HAT ENTERPRISE LINUX 5 A PERFORMANCE COMPARISON USING HPC BENCHMARKS: WINDOWS HPC SERVER 2008 AND RED HAT ENTERPRISE LINUX 5 R. Henschel, S. Teige, H. Li, J. Doleschal, M. S. Mueller October 2010 Contents HPC at Indiana University

More information

Automating Big Data Benchmarking for Different Architectures with ALOJA

Automating Big Data Benchmarking for Different Architectures with ALOJA www.bsc.es Jan 2016 Automating Big Data Benchmarking for Different Architectures with ALOJA Nicolas Poggi, Postdoc Researcher Agenda 1. Intro on Hadoop performance 1. Current scenario and problematic 2.

More information

Petascale Software Challenges. Piyush Chaudhary piyushc@us.ibm.com High Performance Computing

Petascale Software Challenges. Piyush Chaudhary piyushc@us.ibm.com High Performance Computing Petascale Software Challenges Piyush Chaudhary piyushc@us.ibm.com High Performance Computing Fundamental Observations Applications are struggling to realize growth in sustained performance at scale Reasons

More information

Evoluzione dell Infrastruttura di Calcolo e Data Analytics per la ricerca

Evoluzione dell Infrastruttura di Calcolo e Data Analytics per la ricerca Evoluzione dell Infrastruttura di Calcolo e Data Analytics per la ricerca Carlo Cavazzoni CINECA Supercomputing Application & Innovation www.cineca.it 21 Aprile 2015 FERMI Name: Fermi Architecture: BlueGene/Q

More information

Amazon Cloud Performance Compared. David Adams

Amazon Cloud Performance Compared. David Adams Amazon Cloud Performance Compared David Adams Amazon EC2 performance comparison How does EC2 compare to traditional supercomputer for scientific applications? "Performance Analysis of High Performance

More information

Phoenix Cloud: Consolidating Different Computing Loads on Shared Cluster System for Large Organization

Phoenix Cloud: Consolidating Different Computing Loads on Shared Cluster System for Large Organization Phoenix Cloud: Consolidating Different Computing Loads on Shared Cluster System for Large Organization Jianfeng Zhan, Lei Wang, Bibo Tu, Yong Li, Peng Wang, Wei Zhou, Dan Meng Institute of Computing Technology

More information

Adapting scientific computing problems to cloud computing frameworks Ph.D. Thesis. Pelle Jakovits

Adapting scientific computing problems to cloud computing frameworks Ph.D. Thesis. Pelle Jakovits Adapting scientific computing problems to cloud computing frameworks Ph.D. Thesis Pelle Jakovits Outline Problem statement State of the art Approach Solutions and contributions Current work Conclusions

More information

A Flexible Cluster Infrastructure for Systems Research and Software Development

A Flexible Cluster Infrastructure for Systems Research and Software Development Award Number: CNS-551555 Title: CRI: Acquisition of an InfiniBand Cluster with SMP Nodes Institution: Florida State University PIs: Xin Yuan, Robert van Engelen, Kartik Gopalan A Flexible Cluster Infrastructure

More information

Power-Aware High-Performance Scientific Computing

Power-Aware High-Performance Scientific Computing Power-Aware High-Performance Scientific Computing Padma Raghavan Scalable Computing Laboratory Department of Computer Science Engineering The Pennsylvania State University http://www.cse.psu.edu/~raghavan

More information

Asymmetry Everywhere (with Automatic Resource Management) Onur Mutlu onur@cmu.edu

Asymmetry Everywhere (with Automatic Resource Management) Onur Mutlu onur@cmu.edu Asymmetry Everywhere (with Automatic Resource Management) Onur Mutlu onur@cmu.edu The Setting Hardware resources are shared among many threads/apps in a data center (or peta-scale) system Sockets, cores,

More information

Optimizing Performance of Parallel Programs on

Optimizing Performance of Parallel Programs on C-DAC & IIT Madras Five-Day Technology Workshop Programme ON Optimizing Performance of Parallel Programs on Emerging Multi-Core Processors and & GPUs OPECG-2009 Venue : Indian Institute of Technology Madras

More information

Center for Mathematics and Computational Science (CWI) Phone: (+31)20-592-4135

Center for Mathematics and Computational Science (CWI) Phone: (+31)20-592-4135 Peter van de Ven Center for Mathematics and Computational Science (CWI) Phone: (+31)20-592-4135 Stochastics department Amsterdam, The Netherlands 2014-present Research interests ven@cwi.nl Applied probability;

More information

Architecture Support for Big Data Analytics

Architecture Support for Big Data Analytics Architecture Support for Big Data Analytics Ahsan Javed Awan EMJD-DC (KTH-UPC) (http://uk.linkedin.com/in/ahsanjavedawan/) Supervisors: Mats Brorsson(KTH), Eduard Ayguade(UPC), Vladimir Vlassov(KTH) 1

More information

Preview of Award 1320357 Annual Project Report Cover Accomplishments Products Participants/Organizations Impacts Changes/Problems

Preview of Award 1320357 Annual Project Report Cover Accomplishments Products Participants/Organizations Impacts Changes/Problems Preview of Award 1320357 Annual Project Report Cover Accomplishments Products Participants/Organizations Impacts Changes/Problems Cover Federal Agency and Organization Element to Which Report is Submitted:

More information

3rd International Symposium on Big Data and Cloud Computing Challenges (ISBCC-2016) March 10-11, 2016 VIT University, Chennai, India

3rd International Symposium on Big Data and Cloud Computing Challenges (ISBCC-2016) March 10-11, 2016 VIT University, Chennai, India 3rd International Symposium on Big Data and Cloud Computing Challenges (ISBCC-2016) March 10-11, 2016 VIT University, Chennai, India Call for Papers Cloud computing has emerged as a de facto computing

More information

Stream Processing on GPUs Using Distributed Multimedia Middleware

Stream Processing on GPUs Using Distributed Multimedia Middleware Stream Processing on GPUs Using Distributed Multimedia Middleware Michael Repplinger 1,2, and Philipp Slusallek 1,2 1 Computer Graphics Lab, Saarland University, Saarbrücken, Germany 2 German Research

More information

Building an energy dashboard. Energy measurement and visualization in current HPC systems

Building an energy dashboard. Energy measurement and visualization in current HPC systems Building an energy dashboard Energy measurement and visualization in current HPC systems Thomas Geenen 1/58 thomas.geenen@surfsara.nl SURFsara The Dutch national HPC center 2H 2014 > 1PFlop GPGPU accelerators

More information

Research Statement for Henri Casanova

Research Statement for Henri Casanova Research Statement for Henri Casanova Advances in networking technology have made it possible to deploy distributed scientific applications on platforms that aggregate large numbers of diverse and distant

More information

Designing a Cloud Storage System

Designing a Cloud Storage System Designing a Cloud Storage System End to End Cloud Storage When designing a cloud storage system, there is value in decoupling the system s archival capacity (its ability to persistently store large volumes

More information

Exascale Computing Project (ECP) Update

Exascale Computing Project (ECP) Update Exascale Computing Project (ECP) Update Presented to ASCAC Paul Messina Project Director Stephen Lee Deputy Director Washington, D.C. April 4, 2016 ECP is in the process of making the transition from an

More information

Muhammed F. Mudawwar

Muhammed F. Mudawwar Muhammed F. Mudawwar Computer Science Department The American University in Cairo 113 Kasr el Aini Street, Cairo, Egypt Office: +20 2 797-5305 Email: mudawwar@aucegypt.edu Web: http://www.cs.aucegypt.edu/~mudawwar

More information

1.1 Difficulty in Fault Localization in Large-Scale Computing Systems

1.1 Difficulty in Fault Localization in Large-Scale Computing Systems Chapter 1 Introduction System failures have been one of the biggest obstacles in operating today s largescale computing systems. Fault localization, i.e., identifying direct or indirect causes of failures,

More information

A New Methodology for Studying Realistic Processors in Computer Science Degrees

A New Methodology for Studying Realistic Processors in Computer Science Degrees A New Methodology for Studying Realistic Processors in Computer Science Degrees C. Gómez Departamento de Sistemas Informáticos Universidad de Castilla-La Mancha Albacete, Spain Crispin.Gomez@uclm.es M.E.

More information

The Green Index: A Metric for Evaluating System-Wide Energy Efficiency in HPC Systems

The Green Index: A Metric for Evaluating System-Wide Energy Efficiency in HPC Systems 202 IEEE 202 26th IEEE International 26th International Parallel Parallel and Distributed and Distributed Processing Processing Symposium Symposium Workshops Workshops & PhD Forum The Green Index: A Metric

More information

MATTEO RIONDATO Curriculum vitae

MATTEO RIONDATO Curriculum vitae MATTEO RIONDATO Curriculum vitae 100 Avenue of the Americas, 16 th Fl. New York, NY 10013, USA +1 646 292 6641 riondato@acm.org http://matteo.rionda.to EDUCATION Ph.D. Computer Science, Brown University,

More information

High Performance Computing. Course Notes 2007-2008. HPC Fundamentals

High Performance Computing. Course Notes 2007-2008. HPC Fundamentals High Performance Computing Course Notes 2007-2008 2008 HPC Fundamentals Introduction What is High Performance Computing (HPC)? Difficult to define - it s a moving target. Later 1980s, a supercomputer performs

More information

Performance Analysis and Optimization Tool

Performance Analysis and Optimization Tool Performance Analysis and Optimization Tool Andres S. CHARIF-RUBIAL andres.charif@uvsq.fr Performance Analysis Team, University of Versailles http://www.maqao.org Introduction Performance Analysis Develop

More information

Utilization Driven Power-Aware Parallel Job Scheduling

Utilization Driven Power-Aware Parallel Job Scheduling Utilization Driven Power-Aware Parallel Job Scheduling Maja Etinski Julita Corbalan Jesus Labarta Mateo Valero {maja.etinski,julita.corbalan,jesus.labarta,mateo.valero}@bsc.es Motivation Performance increase

More information

Seeking Opportunities for Hardware Acceleration in Big Data Analytics

Seeking Opportunities for Hardware Acceleration in Big Data Analytics Seeking Opportunities for Hardware Acceleration in Big Data Analytics Paul Chow High-Performance Reconfigurable Computing Group Department of Electrical and Computer Engineering University of Toronto Who

More information

Energy efficient computing in high performance systems

Energy efficient computing in high performance systems Energy efficient computing in high performance systems Efraim Rotem Intel Corporation, Technion Israel Avi Mendelson Technion, Israel Ran Ginosar Technion, Israel Uri Weiser Technion, Israel ChipEX 2015

More information

Kriterien für ein PetaFlop System

Kriterien für ein PetaFlop System Kriterien für ein PetaFlop System Rainer Keller, HLRS :: :: :: Context: Organizational HLRS is one of the three national supercomputing centers in Germany. The national supercomputing centers are working

More information

High Performance Computing in the Multi-core Area

High Performance Computing in the Multi-core Area High Performance Computing in the Multi-core Area Arndt Bode Technische Universität München Technology Trends for Petascale Computing Architectures: Multicore Accelerators Special Purpose Reconfigurable

More information

Cluster Scalability of ANSYS FLUENT 12 for a Large Aerodynamics Case on the Darwin Supercomputer

Cluster Scalability of ANSYS FLUENT 12 for a Large Aerodynamics Case on the Darwin Supercomputer Cluster Scalability of ANSYS FLUENT 12 for a Large Aerodynamics Case on the Darwin Supercomputer Stan Posey, MSc and Bill Loewe, PhD Panasas Inc., Fremont, CA, USA Paul Calleja, PhD University of Cambridge,

More information

Router Architectures

Router Architectures Router Architectures An overview of router architectures. Introduction What is a Packet Switch? Basic Architectural Components Some Example Packet Switches The Evolution of IP Routers 2 1 Router Components

More information

High-performance computing: Use the cloud to outcompute the competition and get ahead

High-performance computing: Use the cloud to outcompute the competition and get ahead High-performance computing: Use the cloud to outcompute the competition and get ahead High performance computing (HPC) has proved to be effective in offering highly analytical workloads the benefits of

More information

Runtime Hardware Reconfiguration using Machine Learning

Runtime Hardware Reconfiguration using Machine Learning Runtime Hardware Reconfiguration using Machine Learning Tanmay Gangwani University of Illinois, Urbana-Champaign gangwan2@illinois.edu Abstract Tailoring the machine hardware to varying needs of the software

More information

Big data management with IBM General Parallel File System

Big data management with IBM General Parallel File System Big data management with IBM General Parallel File System Optimize storage management and boost your return on investment Highlights Handles the explosive growth of structured and unstructured data Offers

More information

A Novel Way of Deduplication Approach for Cloud Backup Services Using Block Index Caching Technique

A Novel Way of Deduplication Approach for Cloud Backup Services Using Block Index Caching Technique A Novel Way of Deduplication Approach for Cloud Backup Services Using Block Index Caching Technique Jyoti Malhotra 1,Priya Ghyare 2 Associate Professor, Dept. of Information Technology, MIT College of

More information

Software for High Performance. Computing. Requirements & Research Directions. Marc Snir

Software for High Performance. Computing. Requirements & Research Directions. Marc Snir Software for High Performance Requirements & Research Directions Computing Marc Snir May 2006 Outline Petascale hardware Petascale operating system Programming models 2 Jun-06 Petascale Systems are Coming

More information