DC Distributed Power Systems

Transcription

1 DC Dstrbuted Power Systems Aalyss Desg ad Cotrol for a Reewable Eergy System Per Karlsso Doctoral Dssertato Idustral Electrcal Egeerg Departmet of Idustral Electrcal Egeerg ad Automato

2 Departmet of Idustral Electrcal Egeerg ad Automato Lud Uversty Box 8 SE- LUND SWEDEN ISBN X CODEN:LUTEDX/(TEIE-33)/-/() Per Karlsso Prted Swede by Meda-Tryc Lud Uversty Lud

3 Abstract Reewable eergy systems are lely to become wde spread the future due to evrometal demads. As a cosequece of the dspersed ature of reewable eergy systems ths mples that there wll be a dstrbuted geerato of electrc power. Sce most of the dstrbuted electrcal eergy sources do ot provde ther electrc power at le frequecy ad voltage a DC bus s a useful commo coecto for several such sources. Due to the dffereces output voltage amog the sources depedg o both the type of source ad ther actual operatg pot the sources are coected to the DC power system va power electroc coverters. The teto behd the preseted wor s ot to replace the exstg AC power system but to clude local DC power systems. The AC ad DC power systems are coected at some pots the etwor. The reewable eergy sources are wea compared to the preset hydro power ad uclear power plats resultg a eed of power codtog before the reewable eergy s fed to the trasmsso les. The beeft of such a approach s that power codtog s appled o a cetral level.e. at the terface betwee the AC ad DC power systems. The thess starts wth a overvew of related wor. Preset DC trasmsso systems are dscussed ad vestgated smulatos. The dfferet methods for load sharg ad voltage cotrol are dscussed. Especally the voltage droop cotrol scheme s examed thoroughly. Sce the droop cotrol method does ot requre ay hgh-speed commucato betwee sources ad loads ths s cosdered the most sutable for DC dstrbuted power systems. The voltage feed bac desg of the cotroller also results a specfcato of the DC bus capactors (equvalets to DC l capactors of sgle coverters) eeded for flterg. If the coverters the DC dstrbuto system are equpped wth capactors selected from ths desg crtero ad f the DC bus mpedace s eglected the source coverters share the total load equally per ut.

4 The same DC dstrbuto bus cofgurato s studed a wd power applcato. Especally the dyamc propertes of load-source teractos are hghlghted. They are terestg sce the sources are cosdered wea for a dstrbuted power system. Ths s llustrated wth smulatos where the power s fed from wd turbes oly ad costat power loads are cotrolled at the same tme as the DC bus voltage level. The wd power geerators are modeled as permaet-maget sychroous maches. The cotroller eeded for the maches cludg posto estmato ad feld weaeg s dscussed. To cotrol the DC bus voltage the avalable wd power must be hgher tha the power cosumed by the loads ad the excess power removed by ptch agle cotrol. Ptch agle cotrol s a comparably slow process ad therefore the DC bus voltage cotroller must hadle the traset power dstrbuto. Persoal safety ad preveto of property damage are mportat factors of covetoal AC power systems. For the vestgated DC power system ths s maybe eve more mportat due to the fact that the star pot of the sources ad loads s left ugrouded or grouded through hgh mpedace. The dffculty of detectg groud faults arses from the fact that the AC sources ad loads are ugrouded or have hgh mpedace to groud order to effectvely bloc zero-sequece currets flowg betwee the AC systems. A groudg scheme for the DC dstrbuto system together wth algorthms for detecto of groud faults are preseted. The proposed method detects groud faults o both the AC ad DC sdes ad s exteded to cover short crcut faults wth a mor wor effort. Two schemes for hgh voltage tercoecto of DC systems are studed. Oe of them provdes galvac solato whch s a advatage sce elevated voltage mght appear the DC systems otherwse the case of a groud fault the hgh voltage tercoecto. Expermetal verfcatos follow the theoretcal vestgatos troduced above. Frst dyamc propertes are studed ad the behavour predcted from theoretcal aalyss ad smulatos s verfed. The load sharg s vestgated. Also ths vestgato the expermetal results agree wth the smulated. v

5 Acowledgemets Frst I would le to tha my colleague ad fred Jörge Svesso who I have wored wth the last three years. I would also le to express my scere grattude to my fred ad former colleague Mart Bojrup who I wored wth durg I am very grateful to my two metors Professor Lars Gertmar ad Professor Sture Ldahl. Both Lars ad Sture have tme to dscuss all ds of topcs ot oly techcal. I would also le to tha my supervsors Professor Mats Alaüla ad Professor Gustaf Olsso. Professor Alaüla who has bee my ma supervsor has show much ethusasm for power electrocs ot strctly focusg o the research project. Eve f hs schedule s tght Mats has always tme to gve a helpg had. Mats has also ecouraged me to partcpate courses ad meetgs whch s greatly acowledged. Gustaf s also head of the departmet. As such he strves hard to provde a fredly atmosphere at the departmet whch has bee very successful. The steerg commttee cludg the four professors above ad Dr Magus Ae Dr Olof Samuelsso ad Dr Ja Svesso has cotrbuted wth valuable commets ad dscussos. Ths has ehaced my wor ad s greatly acowledged. I would also le to tha Aders Lasso ABB Utltes AB ad Ulf Thoré Sydraft AB from the steerg commttee of the former research project I was volved together wth Mart Bojrup. Professor Frede Blaabjerg ad Dr Stg Mu Nelse both at Aalborg Uversty Demar have also meat a lot to me. I 996 they asssted me whe I evaluated the SABER smulato software. Professor Blaabjerg also evaluated my Lcetate s thess o Quas Resoat DC L Coverters. v

6 I would le to express my grattude to the staff at IEA. Eve f all the people at the departmet are helpful ad fredly there are those that I owe a specal tha. Dr Chrsta Rose s a very good fred ad a perso you ca dscuss aythg wth. He has also proof read several of my artcles whch s greatly acowledged. Also at IEA Getachew Darge ad Begt Smosso have provded practcal help for electroc desgs. I th that Begt has at least oe catalogue or data boo for every apparatus ad compoet. I must tha Dr Ulf Jeppsso who used to mata the UNIX-system wth softwares le SABER ad ACE ad owadays taes care of the ecoomcal ssues of the departmet. Thas to the former Assocate Professor at IEA Stg Ldqust for always beg ce. I am very thaful to Magus Mats Lars Chrsta Ja ad Jörge for proof readg my thess. I have also had the prvlege to wor together wth Aa Nlsso Departmet of Buldg ad Evrometal Techology Lud Uversty. Aa does ot hestate to teach evrometal ssues a advaced course o power electrocs or preset the same materal o a coferece o power electrocs. I also tha the staff at ABB Uversty Ludva especally Ewa Wström ad Elly Hartgs for ecouragg me to partcpate ther courses o HVDC ad HVDC Lght. I do ot ow how to tha my famly eough. My parets Sv ad Axel have always ecouraged me to study wthout puttg ay requremets o the result. They have also helped me wth all ds of practcal ssues ad facal support for my udergraduate studes. I caot mage that ths would have bee possble wthout your help thas aga. My dear ad beloved Aa has ehaced my lfe to a large extet. Though I sped too much tme at the departmet Aa does ot compla. I hope that I sometme ca retur ths patece whe she eeds t. The Cotrol of Reewable Eergy Sources (CORE) project s facally supported by DESS (Delegatoe för Eergförsörjg SydSverge The Board for Eergy Supply Souther Swede). Ths support s gratefully acowledged. Per Karlsso v

7 Cotets CHAPTER INTRODUCTION.... Objectves.... Cotrbutos Outle of the thess Publcatos Prevous wor Specfcato of a dstrbuted power system... CHAPTER EXISTING DC POWER SYSTEMS.... HVDC.... VSC based HVDC... 6 CHAPTER 3 DC BUS VOLTAGE CONTROL Ivestgated system DC bus model Cotroller structure Cable mpedace Load sharg Cocludg remars... 6 CHAPTER 4 WIND POWERED DC BUS Ptch agle cotrol Droop offset cotrol Speed estmato Feld weaeg Smulatos... 7 v

8 CHAPTER 5 FAULT DETECTION AND CLEARANCE Groudg ad fusg Fault stuatos Detecto ad selectvty Smulatos CHAPTER 6 DC TRANSMISSION The bac-to-bac structure The DAB structure Proposed tercoecto structure... 4 CHAPTER 7 MEASUREMENTS Expermetal set-up Dyamc propertes Load sharg... 3 CHAPTER 8 CONCLUSIONS Summary of results Future wor REFERENCES...39 APPENDIX A MODULATION...49 A. Modulato methods A. Vector represetato APPENDIX B VECTOR CONTROL...67 APPENDIX C CONVERTER LOSSES...7 APPENDIX D NORMALISATION...77 D. Base system for a sgle coverter D. Coverter data expressed per ut APPENDIX E NOMENCLATURE...83 v

9 Chapter Itroducto I ths chapter DC dstrbuted power systems (DPS) are troduced together wth a revew of the DC DPS state of the art techology. Reewable eergy systems are lely to become wde spread the future due to evrometal demads for example regardg polluto. Ths mples that there wll be a dstrbuted geerato of electrc power. Sce several of the dstrbuted electrcal eergy sources provde DC voltage several such sources mght be coected. Due to the dffereces output voltage amog the sources depedg o both the type of source ad ther actual operatg pot the sources are coected to the DC power system va power electroc coverters. It should be clear that the teto s ot to replace the exstg AC power system but to clude local DC systems [4]. These AC ad DC systems are coected at some pots the etwor. The beeft of such a approach arses from the fact that reewable eergy sources are wea compared to preset fossl fuel hydro power ad uclear power plats resultg a eed of power codtog before beg fed to the trasmsso les. Wth a DC dstrbuted system codtog ca be appled at a cetral level of the AC dstrbuto system close to the DC system coecto pots. Also several cosumer loads operate o DC (rectfed AC). Therefore DC dstrbuto could be used to omt the eed for trasformers ad rectfers every sgle load. The DC dstrbuted power system has varous ds of eergy storage added whch meas that t ca support earby customers durg AC power system falure or emergecy stuatos. Also sestve equpmet lely to be stalled future tellget buldgs also eeds eergy bacup.e. uterruptable

10 Chapter. Itroducto power supply (UPS) propertes. Ths s already use for example telecommucato sub-statos where bacup batteres are usually stalled. Aother example s gve [63] where a battery powered DC system s supplyg the AC system crcut breaer cotrol system. Of course relable operato of such systems s ecessary. A larger part of the power trasmsso etwor s lely to use hgh voltage drect curret (HVDC) trasmsso techology the future [4]. Also the recetly troduced medum voltage DC (MVDC) techology s lely to be used DC dstrbuted power systems [4]. Ths mples that future electrc power systems costtute a mxture betwee AC ad DC techology. A dstrbuted power system wth as much as several hudred power electroc coverters call for ew methods ad techologes both o the operator ad system level. Not oly a creased cotrol effort s requred but also the complexty of protecto systems wll crease the case of dspersed geerato [3]. Ths s true especally f autoomous operato of the dstrbuted power system s teded. Ths wor addresses cotrol ad stablty ssues of DC dstrbuted power systems together wth ther coectos to surroudg AC power systems sources ad loads. Also groudg ad ssues o fault detecto ad clearace are cosdered.. Objectves The ma objectve of ths wor s to study the cosequeces of large-scale corporato of power electroc coverters DC dstrbuted power systems. The ma objectve s splt to several sub-objectves all mperatve for a large-scale system. The frst ssue to treat s selecto of a sutable system voltage at least at the cosumer level. Stablty ad dyamc propertes of DC voltage cotrol are of great cocer. Requremets o hardware ad software should be stated so that the system could grow.e. addtoal coverters stalled a exstg system wthout system degradato. Voltage cotrol the case of wea sources should also be vestgated sce several of the reewable eergy sources possess low erta. Sutable groudg ad fault detecto schemes should be vestgated. Coecto of several DC systems should be vestgated. Oe mportat objectve s that the eed of commucato should be studed.

11 . Cotrbutos 3. Cotrbutos The cotrbutos of ths wor are gve Chapters 3 to 7 ad cocluded Chapter 8. The ma results are summarsed here. Sutable voltage levels are ot explctly dscussed the thess. Istead a DC bus voltage level sutable for 4 V AC sources ad loads s adopted. Ths s due to the fact that by dog so the proposed system voltage covers exstg cosumer loads. Future apparatus mght requre a dfferet load voltage level. To compesate ths shortcomg a large porto of the vestgato s made o a per ut (p.u.) bass. Therefore the results ca be used for ay DC bus voltage level. The coverters are frst specfed wth focus o teracto betwee the AC ad DC sdes. The a DC bus voltage droop cotroller s adopted. The demads o teracto together wth droop requremets gve a specfcato of the relato betwee rated power ad coverter DC sde flter.e. DC bus capactace for each coverter. The dyamc propertes are vestgated both by meas of stablty aalyss terms of root-locus ad large-sgal smulatos. It s foud that for reasoable DC bus cable parameters stablty s of mor cocer for the selected DC sde flter. I other words the requremets o teracto betwee put ad output of the coverters s stroger tha the stablty requremet. Voltage droop cotrol provdes autoomous load sharg mplyg that commucato s ot eeded. The selected mplemetato of the droop algorthm ad the cotroller parameters allow a arbtrary umber of coverters the DC system. Furthermore the already serted uts are ot altered f addtoal uts are corporated. A wd powered DC system s adopted to vestgate voltage cotrol ad load sharg the case of reewable eergy sources. I ths case a speed droop algorthm s developed. The dyamc propertes of speed ad voltage droop cotrol are vestgated. It s cocluded that low-speed commucato s beefcal for o-dspatchable sources. A fault detecto algorthm s developed. The algorthm s studed for dfferet levels of commucato ragg from oe to pot-to-pot commucato. A exstg coverter topology s adopted for tercoecto of DC systems. The same coverter topology s also used for power trasmsso. Voltage droop cotrol s adopted also here. Thus hgh-speed commucato s ot ecessary. However whe low-badwdth commucato s utlsed the system operator has the ablty to cotrol power flow. A laboratory set-up s desged to verfy voltage cotrol load sharg ad fault detecto.

12 4 Chapter. Itroducto.3 Outle of the thess Ths chapter cotas a bref troducto to the thess ad the academc wor preseted. A survey of prevous wor s also gve. Chapter revews classcal HVDC ad Voltage Source Coverter (VSC) based HVDC trasmsso systems. The study cludes smulatos where especally the harmoc cotet of the currets s compared. I Chapter 3 voltage ad power cotrol methods for the vestgated dstrbuted power system are developed. Ths aalyss also results a method for selecto of DC bus flter capactors. The steady state ad dyamc propertes of the selected cotrol scheme are vestgated for varyg cable parameters. Load sharg s vestgated for dfferet voltage cotrol methods. I Chapter 4 the same system but wth wea sources s vestgated. Here the DC power system s fed oly wth wd power ad stll costat power loads ca be suppled ad the DC bus voltage cotrolled. Persoal safety ad protecto of equpmet are mportat ssues for ay power system ad Chapter 5 s devoted to these topcs. The chapter starts wth a presetato of the groudg scheme ad typcal fault codtos. The the methods of fault detecto ad localsato are preseted ad verfed smulatos. I Chapter 6 coecto of DC dstrbuted systems s cosdered. The proposed scheme cotas a trasformer provdg galvac separato betwee dfferet DC systems. I Chapter 7 measuremet results verfyg dyamc propertes load sharg ad fault detecto are preseted. The wor s cocluded Chapter 8. MATLAB TM Power System Blocset s utlsed for the tme-doma smulatos of Chapter where thyrstor based coverters are cosdered. DYMOLA TM s utlsed for the tme-doma smulatos cludg trasstor based coverters.e. for the smulato of VSC based HVDC trasmsso Chapter ad all tme-doma smulatos Chapters 3 to 7. Large-sgal coverter models are used for smulatos vestgatg two-coverter systems ad DC trasmsso systems. Average coverter models are utlsed for smulatos where load sharg or fault detecto s vestgated. Dscrete-tme cotrollers are utlsed for both the large-sgal ad the average coverter models. MATLAB TM s used Chapter 3 for vestgato of stablty for dfferet cable parameters terms of root-locus of the poles. The smulatos the appedxes are all carred out MATLAB TM -SIMULINK TM.

13 .4 Publcatos 5.4 Publcatos The results preseted ths thess regard DC bus voltage cotrol ad fault detecto ad clearace foud Chapters ad 7. The ma results of these chapters are also preseted P. Karlsso ad J. Svesso "DC Bus Voltage Cotrol for Reewable Eergy Dstrbuted Power Systems" IASTED Power ad Eergy Systems Coferece PES Cof. Proc. Mara del Rey CA USA May 3-5 pp P. Karlsso ad J. Svesso "Fault Detecto ad Clearace DC Dstrbuted Power Systems" IEEE Nordc Worshop o Power ad Idustral Electrocs NORPIE worshop proc. Stocholm Swede Aug. -4 CD- ROM pages 6. P. Karlsso ad J. Svesso "DC Bus Voltage Cotrol for a Dstrbuted Power System" provsoally accepted for publcato IEEE trasactos o power electrocs paper o LP. P. Karlsso ad J. Svesso "Voltage Cotrol ad Load Sharg DC Dstrbuto Systems" submtted to Europea Coferece o Power Electrocs ad Applcatos EPE 3 Toulouse Frace Sept The thess author has also authored the publcato J. Svesso ad P. Karlsso "Wd Farm Cotrol Software Structure" Iteratoal Worshop o Trasmsso Networs for Offshore Wd Farms worshop proc. Stocholm Swede Apr. - proceedg pages 5. the same research project. The cotrbuto made by the thess author the last paper s mor. The prevous wor o off-board battery chargers for electrc vehcles also part of the research wor s reported P. Karlsso M. Bojrup M. Alaüla ad L. Gertmar "Effcecy of Off-Board Hgh Power Electrc Vehcle Battery Chargers wth Actve Power Le Codtog Capabltes" Europea Coferece o Power Electrocs ad Applcatos EPE 97 Cof. Rec. Trodhem Norway Sept vol. 4 pp

14 6 Chapter. Itroducto M. Bojrup P. Karlsso B. Smosso ad M. Alaüla "A Dual Purpose Battery Charger for Electrc Vehcles" IEEE Power Electrocs Specalsts Coferece PESC 98 Cof. Rec. Fuuoa Japa May vol. pp M. Bojrup P. Karlsso M. Alaüla ad L. Gertmar "A Multple Rotatg Itegrator Cotroller for Actve Flters" Europea Coferece o Power Electrocs ad Applcatos EPE 99 Cof. Rec. Lausae Swtzerlad Sept CD-ROM pages 9. P. Karlsso M. Bojrup M. Alaüla ad L. Gertmar "Zero Voltage Swtchg Coverters" IEEE Nordc Worshop o Power ad Idustral Electrocs NORPIE worshop proc. Aalborg Demar Ju. 3-6 pp P. Karlsso M. Bojrup M. Alaüla ad L. Gertmar "Desg ad Implemetato of a Quas-Resoat DC L Coverter" Europea Coferece o Power Electrocs ad Applcatos EPE Cof. Rec. Graz Austra Aug. 7-9 CD-ROM pages. Oly mor parts of the wor reported the secod ad thrd publcatos above are attrbuted the author of ths thess. The wor o resoat coverters reported the other publcatos above s also the bass of the Lcetate s thess P. Karlsso "Quas Resoat DC L Coverters - Aalyss ad Desg for a Battery Charger Applcato" Lcetate thess Departmet of Idustral Electrcal Egeerg ad Automato Lud Isttute of Techology Lud Swede November 999. Ths wor was evaluated by Professor Frede Blaabjerg at the Departmet of Eergy Techology Aalborg Uversty Demar. Besdes the publcatos wth the research projects aother publcato related to power electrocs educato has bee preseted A. Nlsso P. Karlsso ad L. Gertmar "Evrometal Egeerg the Power Electrocs Educato" Europea Coferece o Power Electrocs ad Applcatos EPE Cof. Rec. Graz Austra Aug. 7-9 CD-ROM pages. Less tha half of the wor of ths paper s attrbuted the thess author.

15 .5 Prevous wor 7.5 Prevous wor Ths secto provdes a lterature survey of prevous wor o reewable eergy sources ad dstrbuted power systems whch the most relevat prevous wor s dscussed. A classfcato of the papers s made based o the ature of the refereces eve though several of them cover more tha oe topc. However the refereces are sorted uder the topc whch the thess author fd most terestg the cotext of the rest of the thess. Dstrbuted eergy systems Several argumets for dstrbuted power systems are lsted [3]. Amog these trasmsso capablty saturato of cetralsed power systems ad related stablty problems seem most mportat. The addtoal tellgece eeded to cotrol protect ad mata dstrbuted power systems s focused [3]. The future maret of (DC) dstrbuted power systems s dscussed [33] where t s cocluded that the growg maret cludes computer mltary/aerospace ad commucato applcatos. It s also stated that dstrbuted power systems are more costly tha cetralsed. Note that [3] the dstrbuted system s part of a ato wde power trasmsso/dstrbuto system cludg dspersed geerato. I [33] the dstrbuted system teded s restrcted to supply power to electroc equpmet le sde a sgle computer. Power electrocs for use reewable eergy applcatos are dscussed [4]. Also some beefts ad drawbacs assocated wth reewable eergy sources are dscussed. Photovoltac fuel cell ad wd eergy systems are revewed brefly. Small-scale hydro pump statos or battery bas for electrc eergy storage are however ot dscussed [4]. Stll they are cluded the prcpal scheme of a dstrbuted power system together wth flywheel ad supercoductg magetc eergy storages. DC dstrbuted power systems Some of the lterature studed does ot ft to the study though terestg. For example [39][4][4][4][66] vestgate a hgh curret low voltage DC mesh wth thyrstor based coverters. I [39][4][4] a supercoductg power system s cosdered whereas a dustral power dstrbuto system wth heret UPS propertes s cosdered [4][66]. The teded system

16 8 Chapter. Itroducto mght cota several hudred thyrstor based sources (rectfers) ad loads (verters) but the smulated systems are of cosderably lower complexty. I [39] a DC power system formed by oe rectfer ad three verters s studed. I [4][4][4][66] three rectfers are used as sources. Sce three sources are preset load sharg has to be cosdered. I all these cases DC voltage droop cotrol s used to gve approprate load sharg. Ths meas that a voltage droop characterstc s assged to each source. I [4][66] the LVDC mesh s smplfed to a rg bus ad [4] a supercoductg eergy storage (SMES) s added to the system. The paper [4] focuses o vestgato of the droop scheme. It s stated that ths wors well for supercoductg etwors. However the performace of a osupercoductg etwor s questoed. I the lterature the term power electroc buldg bloc (PEBB) s sometmes used as a term for geerc buldg blocs for power coverso cotrol ad dstrbuto wth cotrol tellgece ad autoomy. The wor preseted [] proposes a dstrbuted dgtal cotroller for PEBBs. The ma requremets ad desred features of such a cotroller s dscussed []. The proposed cotroller s based o compoets presetly avalable ad used other applcatos. A 6 W frot-ed source coverter module ad a 3 W load coverter module are desged [36]. The source coverter s desged for zero voltage trasto (ZVT) techque ad the load coverter utlses zero voltage swtchg (ZVS) techque. The source coverter s formed by a sgle-phase rectfer equpped wth a power factor corrector (PFC).e. followed by a boost coverter. The DC system voltage equals 48 V. Expermetal results are cluded [36]. I [46] coverter topologes sutable for DC dstrbuted power systems are evaluated. Especally source sde frot-ed boost rectfer caddates are vestgated but also load sde coverter modules. Voltage cotrol ad load sharg There are bascally two dfferet methods to acheve load sharg. Oe of the methods s referred to as the droop cocept ad the other as the master/slave cocept. For the droop cocept a fte loop ga for the DC voltage cotroller s adopted. A droop characterstc s obtaed from the trasfer fucto slope the P-V plae at the desred DC bus voltage. Sce ths droop characterstc appears as a egatve slope the P-V plae load sharg s obtaed. The

17 .5 Prevous wor 9 qualty of load sharg s determed by the egatve slope of the droop characterstc.e. for a steep slope load sharg s good but voltage regulato s poor. O the other had for a shallow slope load sharg s poor but voltage regulato s good. Therefore a trade-off betwee voltage regulato ad load sharg has to be made for the droop cocept. I the master/slave cocept oly oe of the source coverters s cotrollg the DC bus voltage. The other source coverters are curret cotrolled. Ths results a stff DC bus voltage regulato ad a fully cotrollable load sharg. The papers [38][5][58] gve a overvew of these parallelg methods. Accordg to [5] fve dfferet droop schemes exst. The frst s based o the use of coverters wth heret droop feature. The secod scheme s based o voltage droop due to seres resstors. The thrd scheme s called voltage droop va output curret feedbac. The fourth scheme s referred to as curret mode wth low DC ga. The ffth s schedulg cotrol va a o-lear ga. The beefts of the droop schemes are the ease of mplemetato ad expaso ad that o commucato betwee the coverters (.e. supervsory cotrol) s eeded. Ths gves hgh modularty ad relablty. The ma dsadvatages are that the voltage regulato s degraded to acheve the droop characterstc ad that the curret sharg s poor due to ope loop cotrol of the etre system. The ext large group detfed [5] s referred to as actve curret sharg schemes. Commo to these schemes s that a addtoal cotrol loop s used to provde curret sharg. Accordg to [5] three dfferet actve curret sharg cotrol structures are used for parallel coverter systems. The frst cotrol structure s called er loop regulato (ILR). The secod cotrol structure s referred to as outer loop regulato (OLR). The thrd structure reles o a exteral cotroller (EC). EC mples a large umber of tercoectos betwee the coverters. Ths meas that both the modularty ad relablty mght be degraded. It s however stated [5] that the rapd developmet of dstrbuted power systems mples that ths techque should be examed a ew lght. The hgh level supervsory cotroller ca be redudat ad the coverter cells are oly resposble for gatg ad fault dcato. Ths method s lely to yeld the hghest performace because of ts possblty of terleavg [5]. Also sx curret programmg (CP) methods for actve curret sharg schemes are revewed [5]. Of these sx three are average ad three are

18 Chapter. Itroducto master/slave curret programmg methods. Seve methods to operate multple DC-DC coverters parallel are gve [38]. I [58] four methods to acheve load sharg parallel coverter systems are gve. I [9] load sharg propertes are studed by examg the output plae (output curret versus voltage). A small-sgal model s developed for the vestgato. Smulatos ad expermets verfy the theoretcal results. The output plae s derved from equatos for curret programmed coverters [3]. The output plae s verfed large-sgal smulatos ad expermets. Droop load sharg s evaluated [37]. Oe of the mportat coclusos made [37] s that the droop method requres precse cotrol of the tal output voltage. It s also stated that the ma advatages of the droop cotrol method compared to other coverter parallelg schemes are the ease of mplemetato ad that commucato by meas of cotrol-wre coecto s ot requred. A droop fucto wth a programmed droop resstace equal to the equvalet seres resstace (ESR) of the output capactor s proposed [6]. Load sharg wth the selected droop fucto s vestgated by meas of smulatos ad expermets. A parallelg scheme called cetral-lmt cotrol closely related to master/slave cotrol s preseted [64] ad revewed [58]. The ma dfferece betwee master/slave ad cetral-lmt cotrol s that for the latter all the sources regulate the load coverter DC bus voltage. Autoomous master/slave curret sharg s used [6] for two source coverters coected parallel. A small-sgal model for the two source coverters together wth ther cotrollers s derved. A curret sharg algorthm s also preseted. Curret sharg cotrol s ecessary sce otherwse small dffereces the source coverter parameters would cause severe load mbalace. Also the voltage loop s vestgated. Desg of the compesators s dscussed but oly a few actual results are cocluded. I a stuato where several coverters coected to the DC dstrbuto bus that all cotrol the voltage precsely to the referece at ther respectve coecto pot load sharg amog sources s ot cotrolled. Istead load sharg s etrely determed by the dstrbuto bus mpedace [75]. I [76] t s stated that dstrbuted power systems have better performace tha cetralsed. Moreover t s stated that the sources coected parallel to the DC bus (frot-ed boost rectfers) should share the load to esure proper

19 .5 Prevous wor operato. I [76] the droop method s used together wth ga schedulg whch s sad to gve a robust desg terms of source-load teracto.e. good load sharg ad good voltage regulato for a modular desg approach. Accordg to [76] the ma problems of master/slave load sharg are that fast commucato s requred ad that a sgle pot falure ca dsable the etre system. Also all modules are cotrol depedet. Sx mportat ssues are addressed [76]. The frst s stablty for example terms of teractos betwee parallel coverters (especally the case of three-phase sources due to the appearace of zero-sequece currets). The secod mportat ssue s load sharg whe several sources are coected parallel to the DC dstrbuto bus. The thrd ssue s modularty.e. the ablty to maufacture ad mata the DC system. The fourth ssue s autoomous cotrol ehacg modularty ad provdg creased system relablty ad redudacy. The ffth ssue s DC bus voltage cotrol whch s mperatve. The sxth ad last ssue detfed [76] s the source output mpedace whch deed affect several of the other ssues for example the teracto betwee coverters coected to the DC system. The ga-schedulg method utlsed [76] s based o a modfed droop method where the voltage loop ga s creased for creasg output power such a way that the voltage error decreases compared to the case wth a costat ga droop fucto. Accordg to [76] both DC bus voltage cotrol ad load sharg show better performace compared to master/slave cotrol. A terestg opto ot dscussed [76] s to use a adaptve cotroller for the DC bus voltage cotrol. I [44] a droop load sharg scheme s vestgated where the DC bus voltage referece s adaptvely cotrolled for each coverter order to mprove voltage regulato ad load sharg. Small-sgal stablty based o mpedace specfcato A system wth a arbtrary umber of DC-DC source coverters paralleled usg master/slave cotrol s vestgated [6]. Small-sgal stablty ad dyamc performace are vestgated. Also a curret sharg compesator s developed. The compesator s desged the frequecy-doma ad verfed through tme-doma smulatos. A small-sgal model for a parallel rectfer system s derved []. Dyamc propertes the case of log ductve ad resstve cables are vestgated. It

20 Chapter. Itroducto s foud that the cable parameters do ot affect the dyamc propertes extesvely. Load sharg s vestgated for both droop ad master/slave methods. It s foud that a system wth parallel rectfers s stable provded that each dvdual rectfer s stable whe the droop method s appled. Ths s ot true the case of master/slave cotrol whch should be desged carefully. Small-sgal stablty crtera for DC-DC coverter systems ofte ed up a mpedace specfcato where the relato betwee source coverter output mpedace Z o ad total load coverter put mpedace Z s gve by ( Z ) Z << Z (.) o where Z s the put mpedace for coverter. Ths mpedace crtero was frst establshed the paper Iput Flter Cosderatos Desg ad Applcato of Swtchg Regulators wrtte by Mddlebroo 976 [55]. Some of the more recet mpedace specfcatos for stable operato of DC dstrbuto systems stead specfy a forbdde rego the complex frequecy plae [][][8][7]. I [7] a forbdde rego for the total loop ga s specfed so that a mmum phase marg s esured. Ths s further developed [][] where the dvdual load coverter mpedace s specfed so that the forbdde rego s avoded by applyg Re Z P Z o load < Psource (.) ad ( Zo Z ) < + Φ 9 Φ < 9 (.3) where Z Pload Zo Psource Φ arcs (.4) The results obtaed [][] are appled for the power supply of a Petum processor [7]. The power system of the vestgated PC provdes the voltage levels 3.3 V 5 V ad V. The teractos betwee source ad

21 .5 Prevous wor 3 load are foud to be strog but o stablty occurs. However t s foud that codtoal stablty problems mght occur. It s stated that codtoal stablty problems caot be solved by the applcato of the mpedace crtero. Accordg to [7] there are two possble solutos to chec for codtoal stablty. The frst s to derve the system trasfer fucto wth dfferet loads whch s geerally very complcated. The secod s to clude ga formato the mpedace crtero gvg a set of mpedace curves for the source coverter output mpedace. There are also two methods reducg the rs for occurrece of codtoal stablty. The frst s to crease the source coverter DC sde capactace. The secod s to apply a curret feedbac loop. The wor [][] together wth the stablty marg motorg method preseted [][3][4][5] s cocluded [5]. I the paper [65] the relatoshp betwee stablty ad DC bus capactace s studed. Also fault propagato s vestgated. The ma objectve of the vestgato s to mmse the DC bus capactace. I [8] large DC power systems for space applcatos are vestgated. Here equato (.) s used for small-sgal stablty aalyss. It s also poted out that large-sgal or traset stablty ssues are of great cocer. The methods suggested for large-sgal aalyss are computer aalyss volvg Bode plots Nyqust curves ad traset resposes. Also hardware testg both for valdato ad model developmet are used the stablty aalyss. Iput flter desg s dscussed [7]. Here all the DC-DC coverters are equpped wth a put flter. Itally the effect of the put flter o the DC-DC coverter trasfer fucto s vestgated. The the extra elemet theorem [56] s used to vestgate the effect caused by the mpedace see from the flter put termals. Ths mpedace s dvded to two parts: the source (seres) mpedace ad the cumulatve (shut) mpedace.e. the collectve regulator put mpedace resultg from the put flters of the other power modules. If Z Z s s << Z << Z d (.5) hold where Z s s the flter output mpedace Z ad Z d are the DC-DC coverter put mpedaces wth the output ulled ad shorted respectvely the the DC-DC coverter trasfer fucto s prcple ualtered by the put flter [7]. Furthermore ths meas that the egatve mpedace

22 4 Chapter. Itroducto resultg from a costat power load s decoupled from the DC dstrbuto bus. It s foud that f several DC-DC coverters equpped wth flters desged from ths rule are coected to a commo DC dstrbuto bus the the cumulatve mpedace s postve ad decrease as the umber of power modules crease. Ths meas that the stablty marg creases as the umber of coected power modules creases. I [5] power bufferg s utlsed to ehace stablty of a DC dstrbuted power system durg trasets. Ths s acheved by reducg the loop ga ad cosequetly the egatve cremetal put mpedace of the coverters so that the sum of the source output mpedace ad the egatve cremetal put mpedace s postve. Ths yelds a stable system. Aother possblty s also dscussed [5] where the power buffer s cotrolled to a certa put mpedace durg the trasets. Large-sgal stablty Large-sgal stablty s treated [] where the dstrbuted power system s formed by oe sgle DC source wth several load coverters coected. Each load coverter s equpped wth a put LC-flter. The LC-flters are modeled as deal except for a resstor R coected seres wth the ductor. The largesgal stablty costrats are expressed as boudares o R. The upper lmt for R s formed by applcato of the equlbrum pot codto.e. by vestgato of the maxmum R yeldg a tersecto betwee the source ad the load characterstcs. Accordg to [] ths gves dc o V R < (.6) 4 P where V dc s the DC source voltage ad P o s the load coverter output power. The lower lmt for R s foud from the mxed potetal crtero. I [] lower lmts o R are establshed for the cases wth oe two ad load coverters coected to a sgle DC source. However computatoal problems appear for larger systems. Therefore approxmatos are used the case of multple costat power loads. I the case of costat power loads t s also assumed that these are equal terms of flter compoet values ad output power. For ths case a approxmate lower boud s gve by [] R > L C (.7)

23 .5 Prevous wor 5 For hgh the resstace R has to be hgh whch mples hgh power dsspato. I [] t s foud that the approxmato of the lower boud for R gves a error betwee the approxmated maxmum sgular value ad the exact approachg % as creases. Robustess agast parameter ucertaty I [47] DC power system stablty s vestgated wth focus o robustess agast parameter ucertaty. Robust cotrol theores are appled to DC power systems. Accordg to [47] ths s doe to cope wth the sestvty to parameter ad load varato resultg DC power systems proe to stablty. The stablty robustess s vestgated by computg the multvarable stablty marg m ad the structured sgular value µ. Calculatg these quattes exactly s cumbersome. Therefore dfferet approxmato methods are vestgated [47]. The heret stablty of DC dstrbuto systems orgates from the fact that costat power loads appear as egatve resstaces to the regulators (source coverters). The equvalet resstace see from the regulator s [47] R eq v vbus (.8) P I [47] Mddlebroo s Crtero [55] s regarded as the ormal way to hadle ths problem.e. to use a solato cocept. Two problems arse from usg Mddlebroo s Crtero accordg to [47]. Frstly parameter varatos are ot covered by the crtero ad secodly t s teded for a two-port system. For the multloop case cosdered [47] a multple put multple output (MIMO) system should stead be vestgated whch s ot covered by Mddlebroo s Crtero. I [47] expressg the electrcal system as a MIMO system ad the use the covex hull algorthm to calculate the stablty marg s stead emphassed. Ths method s compared to other. Coverter modelg ad cotrol Modelg ad cotrol ssues for frot-ed three-phase boost rectfers are dscussed [34]. A average model s developed ad the stablty wth dfferet loads coected across the DC sde s vestgated. Sce a average model s used a costat power load s modeled as a resstor wth egatve resstace. A o-lear cotroller e.g. wth feed forward of the load curret gves the best performace.

24 6 Chapter. Itroducto Modelg of a four-leg verter.e. a eutral coected verter used a PEBB based DC dstrbuted power system s vestgated [67]. The fourleg coverter s preseted [78]. As [34] the coverter model [67] s averaged. The coverter put flter s of LC-type but wth a RC-crcut coected across the capactor to crease the shut mpedace at hgh frequeces. The mpedace overlap betwee the flter put ad output mpedaces s vestgated to fulfl equato (.). As expected the teracto betwee put ad output decreases as the damper resstace creases.e. the phase marg creases. I [67] a sgle source coverter formed by a trasstor frot-ed rectfer s cosdered. The DC sde flter of the trasstor rectfer s formed by a capactor. Iteracto betwee the rectfer output flter ad the verter put flter s also vestgated. As the prevous case the phase marg creases wth creasg damper resstace. The same result s acheved by creasg the rectfer DC sde capactace. A more terestg soluto exsts accordg to [67]: f the cotroller badwdth s reduced the phase marg s creased. The terestg characterstc about ths feature s that t ca be tued ole whereas the system has to be shut dow for the other two methods. I [75] two source coverters coected to the same DC dstrbuto bus are modeled smultaeously to vestgate ther teracto. Here master/slave cotrol s used ad t s clamed that the same cotrol strategy as the sgle source case apples. However t s stated that for log dstrbuto dstaces wth several sources ad loads other cotrol strateges are probably requred. A swtch model for large-sgal modelg of dstrbuted power systems s studed []. It s foud that the smulato wth the proposed model shows good agreemet wth devce level smulatos. It s also foud that the smulato tme s reduced sgfcatly. The zero-sequece curret dstrbuted power systems The fact that grd coected coverters mght gve rse to hgh commo mode currets s well ow. Ths causes problems le bearg currets ad sulato problems electrcal maches [48]. The commo mode curret results from the varatos voltage potetal of the DC sde supply rals depedg o the actual swtch state. Cosequetly the fudametal of the commo mode curret appears at swtchg frequecy. The capactve couplg betwee the supply rals ad groud provdes a path for the commo mode curret. Due to the capactve ature of the curret path the commo mode curret magtude creases wth creasg swtchg frequecy.

25 .5 Prevous wor 7 I [7] the supply ral voltage shft s aalysed. Frst the eutral to groud voltage varato for a dode rectfer/three-phase coverter combato s vestgated. The eutral s ths case the star-pot of the load at the coverter output whch for example could be the star-pot of a electrcal mache. It s show that the eutral to groud voltage vares as the egatve supply ral to eutral voltage for the rectfer wth the coverter swtchg supermposed. Both smulatos ad measuremets are show. Secod the same vestgato s made for a cotrolled rectfer/coverter combato coected bac-to-bac. I ths case the stuato s eve worse at least terms of hgh frequecy cotet sce the egatve supply ral to groud voltage varato s determed by the swtchg frequecy of the rectfer. Accordg to [7] oe way to partly reduce the problem s to sychrose the modulato carrers of the rectfer ad coverter. Note that sychrosato should be avoded f modularty ad autoomous cotrol s desred. Also a thrd case s vestgated where two geerators feed the same DC dstrbuto bus va trasstor rectfers. I ths case t s complcated to sychrose the swtchg patters sce t s lely that the geerators operate at dfferet load codtos. Furthermore there mght be extremely hgh zero-sequece currets f both geerators are grouded to the same physcal groud potetal. Three methods are proposed to reduce the problems related wth commo mode currets. Frst the allevato method whch cludes stallg electromagetc terferece (EMI) suppressg choes flterg ad the use of soft-swtchg techques. The secod method s referred to as a tolerat method where EMI currets are allowed but sheldg s used the motor to reduce the bearg currets ad sulato stress. The thrd method addresses ew coverter topologes where the four-leg VSC [67][78] s metoed as a example. I [] hgh mpedace groudg s vestgated to maage problems assocated wth eutral voltage shft. I [74] two trasstor rectfers are coected to the same geerator (or equvaletly AC power system) ad the rectfers feed the same DC dstrbuto bus. It s foud that the average smulato model dqcoordates (Appedx B) the zero-sequece curret does ot appear. Istead a dq smulato model has to be adopted. I ths smulato model a hgh zero-sequece curret appears. Ths problem s especally obvous whe oe of the rectfers has the swtch state ad the other (Appedx A) whch meas that the DC dstrbuto bus voltage s appled across the sum of the geerator stator ductaces for each phase. I [74] ths s solved by adoptg a modulato strategy where the zero voltage vectors ad are ot utlsed for the source rectfers. I [77] a o-solated system of oe frot

26 8 Chapter. Itroducto ed boost rectfer ad oe verter s studed from a coverter modulato pot of vew. It s foud that the proposed modulato scheme (terleavg) reduces the commo mode curret. I [75] groud loop teractos betwee two geerators wth a commo groud s also dscussed. A actve flter for the DC bus s dscussed [73]. The actve flter s formed by a trasstor half-brdge ad a DC l capactor. The DC dstrbuto bus sde flter s purely ductve. The actve flter s requred to reduce AC curret compoets jected from three-phase voltage source coverters. These AC compoets result from egatve-sequece or harmoc currets o the AC sde of the three-phase coverters. I [73] the swtchg frequecy of the actve flter s selected cosderably hgher tha the oe of the other coverters of the DC dstrbuto bus. The hgh swtchg frequecy mples that teractos betwee the other coverters ca be suppressed resultg a stablsg effect. Cosequetly the DC dstrbuto bus mpedace s tued for best performace thus ehacg the stablty. Note that the DC l capactor voltage must be hgher tha the DC bus voltage for the actve flter. Electromagetc terferece I the paper [8] EMI problems related to swtch mode power supples coected to a DC dstrbuto bus of log legth are vestgated. The load coverter swtchg appears as a varable load whch geerates reflectos. The hgh rse ad fall tmes geerate hgh frequecy sgals radated by the log power system coductors. I [5] hgh frequecy teracto terms of dsturbace propagato from DC dstrbuto bus voltage to load coverter output voltage s addressed. The problem s vestgated from a aalytcal pot of vew ad wth smulatos ad expermets. The ey result s that the swtchg frequeces of the coverters should be as equal as possble to reduce load coverter output oscllatos. Load flow ad short crcut calculatos DC power system aalyss terms of load flow ad short crcut calculatos s vestgated [6]. Numerous source models (.e. battery charger rectfer ad geerator models) are gve. Also coector models for load flow ad short crcut calculatos are vestgated. Loads ad braches are modeled. Accordg to [6] the preset stadards ( the year 996) are ot complete ad eed further wor.

27 .5 Prevous wor 9 I [3] the methods of the IEC draft stadard Calculato of short crcutcurrets dc auxlary stallatos power plats ad substatos are vestgated. The calculatos are teded to determe approprate fusg for the system. Four dfferet loads are vestgated [3]. These are the (thyrstor) coverter 5 or 6 Hz AC systems statoary lead-acd batteres smoothg capactors ad DC motors. The straghtforward methods gve the stadard are compared wth EMTP smulatos. The stadard gves coservatve estmates of the short crcut currets (5% overestmated). Also the tme costats estmated accordg to the stadard are loger tha the smulated. The stadard was ot applcable ( the year 996) to large DC systems such as ralway tracto systems HVDC trasmsso systems ad photovoltac systems. Accordg to [3] the reaso s that the models developed for the stadard do ot cover the set of electrcal parameters appearg for these systems. A detaled model of a RL-fed brdge coverter for use a Newto-Raphso power flow program for dustral AC/DC power systems s derved [68]. Ths s doe sce brdge models smulato pacages are geerally oly vald for example HVDC applcatos where the commutato resstace s eglgble. Two systems are smulated to demostrate the accuracy a coal me electrcal power system ad a ralway power system. It s foud that the developed model yelds a cosderably hgher accuracy for systems wth hgh commutato resstace. Due to the dffereces betwee load-flow studes of AC ad DC power systems a ew algorthm ad a DC smulato pacage are developed [79]. The load flow algorthm s based o the Newto Raphso method. DC load flow smulato models are developed for costat DC voltage power sources batteres AC/DC rectfers costat power load costat curret load costat resstace load ad tme-varyg load. Several case studes are smulated ad ther voltage profles are show. Groudg Accordg to [7] the best groud pot s the md-potetal betwee the postve ad egatve coductors of the DC dstrbuto bus. Ths meas that the voltage shft s localsed to each sub-system. I [7] groudg ssues for drve systems geeral are dscussed. A thorough aalyss s preseted ad t s foud that hgh mpedace groudg s expected to be used the future as fault detecto systems become more accurate ad relable.

28 Chapter. Itroducto.6 Specfcato of a dstrbuted power system Ths secto cotas the ma requremets put o a future DC dstrbuted power system. The requremets are based o the prevously addressed objectves of ths wor. The power system should be well adapted to operate wth preset sources ad loads terms of voltage ad frequecy. It should also provde a hgh degree of load ad source power cotrollablty. The system should be expadable.e. ew load ad source uts should be possble to add wthout alterg uts already coected. Commucato betwee dvdual coverters should be avoded sce addg ew uts wll be more complcated. Also the system could suffer from relablty problems. O the other had commucato at a low badwdth s cosdered ecessary for supervsory cotrol. Therefore sgle coverters are allowed to rely o low badwdth commucato but should be able to operate as stad-aloe uts. The degree of persoal safety should be equal to or better tha the preset power system. The basc requremets above lead to other more techcal requremets. For example hgh badwdth source ad load sde curret cotrollers should be adopted to provde load ad source power cotrollablty. Also the hgh badwdth of the curret cotrollers together wth the desre to ot rely o (hgh-speed) commucato result a demad of log equvalet tme costats of the DC bus voltage cotrol. Ths also maes the DC bus robust agast dsturbaces o coverter load ad source sdes for example egatvesequece dsturbaces.

29 Chapter Exstg DC power systems There are few systems utlsg DC to trasmt or dstrbute electrcal power by meas of DC today. Most power s trasmtted ad dstrbuted by meas of AC. The AC grd frequecy s thereby the most essetal cotrol parameter ad after that geerato ad dstrbuto of reactve power to eep the voltage wth specfed lmts. The stablty of a AC power system s strogly depedet o ts electro-magetc characterstcs ad to a mor extet o power electrocs because power systems expaded over wde areas durg half a cetury whe DC based hgh-voltage trasmsso was o-compettve. Durg the latter half of the last cetury HVDC trasmsso became cost effectve especally as a way to coect asychroous grds. For the last decades the feasblty of low-voltage self-commutated verters coected to a commo DC bus has creased resultg LVDC dstrbuto systems feedg dustral adjustable-speed drves. Coverters smlar to the oes utlsed VSC based HVDC ad dustral drves are also used o-board electrcal ralway vehcles equpped wth a commo lowvoltage LV or medum-voltage MV DC bus. The ma aspect of those socalled tracto drves s that the coverters coected to the propulso drves are ormally hadlg the same power levels but splt to parallel drves due to redudacy ad/or ratg reasos. There s usually also a auxlary power coverter coected to the commo DC bus. I ths chapter HVDC trasmsso systems are dscussed sce these are judged to have relevace as a bacgroud to the DC dstrbuted power systems to be studed. Frst the classcal HVDC l s vestgated. Secod the recetly troduced VSC based HVDC cocept utlsg sulated gate bpolar trasstor (IGBT) techology s dscussed.