Corporate Presentation March 2014

Transcription

1 Corporate Presentation March 2014

2 Safe Harbor The following presentation, other than statements of historical fact, may include certain forward-looking statements within the meaning of the United States Private Litigation Reform Act of 1995 and applicable Canadian securities laws. These forward looking statements are made under the Safe Harbor provisions of the aforesaid act and laws. All statements regarding future plans and objectives are forward-looking statements. Words such as expect, anticipate, estimate, future plans, may, will, should, intend, believe, opportunities, and other similar expressions are forward-looking statements. Forward-looking statements are subject to risks, uncertainties, assumptions and are not guarantees of future results, but rather reflect current views with respect to future events. Important factors that could cause actual results to differ materially from those expressed or implied in the forward looking statements include risks and factors disclosed under the heading Risk Factors in the public documents filed from time to time with the System for Electronic Document Analysis and Retrieval ( SEDAR ). Readers should not place undue reliance on any forward-looking statements. We disclaim any obligation to update or revise any forward looking statements, except as required by law to reflect any change in expectations, events, conditions or circumstances on which any of the forward looking statements are based, or that may affect the likelihood that actual results will differ from those set forth in the forward-looking statements.

3 Overview POET Technologies Inc. is a fabless designer of the POET platform, a best of breed, leap forward next generation compound semiconductor. The POET platform builds into it monolithic fabrication of integrated circuit devices that contain both electronic and optical elements on a single semiconductor wafer. With head office in Toronto, Ontario, Canada, and operations in Storrs, CT, the Company s operates in two segments, designing III-V semiconductor devices for military, industrial and commercial applications, including: infrared sensors, mobile and wearable devices, computer servers, storage arrays, imaging equipment, and networking equipment. The Company's common shares trade on the TSX Venture Exchange under the symbol "PTK" and on the OTCQX under the symbol "POETF". For more information please visit our websites at

4 Development Background Technology Development (University of Connecticut, Storrs, CT 1994 Present) Lab facility and infrastructure design/build Completion of POET concept to include p-channel devices 1997 Third party SBIR funding (10 Phase I s, 1 Phase II)equipment build up Founded OPEL Technologies (now POET Technologies) in 2000, first SBIR win 2001 First investor funding $250K to fast track Phase I SBIR start team build Continued OPEL SBIR funding to acquire equipment and team (expert team consisting of PhDs and highly experienced semiconductor process experts) ODIS formation following Canadian ownership to enable SBIR funding Patent portfolio build up from Partial OPEL funding Technology Development (Bell Labs, Holmdel, NJ ) Air force launched major funding initiative for OE technology development HFET concept in 1986 (demo 1987), BicFET laser (demo 1988) DOES (thyristor) laser (demo 1988) Technology platform established by 1992 (n-channel only) Technology Background and History (Bell Labs, Murray Hill, NJ ) Starting at Bell Labs in MH-NJ in in Si device lab (Lepselter/Smith) new BicFET device concept development with J.G. Simmons - BicFET patent and publication 1985 Forced relocation from Si device development to III-V device research lab

5 Management Peter Copetti Executive Chairman and CEO Leon M. Pierhal President,and Director Dr. Geoffrey Taylor Chief Scientist Stephane Gagnon Senior Vice President, Operations Lee Shepherd Vice President, Technology Mark Benadiba Vice Chairman Peter has over 25 years of capital markets and management experience in key leadership roles. He has been the chief architect and strategist of the transformation at POET Technologies, since joining the company in June Mr. Copetti was personally responsible for the restructuring of both secured and unsecured debt, negotiated new equity infusion into the company, and re-focused the company on its original technical vision of monolithic optoelectronic integration, leading to POET's resurgence as a leading platform innovator in the semiconductor industry. Peter is the Chairman of the Special Strategic Committee which has been mandatedto look at all options for monetizing POET s IP assets in addition to maximizing shareholder value. Mr. Pierhal has over forty years of management experience in semiconductor, telecommunications and computing technology development companies such as Amdahl Corporation, Intel Corporation, Masstor Systems Corporation, and Jupiter Technology. As a senior management executive with broad international experience, Mr. Pierhal has had direct responsibility for P&L, sales and marketing, and corporate development for several major companies requiring strategic expertise. Dr. Taylor has a B.Sc, Electrical Engineering from Queens University, an M.A.Sc, Electrical Engineering from the University of Toronto, and a Ph.D., Electrical Engineering from the University of Toronto. Dr. Taylor has been involved with the Institute of Electrical and Electronics Engineers, the Optical Society of America, Lasers and Electro-Optics Society, and the International Society for Optical Engineering. He conducts his research out of the University of Connecticut and has been working on the POET platform for over a decade. He is a highly regarded expert in the fields of Optics and Electronics. Stephane Gagnon has over 20 years of experience in the semiconductor, telecommunication and processor industry. His last role was Senior Director of Product Management for IDT - Integrated Device Technology where he drove business strategy for the RapidIO switching product line with primary responsibilities that included strategy and product marketing, business development and management of international customer and partner relationships. Stephane led the charge in achieving 100% market share in the Wireless 4G Base station business. Stephane is Senior VP of Operations with the mandate to help monetize POET and manage POET s overall operations. Mr. Shepherd has a Bachelor of Science (Honors) in Applied Physics from Carleton University. He has 27 years of experience in business, technical, and military leadership roles. He has spent the last 18 years in the Telecommunications/Information Technology industry serving in technical, management, architecture, and entrepreneurial roles of ever-increasing scope and responsibility. He is Founder and Chief Executive Officer of IT Millwrights Corporation; previously Founder and Chief Technology Officer of Neterion, and Designer, Team Leader & Architect with Bell-Northern Research and Nortel. Mr. Benadiba is currently a Director and former Executive Vice-President, North American Operations of Cott Corporation (TSX: BCB / NYSE: COT ). He was a founding senior executive in the start-up and initial expansion of Cott Corporation from a $20 million family business to a multi-billion dollar, multi-national public company. Mr. Benadiba has a proven track record in attaining private and public corporate financial objectives while consistently creating positive shareholder value including extensive experience in mergers, acquisitions, divestitures and strategic alliances. Upon joining the Cott Corporation board, Mark helped to lead the turn-around of the company in 2008, during which the Cott Corporation market value increased by more than 10x over an eight-month period

6 Our Revolutionary Semiconductor Process

7 POET/PET Description What Does POET Mean? What Does PET Mean? Planar Opto-Electronic Technology and Planar Electronic Technology What is POET? POET is a revolutionary Gallium Arsenide (GaAs) process used to build electrical, optical, and electro-optical integrated circuits Supports a full range of electrical and optical active and passive circuit components Very high performance versus existing silicon (up to 100x faster) Very low power consumption versus existing silicon (up to 95% less) Much more versatile than legacy compound semiconductor processes (GaAs, InP, others) Can be manufactured using existing CMOS chip making equipment Fully compatible with existing semiconductor design and manufacturing flows Will allow unprecedented integration into a single chip of functions that take entire chipsets today for large component cost reduction, and (particularly for optics) tremendous (e.g. 80%) reduction in assembly and test costs What is PET? PET is the electrical subset of the full POET process Can support CMOS, Bi-CMOS, and Bipolar device fabrication Offers lower cost, simpler process/fab options for applications that don t require optical feature set

8 Technical Advantages of POET POET s benefits are analogous to the benefits of the first silicon integrated circuits Eliminating connectors, solder joints, assembly and multiple packaging steps Decreases size, cost, complexity and power Increased performance and reliability Creates a path for future improvements and scaling Board-to-board, chip-to-chip optics with low-cost integrated transceivers Substantial increase in chip I/O bandwidth with reduced power using integrated wavelengthdivision multiplexing A higher speed and lower power complementary metal-oxide semiconductor (CMOS) with integrated serializer/deserializer & clock data recovery (SERDES & CDR) Novel high-density universal memory, Optical RF generation, RF photonic filtering, Optoelectronic low-jitter clock generation and on-chip optical distribution, OE computing and new architectures based on O&E combinations (e.g. quantum computing)

9 3 rd Party Independent Validation of POET POET Technologies partners with an international defense services company that is a global leader in military electronic systems design, development, manufacturing and integration Funded by AFRL, POET entered into a contract with 3rd party partner in 2008 with the intent of replicating a specific POET device in a 3 rd party MIL Spec. environment The 3rd party partner has world-class GaAs research facilities and has numerous PhD researchers working on the continued development of POET POET s partnership has successfully reproduced the POET technology as published, by producing and testing the critical electrical elements of POET Platform sub-process steps for transistors

10 Why POET Is Valuable?

11 Moore s Law and the Future of Semiconductors Electronics manufacturers strive to build smarter, faster, more efficient, and cheaper devices on a continuous basis Semiconductor performance has historically improved at a logarithmic rate because transistors (the building blocks of semiconductors) have shrunk in size, allowing more transistors to be packed into a semiconductor chip Intel s Gordon Moore captured this trend with Moore s Law the idea that the number of transistors in a chip doubles every 1.5 to 2 years, thus increasing capabilities of electronic equipment As transistors become smaller, the cost of reducing size / increasing speed becomes more expensive and eventually uneconomical Recently developed 3D silicon semiconductors stacking multiple chips and other silicon high-performance compound devices are very expensive to make and only offer moderate improvements over incumbent chips By integrating optics and electronics onto one monolithic chip, semiconductor devices using the POET process can achieve performance gains akin to Moore s Law that have not been possible in the semiconductor world to date. POET allows for performance improvements that are an order of magnitude greater than silicon devices at a fraction of the cost

12 Ready At The Right Time CMOS Silicon Evolution Is Ending Moore s Law era ? CPU/GPU execution unit speeds haven t improved in over 10 years Industry looking for new technology path Packaging Techniques Have Not Improved OE Transceiver Cost Various hybrid integration techniques like 2.5/3 D packaging, silicon photonics have not led to improved Opto-Electronic Transceiver costs Single-chip transceivers needed for fiber to fully replace copper for system interconnect applications Copper Cable Era For System Interconnect Is Ending 1 Gigabit Ethernet system interconnect was and is mostly copper-based 10 Gigabit Ethernet system interconnect was and is almost entirely fiber-based Optical Systems Need More Lithography, Less Mechanical Assembly Many optical systems that need aligned arrays of sensors and/or lasers cannot be built today due to mechanical assembly cost constraints POET offers this alignment capability by means of lithography, dramatically lowering the cost of these products (IR sensors, holographic displays, etc.)

13 Applications POET s technology can surpass speed limits of widely used CMOS silicon chips and is much better positioned for stacking multiple chips to increase performance A functional POET device may reduce the power consumption of laptops, tablets, smartphones, servers, and/or other electronic devices by 80% Leads to drastic reduction in device size and battery power consumption Power reduction in commercial-scale server farms represents tremendous cost savings to companies like IBM, Google and Intel In November 2011, Hewlett Packard announced that it is working with numerous chip manufacturers to create ultraefficient, low-energy servers aimed at companies running largescale remote computing operations such as Twitter and Facebook POET can also produce an infra-red sensor for use in air, sea, ground, and space with sensitivity that is an order of magnitude higher than existing technology

14 Sampling of Potential Market Applications Commercial CPU Memory Processor to Processor Optical Interconnect Communications Smart Phones Network (Cell Towers, LANs, MANs) Fiber to the Home (FTTH) Defense Infrared Sensors (Uncooled SWIR, MWIR, LWIR) Integrated photonics and electronics for: Radar and Lidar Communications Displays Hardened computers and memory Microwave and millimetre wave power sources Other Active Optical Cables Coherent laser arrays for pumps, industrial applications Commercial UV/VIS/NIR cameras Medical Imaging Devices

15 Semiconductor Market Forecasts (POET Markets) POET technology is applicable to a large portion of the total semiconductor market ($430 billion 2015 Forecast) as it is possibly the most comprehensive solution yet to increasing semiconductor performance in an economic and functional manner In the near term, POET could potentially address the following markets: Optical semiconductor ($37.4 billion 2015 Forecast) Sensors and actuators ($14.1 billion 2015 Forecast) Analogue ICs ($55.9 billion 2015 Forecast) Discrete semiconductor ($28.6 billion 2015 Forecast) In the longer term, POET could potentially address the following markets: Logic ($114 billion 2015 Forecast) MPUs and MCUs ($92.6 billion 2015 Forecast) Memories ($86.6 billion 2015 Forecast) Quantum computing Although quantum computing is in its infancy, POET can support quantum computing applications since it can support fabrication of quantum dot-based spin qubits and the devices needed to read and write them on the same die

16 Four Examples of POET Value CMOS Silicon Final CMOS Si geometry (10/11 nm) is under development now; first production 2015? POET/PET offer about 100x speed improvement over CMOS silicon POET/PET offer x power efficiency improvement over CMOS silicon OE Conversion As example, current 10 Gigabit Ethernet transceivers use about 10 individually packaged ICs on a substrate in a die-cast housing; POET can reduce this to 1 individually packaged IC Depending on application, POET can reduce overall OE transceiver cost by 60 to 90% Memory and Storage Current memory types include dedicated SRAM, DRAM, and NVRAM devices POET/PET memory cell can concurrently support all three memory types Massive simplification at system level due to elimination of NVRAM backup/recovery Much lower bit error rates than silicon-based memories (several orders of magnitude) Sensors and Weapons POET provides low-cost optical thyristor arrays that can be used as dual-mode sensor/laser arrays (same panel can find targets and destroy them) Main reason US Government funded research for so long (19 years and counting )

17 Complementary Technologies 2.5 D Packaging Refers to die-stacking where multiple chips are put in a single package; often used for memory devices 3 D Packaging Refers to true multiple-chip packaging where devices can be assembled in any orientation to one another in the vertical or horizontal plane Silicon Photonics Typically involves a passive silicon substrate providing optical (and often electrical) interconnect between separate active devices attached to it Coherent Optics Module-level tunable integrated optical circuits for DWDM optical networking applications

18 Competitive Strength Monolithic Opto-Electronic Integration Very long development timelines (VC-backed startups have all failed) Dozens of companies have attempted at least some work in this area; considered to be the long-term industry Holy Grail Other efforts have favored optics over electronics (usually based on InP instead of GaAs) Competitive Activities Intel has been working on monolithic integration for several years now; their internal efforts are estimated to be several years (at minimum) behind POET/PET Most industry efforts over last few years have been related to hybrid integration techniques like silicon photonics InP-based processes developed to enable more optical integration, but pretty much useless for electrical applications

19 Monetization Paths Several Options to Monetize POET POET is a research company, not a product company POET/PET are ready to enter the commercialization process No single company is currently active in all market areas where POET provides a bestin-class value proposition; syndicate needed to extract full value from technology platform Single Acquirer This path would involve selling POET to a single (by definition large) 3 rd party Technology access/investment would likely be syndicated by acquirer Relatively small number of viable candidates Multiple Acquirers This path would involve selling POET to a syndicate (likely structured as a joint venture) Ideal syndicate would include members with market presence in all key areas related to POET commercialization Licensing Certain specialized market segments might be best addressed by licensing all or part of the POET/PET technology to one or more 3 rd parties for use in a given market Can be complex with difficult-to-foresee implications for other activities

20 Timeline Of Planned Activities Technology Milestones Internal test chip development milestone list External (Independent Fabrication Facility) process validation milestone list Business Milestones Restructuring milestone list POET/PET monetization milestone list

21 Milestone Terms and Definitions Milestone # Previous Terminology Updated Terminology Definitions 1 Integrated Pulsed Laser Integrated Pulsed Laser General purpose laser for on-chip use. 2 Electrical Component Validation p and n channel Complementary Heterostructure Field Effect Transistor Validation High performance, power efficient transistors. World s first complementary GaAs HFETs. 3 Vertical Emitting Laser Continuous Wave Vertical Cavity Surface Emitting Laser Demonstration High density laser design for surface-emitting applications (e.g. chip-to-chip in stacked-die array). 4 RF operation of n-channel and p- channel devices n-channel and p-channel Complementary Heterostructure Field Effect Transistor Radio Frequency Validation Demonstrating radio frequency and microwave performance of revolutionary complementary HFETs. 5 Four-Terminal Switching Laser 3/4 Terminal Switching Laser Demonstration High quality pulsed laser type for critical signal propagation (e.g. clocks, optical line signaling). 6 Complementary Inverteroscillator Complementary Heterostructure Field Effect Transistor-based Inverter/Oscillator Demonstration Complementary HFET-based ring oscillator (standard circuit configuration used to demonstrate process performance). 7 Optical Component Validation Optical Thyristor-based Infrared Detector Array Fabrication and Validation An array of optical thyristors configured as infrared detectors. 8 Feature Size Reduction Demonstration of 100 nm or below PET n- and p- channel device and ring oscillator Demonstration of p and n type HFETs and BJTs at sub-100 nm feature size (smallest GaAs transistors in the world to date). 9 Integrated Optical Modulator Demonstration Integrated External Modulator for Continuous Wave Laser Demonstration High performance optical modulator for use with continuous wave lasers (best performance for critical applications). 10 Monolithic Integration Full Integration of Electrical and Optical Devices on Single Die Integration of all previously developed POET electrical and optical devices on a single die.

22 Milestone Terms and Definitions Milestone # Previous Terminology Updated Terminology Definitions 11 TDK (Technical Design Kit) Design rules and parameters library for POET platform. 12 PET Electrical TDK Design rules and parameters library for PET process.

23 Targeted Development Milestones Q p and n channel Complementary Heterostructure Field Effect Transistor Validation (3 rd Party Fab) See previous slide for definition of terms Q p and n channel Complementary Heterostructure Field Effect Transistor Radio Frequency Validation (3 rd Party Fab) Q Complementary Heterostructure Field Effect 1 um Transistor-based Inverter/Oscillator Demonstration (POET Lab) Completed at request SSC prior to M ilestone 5 Q Demonstration of 100nm or below PET n- and p- channel device (POET Lab) Q Full POET TDK Documentation Release (under NDA) Q Integrated Pulsed Laser Demonstration (POET Lab) Q Continuous W ave Vertical Cavity Surface Emitting Laser Demonstration (POET Lab) = Milestone Accomplished = CHANGES BY SSC Jan /4 Terminal Switching Laser Demonstration (POET Lab) Jan Optical Thyristorbased Infrared Detector Array Fabrication and Validation (3 rd Party Fab) Feb weeks for MBE planned m aintenanc e Q PET Electrical TDK Electrical Technology Design Kit Models available (under NDA) SSC Decision - Milestone #9 and #10 TBA POET team is impacted by MBE maintenance and needs to focus on TDK preparation. Once our main commercial partner is named, the POET priorities will be driven by the PDA (POET Development Alliance)

24 Enabling Markets and Partners Market s H igh Speed Digit al Mobile handheld Base for most market s < 90 nm geometries Mixed Signal/ Analog Automotive Phase 1 POET Development Team Part ner Team(s) POET Research Team Phase 3 Market s H igh Speed Digit al complet e offering FLASH Memory DRAM H igh Speed Opt ical Active op. cables DW DM Market s OE Transceiver Data center fiber inter connect TOSA/ ROSA H igh Speed Sync Logic Phase 2 Phase 4 Market s MMW t ransceivers Radio over Fiber 2014 Recognition Year for POET

25 Paradigm-Changing Technology

26 POET Potential Value For the CMOS Silicon Industry The silicon industry (and a myriad of system businesses it supports) has been looking for a new technology path for several years, with limited success and ever-increasing urgency POET/PET offer about 100x speed improvement over CMOS silicon (silicon hits a power wall at about 4 GHz that has limited circuit speeds to about 3.2 GHz over the last 10 years) POET/PET offer x power efficiency improvement over CMOS silicon (depending on application) Since POET/PET are CMOS technologies fabricated using standard lithography techniques, they are highly amenable to current semiconductor production facilities: no retrofit/modifications to existing silicon fab s to manufacture POET/PET-based wafers/devices

27 POET Potential Value For the CMOS Silicon Industry Total sales in the semiconductor industry will be over $430B in 2014 CMOS silicon is the dominant technology in use today by the semiconductor industry, accounting for over 90% of the total wafer area fabricated in 2012 CMOS silicon has supported a doubling of circuit density every 18 months or so since the early 1960s; this phenomenon is referred to as Moore s Law after the man who first predicted this would occur and continue for decades (Dr. Gordon Moore, co-founder of Intel Corp) This continuous improvement in technology capability has been the key growth enabler in the overall tech business for the last 50 years, and it s just about over Final CMOS silicon geometry (10/11 nm) is under development now, with first production planned for 2015; quantum effects preclude further transistor size reductions, and any meaningful performance improvements stopped several years ago (e.g. CPU execution unit speeds haven t improved in over 10 years)

28 Typical Mobile Device Architecture Today Integrated Mobile Processor Radio Frequency Baseband Memory NVRAM

29 POET-Enabled Mobile Device Architecture Full Monolithic Integrated Mobile Device

30 POET Potential Value For the OE Conversion Industry OE conversion modules are used whenever an electrical/electronic system (e.g. a compute server, storage array, switch, router, etc) is connected to an optical fiber network Today these modules consist of several discrete integrated circuits (ICs, or chips ) of different materials and processes POET offers the capability to integrate the entire OE conversion function from electrical connector to fiber connector in a single IC: for example, current 10 Gigabit Ethernet transceivers use about 10 individually packaged ICs on a substrate in a die-cast housing; POET can reduce this to 1 individually packaged IC An OE module based on the POET technology offers tremendous cost savings; depending on application overall module cost can be reduced by 60 to 90% through a combination of assembly, test, bill of materials, and reliability improvements POET can support integration of the entire OE interface into a larger digital device like a CPU, NPU, integrated switch, etc; this will enable (for the first time) single-chip systems with direct optical-fiber attachment

31 10 Gigabit Optical Transceiver Today: 9 Chips Laser Driver Laser Diode SerDes/C DR Micro Controller Memory NVRAM Limiting Amplifier Trans Impedanc e Amplifier Detector

32 POET-Enabled 10 Gigabit Optical Transceiver: 1 Chip!! Integrated OE Transceiver

33 POET Potential Value For the Memory Industry Current semiconductor random-access memory (RAM) types include dedicated Static RAM (SRAM), Dynamic RAM (DRAM), and Non-Volatile RAM (NVRAM); each type has certain advantages/disadvantages depending on application Modern electronic systems invariably require a mix of all three types SRAM cell arrays are (typically) embedded in larger chips like CPUs, NPUs, etc. for high performance applications like on-chip cache in CPUs DRAM cell arrays are almost entirely implemented in stand-alone memory chips (and put on DIMMs ) and are much more dense and power efficient than SRAM NVRAM cell arrays are entirely implemented in stand-alone memory chips (e.g. flash memory devices used for solid state hard drives in mobile devices) POET/PET support the fabrication of memory cells that can concurrently support all three types of memory operation Offers massive simplification at system level due to elimination of NVRAM backup/recovery

34 POET Potential Value For the Memory Industry Much lower bit error rates than silicon-based memories (several orders of magnitude) due to inherent physical properties of Gallium Arsenide versus Silicon Can achieve densities comparable to modern DRAM and speeds up to 100x faster than current SRAM Due to the tri-mode capability, system memory requirements are significantly reduced; depending on application, system memory capital cost would be reduced by 20 to 50% For the same reason as above, again depending on application system memory power consumption would be reduced by 25 to 80% Today storage RAID systems require battery backup to save striping and encoding configurations in case of system power loss; each server RAID card needs a battery comparable in size to those used in laptops for this purpose, plus sufficient dedicated flash memory to store the entire subsystem configuration; this represents a significant cost addition (~$100/unit) and a significant safety/fire hazard in data center environments

35 One Monolithic Opto- Electronic Chip Example of integrated lasers, detectors, logic, and transistors all on one die

36 POET Potential Value For Imaging Sensors and Directed Energy Arrays POET provides low-cost optical thyristor arrays that can be used as dual-mode sensor/laser arrays (same panel can find targets and destroy them) POET arrays can be constructed to be flexible, allowing them to easily be attached to the surface of complex shapes like aircraft and ships, forming an active skin This configuration will allow aircraft and ships to service targets much more quickly than the separate sensor-gun-missile systems that represent current state of the art Due to the inherent physical properties of GaAs, POET sensor arrays can achieve superior resolution for SWIR, MWIR, and LWIR applications to the best silicon sensors currently available, and can achieve this performance without the elaborate and heavy electromagnetic shielding and liquid nitrogen cryogenic cooling required by silicon-based systems Main reason the US Government has funded research for so long (19 years and counting )

37 POET Potential Value For Imaging Sensors and Directed Energy Arrays For commercial applications POET offers tremendous cost savings for implementing laser-arraybased systems like 3D holographic displays (could put one on a cell phone for about $15), directed energy tools (e.g. micro-assemblers), machine vision, low-cost night vision and active imaging and ranging for automotive applications, etc. etc. etc.

38 Undiscovered Diamond: Just Ending 23 Years of Stealth! Finally Ready to Show the World Very long technology development timeline (23 years and counting ) Recently started building test chips to show POET capabilities to interested 3 rd parties Technology Is Almost Unknown Outside POET Technologies Very limited exposure to date with US-based investors Very limited exposure to date with non-defense tech firms Thank-you. For more information please visit us at