The Cost Models For VLDB 2009 Summer School Shanghai Architecture

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Sophie Deirdre Garrett
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1 Cost models for Main-Memory database systems Peter Boncz Stefan Manegold CWI (Amsterdam)

2 Contents Generic Database Cost Models for Hierarchical Memory VLDB 2009 Summer School Shanghai Architecture-Conscious Database Techniques 2

3 VLDB 2009 Summer School Shanghai Architecture-Conscious Database Techniques 3

4 VLDB 2009 Summer School Shanghai Architecture-Conscious Database Techniques 4

5 vz Generic Database Cost Models for Hierarchical Memory VLDB 2009 Summer School Shanghai Architecture-Conscious Database Techniques 5

6 VLDB 2009 Summer School Shanghai Architecture-Conscious Database Techniques 6

7 VLDB 2009 Summer School Shanghai Architecture-Conscious Database Techniques 7

8 VLDB 2009 Summer School Shanghai Architecture-Conscious Database Techniques 8

9 VLDB 2009 Summer School Shanghai Architecture-Conscious Database Techniques 9

10 Region size VLDB 2009 Summer School Shanghai Architecture-Conscious Database Techniques 10

11 Skippy Access VLDB 2009 Summer School Shanghai Architecture-Conscious Database Techniques 11

12 Full sequential access VLDB 2009 Summer School Shanghai Architecture-Conscious Database Techniques 12

13 Random access: compulsory misses + data misses VLDB 2009 Summer School Shanghai Architecture-Conscious Database Techniques 13

14 Sequential memory access Beware automatic prefetching! Sequential access is much cheaper -5GB/s vs 500MB/s Workaround: use amoritzed latency for sequential accesses Random memory access VLDB 2009 Summer School Shanghai Architecture-Conscious Database Techniques 14

use amoritzed latency for sequential accesses Random memory

15 VLDB 2009 Summer School Shanghai Architecture-Conscious Database Techniques 15

16 VLDB 2009 Summer School Shanghai Architecture-Conscious Database Techniques 16

17 Perfect reuse VLDB 2009 Summer School Shanghai Architecture-Conscious Database Techniques 17

18 No reuse VLDB 2009 Summer School Shanghai Architecture-Conscious Database Techniques 18

19 LRU reuse VLDB 2009 Summer School Shanghai Architecture-Conscious Database Techniques 19

20 VLDB 2009 Summer School Shanghai Architecture-Conscious Database Techniques 20

21 VLDB 2009 Summer School Shanghai Architecture-Conscious Database Techniques 21

22 VLDB 2009 Summer School Shanghai Architecture-Conscious Database Techniques 22

23 keys buckets 0 1 collision-list BAT mask link VLDB 2009 Summer School Shanghai Architecture-Conscious Database Techniques 23

24 VLDB 2009 Summer School Shanghai Architecture-Conscious Database Techniques 24

25 Writes are non-blocking Ł Latency = 0 VLDB 2009 Summer School Shanghai Architecture-Conscious Database Techniques 25

26 VLDB 2009 Summer School Shanghai Architecture-Conscious Database Techniques 26

27 VLDB 2009 Summer School Shanghai Architecture-Conscious Database Techniques 27

28 VLDB 2009 Summer School Shanghai Architecture-Conscious Database Techniques 28

29 VLDB 2009 Summer School Shanghai Architecture-Conscious Database Techniques 29

30 VLDB 2009 Summer School Shanghai Architecture-Conscious Database Techniques 30

31 VLDB 2009 Summer School Shanghai Architecture-Conscious Database Techniques 31

32 VLDB 2009 Summer School Shanghai Architecture-Conscious Database Techniques 32

33 VLDB 2009 Summer School Shanghai Architecture-Conscious Database Techniques 33

34 VLDB 2009 Summer School Shanghai Architecture-Conscious Database Techniques 34

35 VLDB 2009 Summer School Shanghai Architecture-Conscious Database Techniques 35

FPGA-based Multithreading for In-Memory Hash Joins

FPGA-based Multithreading for In-Memory Hash Joins Robert J. Halstead, Ildar Absalyamov, Walid A. Najjar, Vassilis J. Tsotras University of California, Riverside Outline Background What are FPGAs Multithreaded