Interconnection Networks


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1 CMPT765/ Interconnection Networks Qianping Gu 1 Interconnection Networks The note is mainly based on Chapters 1, 2, and 4 of Interconnection Networks, An Engineering Approach by J. Duato, S. Yalamanchili, and L. Ni and Section of Multiwavelength Optical Networks, A Layered Approach, by T.E. Stern and K. Bala. Interconnection for digital systems Interconnection networks provide the interconnection for digital systems. Examples of interconnection networks include the internal buses in VLSI circuits, telephone switches and networks, networks for parallel/distributed computing systems (including vector supercomputers, multicomputers, multiprocessors, cluster/network of workstations), LAN, MAN, WAN, and networks for industrial applications and electronic devices. Parallel computing and networks Parallel computing systems have been developed to meet the increasing demands on computing powers. A bottleneck in parallel computing systems is the the communication between processors. Therefore, the performance of interconnection networks is a critical issue in parallel computing. This has been a major driving force for the research of interconnection networks. The study of interconnection networks in parallel computing system includes the performance and cost issues. Parallel computer architecture Distributed memory multiprocessors (multicomputers) A multicomputer consists of a set of processors, each processor has its own memory, interconnected by a network. Communications between processors are realized by message passing on the interconnection network. It is easy to make a multicomputer with a large number of processors (and thus a large computing power in theory) but it is difficult to make programs on multicomputers because data and tasks need to be distributed to processors in an efficient way. Shared memory mutliprocessors In this model, all processors in a system share a common memory space. The communication between processors are realized by read/write the shared memory cells through interconnection networks. This simplifies the data exchange between processors. When the system is small, the access time to the memory of every processor can be considered uniform. However, this is not true if the system is large. Distributed sharedmemory multiprocessors This model combined the previous two models, each processor has a local cache memory, and all processors share a common main memory. Multicomputers, shared memory multiprocessors, and distributed sharedmemory multiprocessors are known as fine grained parallel computing systems, because the computation and communication between processors can be performed in a highly synchronized way.
2 CMPT765/ Interconnection Networks Qianping Gu 2 Network of workstations This model refers to a set of workstations/pcs connected by a network such as a LAN. The model can be further classified into two categories: NOW (network of workstations) and COW (cluster of workstations). NOW is a system dedicated to the parallel computing. Usually, the performance issue of the network in NOW is considered when the system is built. COW refers to a set of workstations/pcs connected by a network that the system may work for other purposes but its extra computing power is used for parallel computing. This model is known as coarse grained parallel computing systems. The computation on this model can be bulk synchronized. Classification of Interconnection Networks Interconnection networks provide the interconnection among end systems and can be classified into sharedmedium networks, direct networks, indirect networks, and hybrid networks. Sharedmedium networks In sharedmedium networks, processors are connected by a common transmission medium such as a bus. All processors share the medium which does not generate message. To send a message to a destination, a source broadcasts the message on the medium and the destination picks up the message. Because processors may send messages to the medium simultaneously, the resolution of network access conflicts is needed. The nature of the shared medium also limits the bandwidth of the network and the number of end systems in the network. Examples of the shared medium networks include the Ethernet. The protocol of for the medium access control used in the Ethernet is known as CSMA/CD (carrier sense multiple access with collision detection). Pointtopoint networks In pointtopoint networks, end systems are connected by pointtopoint communication links. The networks can be further classified into two categories: direct networks and indirect networks. In direct networks, pointtopoint links directly connect each end system to some other end systems. In indirect networks, end systems are connected via one or more switches, switches are connected via pointtopoint links. Hybrid networks Some networks may have more complicated structures such as hierarchical structures or hypergraph topologies. Such networks are classified as hybrid networks. Direct Networks A direct network consists of a set of nodes and a set of pointtopoint links. Each node is directly connected to a small subset of nodes by links. Each node performs both routing and computing. A direct network is usually modeled as a graph, with vertices and edges
3 CMPT765/ Interconnection Networks Qianping Gu 3 of the graph for the nodes and links in the network, respectively. A direct network is characterized by its topology and the routing/switching technologies used in the network. Important topology properties of the network include node degree (the number of links connected to the node), diameter (the maximum distance between two nodes in the network), regularity (a network is regular when all nodes have the same degree), symmetry (a network is symmetric when it looks alike from every node), and orthogonal property (a network is orthogonal if its nodes and links can be arranged in n dimensions such that each link is placed in exactly one dimension). In direct networks, the paths for message transmission are selected by routing algorithms. The switching mechanisms determine how inputs are connected to outputs in a node. All the switching techniques can be used in direct networks. Popular topologies for direct networks rdimensional mesh The rdimensional mesh consists of N = k 1 k 2... k r nodes, k i nodes along dimension i, k i 2. Each node is identified by a label (a 1,..., a r ), 0 a i k i 1 and 1 i r. Two nodes u = (a 1,..., a r ) and v = (b 1,..., b r ) are connected by a link iff there is exactly one j such that a j = b j ± 1 and a i = b i for all i j. The most important mesh networks in practice are the 2D mesh (r = 2, k 0 = k 1 = n, N = n 2 ) and the 3D mesh (r = 3, k 0 = k 1 = k 2 = n, N = n 3 ). rdimensional torus Similar to the rdimensional mesh, the rdimensional torus consists of N = k 1 k 2... k r nodes, k i nodes along dimension i, k i 2. Each node is identified by a label (a 1,..., a r ), 0 a i k i 1 and 1 i r. Two nodes u = (a 1,..., a r ) and v = (b 1,..., b r ) are connected by a link iff there is exactly one j such that a j = b j ± 1 mod k j and a i = b i for all i j. The torus can be considered as the mesh with wrap around connections. When k 1 = k 2 =... = k r = k, the rdimensional torus is called the kary rcube. When r = 1, the network is the ring. The 2D torus (r = 2, k 0 = k 1 = n, N = n 2 ) and the 3D torus (r = 3, k 0 = k 1 = k 2 = n, N = n 3 ) are important networks. Hypercube The ndimensional hypercube (ncube) consists of 2 n nodes. Each node is identified by (a 1,..., a n ), a i {0, 1}, 1 i n. There is a link between u = (a 1,..., a n ) and v = (b 1,..., b n ) iff u and v differ in exactly one bit position. The ncube has degree n and diameter n. Tree The kary tree is a tree in which every node except leaves has exactly k children. When k = 2, the kary tree is known as the binary tree. Cubeconnected cycles The cubeconnected cycle network can be considered as an ndimensional hypercube of virtual nodes, each virtual node is a ring of n nodes (n2 n nodes in total). The cubeconnected cycle have nodedegree 3 and diameter O(n).
4 CMPT765/ Interconnection Networks Qianping Gu 4 ShuffleNet The (δ, k)shufflenet is a regular digraph of in/outdegree δ, N = kδ k nodes, and kδ k+1 arcs. The nodes are arranged in k columns, each column has δ k nodes. The nodes in each column are connected to the next column via δ k+1 arcs in a generalization of the perfect shuffle pattern. The (δ, k)shufflenet has diameter d = 2k 1 and N = d+1 2 δ(d+1)/2 nodes. debruijn digraphs The debruijn digraph B(δ, d) has in/outdegree δ, diameter d, and N = δ d nodes. Each node has a label (a 1,..., a d ), a i {0, 1,..., δ 1}. There are arcs from node v = (a 1, a 2,..., a d ) to nodes with labels (a 2,..., a d, α), α {0, 1,..., δ 1}. Star graph The ndimensional star graph has n! nodes, each node is identified by a permutation of (1, 2,..., n). Nodes u and v are connected iff v can be obtained by exchanging the 1st symbol with the ith symbol, 2 i n, in the permutation of u. The ndimensional star graph has nodedegree n 1 and diameter 3(n 1)/2. Indirect Networks Nodes are connected by network of switches which can be set dynamically in different topologies. Only nodes can be end systems (sources and destinations). A network can be modeled by a graph, with vertices for switches and edges for links. End systems are not shown usually. The source systems are connected to the inputs and the destination systems are connected to the outputs of the network. Typical indirect networks include the crossbar network and the multistage interconnection networks (MIN). Main factors for the networks include the topology, routing, and switching. Cross bar network An r n crossbar network consists of r input lines, n output lines, and rn crosspoints located at the intersections of the lines. At each cross point, the input line and output line are connected by a binary switch which has two states, connected and disconnected. Any set of pointtopoint connections (permutations) can be realized on an n n crossbar by closing one cross point in each row and each column. A problem with a crossbar switch is the large number of crosspoints in the switch. Multistage interconnection networks (MIN) In MIN, the inputs are connected to the outputs through a number of switch stages. Key factors for the MIN include the number of stages and the connection pattern between stages. Three stage Clos networks For a network with n inputs and n outputs, there are k p m cross bar networks in the 1st stage, m k k cross bar networks in the 2nd stage, and k m p cross bar networks in the 3rd stage, where n = kp.
5 CMPT765/ Interconnection Networks Qianping Gu 5 Generalized Clos networks For n a power of 2, taking p = m = 2, there are n/2 2 2 switches in each of the 1st and 3rd stages, and 2 n/2 n/2 networks in the 2nd stage. Recursively realizing the networks in the 2nd stage, we get a 2 log 2 n 1 stages network (Beneš network, has O(n log 2 n) 2 2 switches). A network with S connection states requires at least log 2 S binary switching elements. For n n network for realizing any permutations, there are S = n! connection states and needs at least n log n 1.44n binary switches. Generalized MIN model Assume that each stage has the same number of inputs and outputs. patterns between stages can be defined by permutations. The connection Basic Permutations Assumptions: Each stage has k n 1 k k switches. k n inputs/outputs are identified by x n 1...x 0, 0 x i k 1 for 0 i n 1. Perfect kshuffle σ k (x n 1...x 0 ) = x n 2...x 1 x 0 x n 1. σ 2 perfectly shuffles N cards. Inverse perfect shuffle connection σ k 1 (x n 1...x 0 ) = x 0 x n 1...x 1. Digit reversal connection ρ k (x n 1...x 0 ) = x 0 x 1...x n 1 The ith kary butterfly permutation, 0 i n 1, β k i (x n 1...x i+1 x i x i 1...x 1 x 0 ) = x n 1...x i+1 x 0 x i 1...x 1 x i The ith cube connection E i, 0 i n 1, k = 2 E i (x n 1...x i+1 x i x i 1...x 0 ) = x n 1...x i+1 x i x i 1...x 0. The ith kary baseline permutation, 0 i n 1, δ k i (x n 1...x i+1 x i x i 1...x 1 x 0 ) = x n 1...x i+1 x 0 x i x i 1...x 1. Classification of MINs Blocking network: A path from a free input to a free output is not always possible because of the conflicts with existing connection paths. Nonblocking network: A path from a free input to a free output is always possible without affecting the existing connection path. Rearrangeable networks: A path from a free input to a free output is always possible with possible rearrangements of the paths for existing connections. Unidirectional MINs: Links and switches are unidirectional. Bidirectional MINs: Links and switches are bidirectional.
6 CMPT765/ Interconnection Networks Qianping Gu 6 Unidirectional MINs An MIN of N inputs/outputs and k k switches needs at least log k N stages to allow a connection between any input/output pair. For the MINs of n stages, we number the stages 0, 1,..., n 1 from left (input) to right (output). Let C i (1 i n 1) denote the connection pattern between (i 1)st stage and ith stage, C 0 be the connection pattern between the sources and inputs of stage 0, and C n be the connection pattern between outputs of stage n 1 and the destinations. Baseline network: C 0, σ k ; C i (1 i n), δ k n i. Butterfly network: C 0, β k 0 ; C i (1 i n 1), β k n i; C n, β k 0. Cube MINs: C 0, σ k ; C i (1 i n), β k n i. Omega network: C i (0 i n 1), σ k ; C n, β k 0. Bidirectional MINs (BMINs) The BMIN consists of bidirectional switches/links. Bidirectional switches support three types of connections: forward, backward, and turnaround. End systems are connected to one side (e.g., left) of the network. Routing paths are established by crossing stages in forward direction, a turnaround connection, and in backward direction. Butterfly BMINs: Can be viewed as a folded Beneš network Inverse butterfly BMINs: Can be viewed as fattree (used in CM5) Hybrid Networks Hierarchical Networks: Example, hierarchical buses. Cluster based network. Hypergraph topology. Blocking properties of indirect networks Accessibility: A network is fully accessible, if there is a path from any input to any output in the network. Nonblocking property: A set of onetoone connection requests on an N N network can be defined by a permutation. A network is nonblocking, if any permutation can be realized by edgedisjoint paths in the network. Nonblocking properties can be further classified into rearrangeable nonblocking, widesense nonblocking, and strictsense nonblocking, depending on if the permutation is realized statically or dynamically. Rearrangeable nonblocking A network is rearrangeable nonblocking if any permutation can be realized by edgedisjoint paths when the entire permutation is known. In other words, any permutation can be statically realized. The word rearrangeable refers to that if the connection
7 CMPT765/ Interconnection Networks Qianping Gu 7 requests in a permutation arrive dynamically, the permutation can be realized with possible rearranging active connections. This is equivalent to realize a permutation statically. Widesense nonblocking When connection requests in a permutation arrive dynamically in sequence, the permutation can be realized by edgedisjoint paths without rearranging active connections subject to the condition that a selected path is used for each new connection request. In other words, any permutation can be dynamically realized with the help of a wise algorithm. Strictsense nonblocking When connection requests in a permutation arrive dynamically in sequence, the permutation can be realized by edgedisjoint paths without rearranging active connections, any idle path can be used for each new connection request. In other words, any permutation can be dynamically realized. Obviously, the strictsense nonblocking implies the wisesense nonblocking which implies the rearrangeable nonblocking. Networks by 2 2 Switches A 2 2 switch has two input links and two output links and has a through state and a cross state for onetoone connection from inputs to outputs. An r n cross bar network can be constructed by r n switches at the r n cross points of r input lines and n output lines. An n n crossbar network is strictsense nonblocking MINs: An ndimensional MIN has N = 2 n inputs/outputs and multiple stages of switches, with N/2 switches in each stage. A kstage network has k N/2 switches. A necessary condition for the full accessibility is that the network has at least n stages. Sufficient conditions for the full accessibility depend on connection patterns between stages. A kstage MIN has 2 k N/2 distinct states. To realize all permutations on an N N network, at least N! distinct states of the network is needed. A necessary condition on the number of stages for rearrangeable nonblocking networks is k 2 log N O(1). Sufficient conditions on the number of stages for rearrangeable nonblocking networks, depend on connection patterns between stages. The ndimensional Beneš network has 2 log N 1 stages and is rearrangeable nonblocking. Blocking MINs There is a class of well known ndimensional full accessible MINs with n stages of 2 2 switches. There is a unique path from any input to any output in a network of this class. Examples of the networks include baseline networks, omega networks, butterfly networks, indirect binary ncube networks, and the inverse networks of the above. These networks are blocking networks. The networks in the class have similar structures. Especially, many of them are topologically or functionally equivalent.
8 CMPT765/ Interconnection Networks Qianping Gu 8 Routing on ndimensional MINs Routing on the ndimensional Omega network Ω n An input u = (u n 1...u 1 u 0 ) and an output v = (v n 1...v 1 v 0 ) can be connected by the unique path Collisions (u n 1 u n 2...u 0 ) (u n 2...u 0 v n 1 ) (u n 3...u 0 v n 1 v n 2 )... (u n i...u 0 v n 1...v n i+1 )... (v n 1...v 0 ). If two paths share an edge then a collision occurs. Paths (u n 1...u 0 ) (v n 1...v 0 ) and (s n 1...s 0 ) (t n 1...t 0 ) are edgedisjoint iff i, 0 i n 1, u n i...u 0 v n 1...v n i+1 s n i...s 0 t n 1...t n i+1 For two paths u v and s t, let α(u, s) be the largest l such that the rightmost (least significant) l bits of u and s are the same, and let β(v, t) be the largest l such that the leftmost (most significant) l bits of v and t are the same. Paths u v and s t are edgedisjoint if α(u, s) + β(v, t) < n. Routing on other networks like butterfly networks is similar. Nonblocking networks N N cross bar network This network is strictsense nonblocking. A problem with the cross bar network is the large number O(N 2 ) of switches in the network. How to construct a nonblocking network with as few switches as possible has been a major research topic in circuitswitched networks. The number of switches can be reduced by increasing the number of stages in the network. Clos network Three stage N N Clos network (N = k p), k p m cross bar networks in the 1st stage m k k cross bar networks in the 2nd stage k m p cross bar networks in the 3rd stage The outputs of one stage are connected to the inputs of the next stage by a shuffle pattern. More precisely, let the k networks in the 1st stage be identified by an integer x 0 {0, 1,.., k 1} and let the m outputs of each switch be identified by an integer x 1 {0, 1,.., m 1}. Let the m networks in the 2nd stage be identified by integer
9 CMPT765/ Interconnection Networks Qianping Gu 9 x 1 {0, 1,.., m 1} and let the k outputs of each switch be identified by integer x 0 {0, 1,.., k 1}. Then output (x 1 x 0 ) of the 1st stage is connected to input (x 0 x 1 ) of the 2nd stage. Similarly, output (x 0 x 1 ) of the 2nd stage is connected to input (x 1 x 0 ) of the 3rd stage. A necessary and sufficient condition to make the three stage Clos network strictsense nonblocking is m = 2p 1. An outline for proving this is given below. For any idle input/output pair (u, v), where u is an input of network x 0 in the 1st stage and v is an output of network x 0 in the 3rd stage, at most m 1 networks of the 2nd stage have been used for the connections from the inputs other than u of network x 0, and at most m 1 networks of the 2nd stage have been used for the connections to the outputs other than v of network x 0. Since there are 2m 1 networks at the 2nd stage, there is at least one network which is not used by any of the previous connections from network x 0 or to network of x 0. Therefore, (u, v) can be connected via that network of the 2nd stage. For N = p 2, taking m = 2p 1, a nonblocking Closnetwork can be realized by O(N 3/2 ) switches. Reduce switches by increasing stages The number of switches can be further reduced by increasing the number of stages with a recursive construction. Let N = p r+1 (r 1) and m = 2p 1. The construction starts from a 3stage network k = p r p m cross bars in the 1st stage m p r p r cross bars in the 2nd stage p r m p cross bars in the 3rd stage Recursively realize the middle stage crossbars until each of the crossbars in the 2nd stage becomes a p p network. The number of switches in the above construction is O(N 1+1/(r+1) ). Beneš Networks For N = 2 n, taking p = m = 2, N/2 2 2 switches in the 1st stage 2 N/2 N/2 networks in the 2nd stage N/2 2 2 switches in the 3rd stage Recursively realizing the networks in the 2nd stage, we get a 2 log 2 N 1 stages network which is known as the ndimensional Beneš network and has O(N log 2 N) 2 2 switches. The Beneš network is rearrangeable nonblocking. A strictsense nonblocking network can be constructed by n = log 2 N copies of the Beneš networks (known as Cantor network) as follows: At the input stage, there are N 1 n switches. In the middle stage, there are n copies of the Beneš networks. At the output stage, there are N n 1 switches.
10 CMPT765/ Interconnection Networks Qianping Gu 10 Network equivalence Topological equivalence: Two networks are topologically equivalent if one can be obtained from the other by relabeling switches and/or inputs/outputs of switches. Functional equivalence: Two networks are functional equivalent if they realize the same set of permutations. Routing on direct networks A direct network consists of a set of nodes, each is connected to some other nodes (neighbors) by pointtopoint links. The network is also known as the pointtopoint network or messagepassing network. The term is usually used for parallel/distributed computing systems. The communication in the network is realized by message passing. Usually a message is partitioned into packets. A packet consists of a header and a data area. A header has routing and sequencing information. Usually each node in the network performs both computing and routing. In most systems, each node has a dedicated router to free the CPU from routing. Each router usually can realize nonblocking routing from its inputs to its outputs. Communication time A common metric for communication time is communication latency which has three parts: Startup latency It is the time to handle packet at source and destination nodes and depends on the protocols and internal architectures of the nodes. Network latency It is the time between a packet leaving the source and arriving at the destination assuming that there is no contention during the transmission. It depends on the topology of the network, the channel capacity, switching techniques, routing algorithms, and structures of routers. Blocking time It is the time delay caused by contentions. The contention can happen on links and routers. The blocking time depends on dynamic behaviors of the network. Queueing theory is a main methodology for analyzing the average blocking time. Main factors on the communication latency include the topology, routing, flow control, and switching. Topology The topology refers to how nodes are interconnected by communication links (channels). It is ideal that any two nodes is directly connected by a link. The corresponding graphs to such networks are complete. However, due to the hardware constraints and cost, it is not feasible to have large complete networks. Much research work has been done on network topologies. Some basic preferable properties of topologies include small diameter,
11 CMPT765/ Interconnection Networks Qianping Gu 11 small node degree, multiple disjoint paths between nodes, symmetry, and regularity. Some properties contradict with each other, like diameter and node degree. Additional properties related to performances of the network include the following. Orthogonal property, provides the base for dimension based routing which is easy to realize. Bisection width, the minimum number of links to partition the network into two parts. This property is important to the fault tolerance of the network. Channel bandwidth, the data rate of a link. It is the product of channel width and the channel rate, where the channel width is the number of bits can be transmitted in parallel on a link (the number of lines) and the channel rate is the peak transfer rate of bits on a single line. The channel bandwidth determines the performance of the link. Routing Routing is to select a path for delivering messages from source to destination. The following strategies have been used for routing. Source routing The source node determines the routing path which is fixed. The packet must carry the information on the routing path. Distributed routing Each router decides the neighbor node to which it sends the message without the global information of the network. The algorithm used by routers should be fast and easy to implement. Deterministic routing A unique routing path is used for a source and destination pair. The path does not depend on the dynamic states of the network. This is also known as oblivious routing. Adaptive routing The routing path for a source and destination pair may not be unique. The path depends on the dynamic states of the network. Minimal routing The routing path is always a shortest path. We will study routing in more details later. Switching in direct networks Both circuitswitching and packetswitching have been used in direct networks. Circuit switching In circuitswitching networks, a dedicated path is setup to connect a pair of source and destination. The message is transfered without buffering on the path. The communication
12 CMPT765/ Interconnection Networks Qianping Gu 12 latency consists of the time for path setup and the delay in transferring the message. In most of the circuitswitching parallel computing systems, the paths are setup by passing a prob (control) packet from the source to the destination. Let T be the communication latency, L c be the length of the control packet, L be the length of the message, B be the channel bandwidth, and d be the length (the number of channels) in the path. Then T = d L c B + L B. If L c << L then the latency can be considered independent of d. The circuitswitching is not efficient for busty traffics. For short messages if a circuit is released each time, then the time for path setup is excessive. If a circuit is not released then the channels in the circuit are idle, resulting in low utilization. Another problem is that one busy channel can block a whole circuit. Packet switching In packetswitching networks, the path for transmitting messages from a source to a destination may not be dedicated or unique and messages are transmitted with possible buffering at the intermediate routers on the path from the source to the destination. This overcomes some problems in circuitswitching networks. We discuss a number of variants of circuitswitching techniques. Messageswitching In messageswitching networks, messages are routed dynamically using routing algorithms. Usually the algorithms are distributed and adaptive ones. Messages are transmitted in a storeandforward way: messages are stored in buffers at intermediate nodes and the whole message is stored before it is forwarded to the next node. Each message has a header which contains the routing information like the source/destination addresses. A link (channel) can be shared by messages for multiple connections. Let β be the startup time for transmitting a message at a node. The communication latency for messageswitching networks is T = d(β + L B ). For a network with diameter D the worst case lower bound for the latency is D(β + L B ). Problems with the above networks include large buffers required at routers (because a buffer should be able to store messages of different sizes) and latency proportional to the distance from source to destination.
13 CMPT765/ Interconnection Networks Qianping Gu 13 Packetswitching In packetswitching networks, a message is partitioned into packets (usually of fixed size), each packet has a header containing routing information. Each packet is routed in a storeandforward way independently. This allows two types of parallelism in routing. One is that several links in a same path are simultaneously used for transferring packets (packets pipelined) and the other is that packets can be routed on multiple paths from the source to the destination. Because the packets have the same size, it is easier to control the buffer size at routers. Packetswitching networks have better resource utilization than messageswitching networks but have duplicated headers and more overhead at routers. Let P be the size of the packets. Then the latency for the first packet is d(β + P B ). If packets are pipelined on the links of the path, the communication latency for the message is T = (d + L P 1)(β + P B ). For a network with diameter D and cutwidth C (the number of edges that separate the network), the worst case lower bound for the latency is Virtual cutthrough max{dβ, L BC }. The virtual cutthrough switching can be considered as a mixture of circuitswitching and packetswitching. The idea here is that when the next channel is available at an intermediate router, the router sends the received part of a packet to the channel before the entire packet is stored. A router only buffers an entire packet when the output channel is busy. In the worst case, the latency of the network is similar to that of a packetswitched network. In the best case, the latency is similar to that of a switched network. In the ideal case, the latency is Wormhole routing T = dβ + L B. In wormholeswitching networks, a packet is further partitioned into smaller units (flits). The first flit(s) contains the header and the other flits contain data. The routing decision is based on header flits and data flits follow the route for the header in a pipelined fashion (the router does not buffer data flits). Since data flits do not contain routing information, a contiguous path of channels is needed. When a header is blocked, all flits stop advancing and remain in channels. This is different from the virtualcutthrough switching where the data are moved from channels to buffers of the router. The latency of the network is T = dβ + T B
14 CMPT765/ Interconnection Networks Qianping Gu 14 if there is no contention. The advantages of the networks is small latency (almost independent to d if no contention) and very small buffers (just FIFO flit buffers). Problems include large blocking time if network congested and deadlocks in routing. An example of a deadlock may like this: packet A holds some resources while requesting others held by packet B which is demanding the resources held by A. Resources are buffers in storeandforward and virtualcutthrough networks and channels in circuitswitching and wormhole networks. Much work has been done on preventing and avoiding deadlocks. The details are omitted here. Virtual channels In the VC switching, a message/packet is transmitted through a virtual path. A virtual path is not a dedicated one for a connection but can be shared by multiple connections. Similar to the circuitswitching, there are three phases in the VC switching, connection establishment, transmission, and connection termination. The advantages of the virtual channel switching include the similar latency to and better resource utilization than those of circuitswitching networks. Disadvantages include the increased scheduling complexity and the physical channel shared by multiple virtual connections can be a bottleneck which increases the latency. Routing Strategies Deterministic routing For orthogonal networks, an efficient approach is dimensionordered routing. The routing path consists of a sequence of links with a specific dimension order. The intermediate routers can easily compute the next output link from the source and destination addresses in the message. An example of dimensionordered routing is the Ecube routing on the hypercube network: A packet contains the destination address d {0, 1} n. When the packet arrives at a node with label v {0, 1} n, the node computes d v, where is the bitwise binary sum, and uses the link on the dimension corresponding to the rightmost (least significant) 1 in d v as the output link (if d v = 0, the packet has arrived at the destination d). Another example is meshxy routing. In this approach, a packet is first routed in the X direction to the correct row and then in the Y direction to the correct column. Adaptive routing This routing strategy can choose routing paths based on the conditions of the network. There are a number of approaches. Details are omitted. Table lookup routing This is a distributed routing strategy. Each node keeps a table to indicate which outgoing link to use for a destination. The Internet uses this approach. Key points for this approach include getting information for updating the routing table and reducing the table size.
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